CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.
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Updated
Nov 25, 2019 - SystemVerilog
Content-Length: 180642 | pFad | http://github.com/topics/testing-rtl
F8CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.
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