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ORCID7th IOLTW 2001: Taormina, Italy
- 7th IEEE International On-Line Testing Workshop (IOLTW 2001), 9-11 July 2001, Taormina, Italy. IEEE Computer Society 2001, ISBN 0-7695-1290-9
Dependability Evaluation
- Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Luca Tagliaferri, Paolo Prinetto:
Validation of a Software Dependability Tool via Fault Injection Experiments. 3-8 - Pierluigi Civera, Luca Macchiarulo
, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
Exploiting FPGA for Accelerating Fault Injection Experiments. 9-13 - Joakim Aidemark, Peter Folkesson, Johan Karlsson:
Path-Based Error Coverage Prediction. 14-20 - Piotr Gawkowski, Janusz Sosnowski:
Analyzing Fault Effects in Fault Insertion Experiments. 21-
On-Line Testing for Reconfigurable Systems
- Miron Abramovici, Charles E. Stroud, Matthew Lashinsky, Jeremy Nall, John Marty Emmert:
On-Line BIST and Diagnosis of FPGA Interconnect Using Roving STARs. 27-33 - Manuel G. Gericota, Gustavo R. Alves, Miguel L. Silva, José M. Ferreira:
DRAFT: An On-Line Fault Detection Method for Dynamic and Partially Reconfigurable FPGAs. 34-36 - Andrzej Krasniewski:
Testing FPGA Delay Faults in the System Environment is Very Different from "Ordinary" Delay Fault Testing. 37-
On-Line Testable and Fault Tolerable Circuits and Systems
- Luis Entrena, Celia López, Emilio Olías, Enrique San Millán, José Alberto Espejo:
Logic Optimization of Unidirectional Circuits with Structural Methods. 43-47 - Luis Entrena, Celia López, Emilio Olías:
Automatic Insertion of Fault-Tolerant Structures at the RT Level. 48-50 - Matthias Pflanz, Karsten Walther, Heinrich Theodor Vierhaus:
On-line Error Detection Techniques for Dependable Embedded Processors with High Complexity. 51-53 - Monica Alderighi, Sergio D'Angelo, Giacomo R. Sechi, Cecilia Metra:
Novel Fault-Tolerant Adder Design for FPGA-Based Systems. 54-
Logic Verification for On-Line Tested Systems
- Dhiraj K. Pradhan:
Logic Insertion to Speed-Up Logic Verification: A Recent Development. 61-64 - Mrinal Bose, Elizabeth M. Rudnick, Magdy S. Abadir:
Automatic Bias Generation Using Pipeline Instruction State Coverage for Biased Random Instruction Generation. 65-
Built-In Self-Testing
- Dimitri Kagaris, Spyros Tragoudas:
Using a WLFSR to Embed Test Pattern Pairs in Minimum Time. 75-79 - Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos:
A New Reseeding Technique for LFSR-Based Test Pattern Generation. 80-86 - Yannick Bonhomme, Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch:
A Gated Clock Scheme for Low Power Scan-Based BIST. 87-89 - Ondrej Novák, Jiri Nosek:
Test-per-Clock Testing of the Circuits with Scan. 90-
Self-Checking, Concurrent Detection and Radiation Effects
- Octavian Petre, Hans G. Kerkhoff:
Increasing the Fault Coverage in Multiple Clock Domain Systems by Using On-Line Testing of Synchronizers. 95-99 - Michele Favalli, Cecilia Metra:
Single Output Distributed Two-Rail Checker with Diagnosing Capabilities for Bus Based Self-Checking Architectures. 100-105 - Y. Tsiatouhas, Th. Haniotakis, Dimitris Nikolos, Costas Efstathiou:
Concurrent Detection of Soft Errors Based on Current Monitoring. 106-110 - Dean Lewis, Hervé Lapuyade, Yann Deval, Yvan Maidon, Frédéric Darracq, Renaud Briand, Pascal Fouillat:
A New Laser System for X-Rays Flashes Sensitivity Evaluation. 111-
Automotive Applications & On-Line Monitoring of Temperature
- Alberto Manzone, Alessandro Pincetti, Diego De Costantini:
Fault Tolerant Automotive Systems: An Overview. 117-121 - José Luis Merino, Sebastià A. Bota, A. Herms, Josep Samitier, Enric Cabruja, Xavier Jordà, Miquel Vellvehí, J. Bausells, A. Ferré, J. Bigorra:
Smart Temperature Sensor for On-Line Monitoring in Automotive Applications. 122-126 - Ashish Syal, Victor Lee, André Ivanov, Josep Altet:
CMOS Differential and Absolute Thermal Sensors. 127-
Posters
- Parag K. Lala, Mark G. Karpovsky:
An Approach for Designing On-Line Testable State Machines. 135 - Xiaodong Zhang, Kaushik Roy:
Power Constrained Test Scheduling with Low Power Weighted Random Testing. 136 - Cristiana Bolchini, Fabio Salice, Donatella Sciuto:
Designing Reliable Embedded Systems Based on 32 Bit Microprocessors. 137 - Chouki Aktouf:
On-Line Testing in Continuous Operation of Embedded Systems: Modeling and Performance Evaluation. 138 - Michael Böhnel, Reinhold Weiss:
Self-Stabilization Testing of LUT-Based FPGA Designs by Fault Injection. 139 - Joaquin Gracia, Juan Carlos Baraza, Daniel Gil, Pedro J. Gil:
A Study of the Experimental Validation of Fault-Tolerant Systems Using Different VHDL-Based Fault Injection Techniques. 140 - Jose Miguel Vieira dos Santos:
TRACS-TRansient Activity Checking with Scan Cells. 141 - Zan Yang, Gwan Choi:
An On-Line Testing Approach Using Code-Perturbation. 142 - Richard P. Kleihorst, Nico F. Benschop:
Fault Tolerant ICs by Area-Optimized Error Correcting Codes. 143 - Anzhela Yu. Matrosova, K. Nikitin, Olga Goloubeva:
Totally Self-Checking FSM Design Based on Multilevel Synthesis Methods and FPGA Implemetation. 144
Self Checking Circuits & Error Control Coding Implementation
- Vitalij Ocheretnij, Michael Gössel, Egor S. Sogomonyan:
Code-Disjoint Carry-Dependent Sum Adder with Partial Look-Ahead. 147-152 - Stanislaw J. Piestrak, Dimitris Bakalis, Xrysovalantis Kavousianos:
On the Design of Self-Testing Checkers for Modified Berger Codes. 153-157 - Fabrice Monteiro, Abbas Dandache, Bernard Lepley:
Fast Configurable Polynomial Division for Error Control Coding Applications. 158-
Hardware & Software Techniques for Fault Tolerance
- Cristiana Bolchini, Luigi Pomante, Fabio Salice, Donatella Sciuto:
Reliability Properties Assessment at System Level: A Co-design Framework. 165-171 - Bogdan Nicolescu, Raoul Velazco, Matteo Sonza Reorda:
Effectiveness and Limitations of Various Software Techniques for "Soft Error" Detection: A Comparative Study. 172-177 - Isabel González, Luis Berrojo:
Supporting Fault Tolerance in an Industrial Environment: The AMATISTA Approach. 178-
Applications
- Fabian Vargas, Rubem Dutra Ribeiro Fagundes, Daniel Barros Jr.:
A New Approach to Design Reliable Real-Time Speech Recognition Systems. 187-191 - Gaetano Palumbo, Giuseppe Introvaia, Vincenzo Mastrocola, Promod Kumar, Francesco Pipiton:
Built-In Self Test for Low Cost Testing of a 60 MHz Synchronous Flash Memory. 192-196 - Fernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Design and Test of Certifiable ASICs for Safety-Critical Gas Burners Contro. 197-201 - Naotake Kamiura, Teijiro Isokawa, Nobuyuki Matsui, Kazuharu Yamato:
On-Line Multiple-Fault-Detection of Fuzzy Controllers. 202-
On-Line Testing of Digital, Analog and Mixed Signal Circuits
- Emmanuel Simeu, Ahmad Abdelhay:
A Robust Fault Detection Scheme for Concurrent Testing of Linear Digital Systems. 209-214 - Marcello Artioli, Fiorenzo Filippetti:
Fault Diagnosis for Linear Analog Circuits with Symbolic Analysis and Reduced Observable Point Set. 215-218 - Cristoforo Marzocca, Francesco Corsi:
Mixed-Signal Circuit Classification in a Pseudorandom Testing Scheme. 219-
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