"Datapath-Layout-Driven Design for Low-Power Standard-Cell LSI Implementation."

Takahiro Kakimoto, Hiroyuki Ochi, Takao Tsuda (2002)

> Home

Details and statistics

DOI: —

access: closed

type: Journal Article

metadata version: 2021-06-09

- view
  - electronic edition @ ieice.org
- export record
  dblp key:
  - journals/ieiceta/KakimotoOT02
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ieiceta/KakimotoOT02
Takahiro Kakimoto, Hiroyuki Ochi, Takao Tsuda:
Datapath-Layout-Driven Design for Low-Power Standard-Cell LSI Implementation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(12): 2795-2798 (2002)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.