default search action

combined dblp search
author search
venue search
publication search

ask others

"High-Speed VLSI Architectures for Modular Polynomial Multiplication via ..."

Weihang Tan et al. (2023)

> Home

Details and statistics

DOI: 10.1109/TC.2023.3251847

access: closed

type: Journal Article

metadata version: 2024-11-11

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tc/TanWZLP23
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tc/TanWZLP23
Weihang Tan, Antian Wang, Xinmiao Zhang, Yingjie Lao, Keshab K. Parhi:
High-Speed VLSI Architectures for Modular Polynomial Multiplication via Fast Filtering and Applications to Lattice-Based Cryptography. IEEE Trans. Computers 72(9): 2454-2466 (2023)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.