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ORCIDIEEE Design & Test of Computers, Volume 27
Volume 27, Number 1, January/February 2010
- Design & Test in the new decade: Continuity and new directions. 4-5
- Mohammad Tehranipoor, Farinaz Koushanfar
:
Guest Editors' Introduction: Confronting the Hardware Trustworthiness Problem. 8-9 - Mohammad Tehranipoor, Farinaz Koushanfar:
A Survey of Hardware Trojan Taxonomy and Detection. 10-25 - Yier Jin, Yiorgos Makris:
Hardware Trojans in Wireless Cryptographic ICs. 26-35 - Kurt Rosenfeld, Ramesh Karri:
Attacks and Defenses for JTAG. 36-47 - Meng-Day (Mandel) Yu, Srinivas Devadas:
Secure and Robust Error Correction for Physical Unclonable Functions. 48-65 - Alex Baumgarten, Akhilesh Tyagi, Joseph Zambreno:
Preventing IC Piracy Using Reconfigurable Logic Barriers. 66-75 - Lingkan Gong, Jingfen Lu:
Verification-Purpose Operating System for Microprocessor System-Level Functions. 76-85 - CEDA Currents. 86-87
- Design Automation Technical Committee Newsletter. 88-89
- Test Technology TC Newsletter. 90-91
- Conference Reports. 92
- Igor L. Markov:
Master numerical tasks with ease. 93-95 - Miodrag Potkonjak:
Variability: For headache and profit. 96-98
Volume 27, Number 2, March/April 2010
- Compact variability modeling to the rescue. 4
- Yu Cao, Frank Liu:
Guest Editors' Introduction: Compact Variability Modeling in Scaled CMOS Design. 6-7 - Samar K. Saha:
Modeling Process Variability in Scaled CMOS Technology. 8-16 - Xi-Wei Lin, Victor Moroz:
Layout Proximity Effects and Modeling Alternatives for IC Designs. 18-25 - Binjie Cheng, Daryoosh Dideban, Negin Moezi, Campbell Millar, Gareth Roy, Xingsheng Wang, Scott Roy, Asen Asenov:
Statistical-Variability Compact-Modeling Strategies for BSIM4 and PSP. 26-35 - Colin C. McAndrew, Xin Li, Ivica Stevanovic, Gennady Gildenblat:
Extensions to Backward Propagation of Variance for Statistical Modeling. 36-43 - Darsen D. Lu, Chung-Hsun Lin, Ali M. Niknejad, Chenming Hu:
Compact Modeling of Variation in FinFET SRAM Cells. 44-50 - Mohammad Tehranipoor, Kenneth M. Butler:
Power Supply Noise: A Survey on Effects and Research. 51-67 - Robert K. Brayton, Jason Cong:
NSF Workshop on EDA: Past, Present, and Future (Part 1). 68-74 - Rohit Kapur:
Conference Reports. 75 - CEDA Currents. 76-78
- Design Automation Technical Committee Newsletter. 79
- Test Technology TC Newsletter. 80-81
- Grant Martin:
A career in system-level design research. 82-83 - Sani R. Nassif:
'Tis the gift to be simple. 84-86
Volume 27, Number 3, May/June 2010
- Mihalis Psarakis, Dimitris Gizopoulos, Edgar E. Sánchez, Matteo Sonza Reorda:
Microprocessor Software-Based Self-Testing. 4-19 - Yu-Tsao Hsing, Li-Ming Denq, Chao-Hsun Chen, Cheng-Wen Wu:
Economic Analysis of the HOY Wireless Test Methodology. 20-30 - Chun-Yu Yang, Ying-Yen Chen, Sung-Yu Chen, Jing-Jia Liou:
Automatic Test Wrapper Synthesis for a Wireless ATE Platform. 31-41 - Pouria Bastani, Nicholas Callegari, Li-C. Wang, Magdy S. Abadir:
Feature-Ranking Methodology to Diagnose Design-Silicon Timing Mismatch. 42-53 - Manish Sharma, Chris Schuermyer, Brady Benware:
Determination of Dominant-Yield-Loss Mechanism with Volume Diagnosis. 54-61 - Robert K. Brayton, Jason Cong:
NSF Workshop on EDA: Past, Present, and Future (Part 2). 62-74 - Rohit Kapur:
Conference Reports. 75 - Scott Davidson:
Concurrent checking for logic [review of "New Methods of Concurrent Checking (Goessel, M., et al; 2008)]. 80-81 - Andrew B. Kahng:
Scaling: More than Moore's law. 86-87 - Rob Aitken:
Time to retire our benchmarks. 88
Volume 27, Number 4, July/August 2010
- Partha Pratim Pande, Sriram R. Vangal:
Guest Editors' Introduction: Promises and Challenges of Novel Interconnect Technologies. 6-9 - Ron Ho, Frankie Liu, Dinesh Patil, Xuezhe Zheng, Guoliang Li, Ivan Shubin, Elad Alon, Jon K. Lexau, Herb Schwetman, John E. Cunningham, Ashok V. Krishnamoorthy:
Optical Interconnect for High-End Computer Systems. 10-19 - Hong Li, Chuan Xu, Kaustav Banerjee:
Carbon Nanomaterials: The Ideal Interconnect Technology for Next-Generation ICs. 20-31 - Patrick Yin Chiang, Sirikarn Woracheewan, Changhui Hu, Lei Guo, Rahul Khanna, Jay J. Nejedlo, Huaping Liu:
Short-Range, Wireless Interconnect within a Computing Chassis: Design Challenges. 32-43 - Alireza Nojeh, André Ivanov:
Wireless Interconnect and the Potential for Carbon Nanotubes. 44-53 - Zheng Li, Moustafa Mohamed, Hongyu Zhou, Li Shang, Alan Rolf Mickelson, Dejan Filipovic, Manish Vachharajani, Wounjhang Park, Yihe Sun:
Global On-Chip Coordination at Light Speed. 54-67 - Igor L. Markov:
Chips in 3D. 68-69 - Andrew B. Kahng:
When is 3D 2B? 70-71 - Rohit Kapur:
Conference Reports. 77 - Radu Marculescu:
On-chip networks: Two sides of the same coin. 80
Volume 27, Number 5, September - October 2010
- Koh Johguchi, Akihiro Kaya, Shinya Izumi, Hans Jürgen Mattausch, Tetsushi Koide, Norio Sadachika:
Measurement-Based Ring Oscillator Variation Analysis. 6-13 - David A. Papa, Michael D. Moffitt, Charles J. Alpert, Igor L. Markov:
Speeding Up Physical Synthesis with Transactional Timing Analysis. 14-25 - Ewerson Luiz de Souza Carvalho, Ney Laert Vilar Calazans, Fernando Gehm Moraes:
Dynamic Task Mapping for MPSoCs. 26-35 - Michele Portolan, Suresh Goyal, Bradford G. Van Treuren, Chen-Huan Chiang, Tapan J. Chakraborty, Thomas B. Cook:
A Common Language Framework for Next-Generation Embedded Testing. 36-49 - Alodeep Sanyal, Syed M. Alam, Sandip Kundu:
BIST to Detect and Characterize Transient and Parametric Failures. 50-59 - Grant Martin:
Spray-painting on the wall of EDA. 68-69 - Ron Press, Erik H. Volkerink:
The ABCs of ITC. 80
Volume 27, Number 6, November - December 2010
- Swarup Bhunia, Rahul Rao:
Guest Editors' Introduction: Managing Uncertainty through Postfabrication Calibration and Repair. 4-5 - Vishwanath Natarajan, Shreyas Sen, Aritra Banerjee, Abhijit Chatterjee, Ganesh Srinivasan, Friedrich Taenzler:
Analog Signature- Driven Postmanufacture Multidimensional Tuning of RF Systems. 6-17 - Wu-Hsin Chen, Byunghoo Jung:
Self-Healing Phase-Locked Loops in Deep-Scaled CMOS Technologies. 18-25 - Minki Cho, Jason Schlessman, Hamid Mahmoodi, Marilyn Wolf, Saibal Mukhopadhyay:
Postsilicon Adaptation for Low-Power SRAM under Process Variation. 26-35 - Rajiv V. Joshi, Rouwaida Kanj, Anthony Pelella, Arthur Tuminaro, Yuen H. Chan:
The Dawn of Predictive Chip Yield Design: Along and Beyond the Memory Lane. 36-45 - Tsu-Wei Tseng, Jin-Fu Li, Chih-Sheng Hou:
A Built-in Method to Repair SoC RAMs in Parallel. 46-57 - Mohammad Abdullah Al Faruque, Janmartin Jahn, Jörg Henkel:
Runtime Thermal Management Using Software Agents for Multi- and Many-Core Architectures. 58-68 - Scott Davidson:
About the power problem [review of "Power-Aware Testing and Test Strategies for Low Power Devices" (Girard, P., Eds., et.; 2010)]. 72-73 - Stephen V. Kosonocky:
Are you having fun yet? 80
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