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2020 – today
- 2025
[j10]Qifeng Huang, Siji Huang, Yanhang Chen, Yifei Fan, Qiwei Zhao, Jie Yuan:
A 5-MS/s 16-bit Low-Noise and Low-Power Split Sampling SAR ADC With Eased Driving Burden. IEEE J. Solid State Circuits 60(3): 813-825 (2025)- [j9]Yifei Fan
, Dongmin Shi, Yanhang Chen, Qifeng Huang, Siji Huang, Qiwei Zhao, Saqib Mohamad, Jie Yuan:
A Voltage-Assist 16-Channel Electrochemical Biosensor With Linearity Compensation. IEEE Trans. Biomed. Circuits Syst. 19(1): 153-164 (2025) - [j8]Debajit Basak, Siji Huang, George Yuan:
On the Effect of Memory Error in a Time-Interleaved Pipeline ADC With a Shared Residue Amplifier. IEEE Trans. Circuits Syst. II Express Briefs 72(3): 434-438 (2025) - 2024
- [j7]Yanhang Chen, Qifeng Huang, Yifei Fan, Qiwei Zhao, Siji Huang, Jie Yuan:
A 16-bit 4-MS/s SAR ADC With Dual-Segmental Bit Weight Self-Calibration. IEEE Trans. Circuits Syst. I Regul. Pap. 71(9): 3961-3974 (2024) - [j6]Siji Huang, Qifeng Huang, Yifei Fan, Qiwei Zhao, Yanhang Chen, Yihan Zhang, Jie Yuan:
An 8-MS/s 16-bit SAR ADC With Symmetric Complementary Switching and Split Passive Reference Segmentation in 180-nm Process. IEEE Trans. Circuits Syst. I Regul. Pap. 71(10): 4486-4498 (2024) - [j5]Qiwei Zhao, Qifeng Huang, Yanhang Chen, Yifei Fan, Siji Huang, Jie Yuan:
A 16-bit 1-MS/s SAR ADC With Asynchronous LSB Averaging Achieving 95.1-dB SNDR and 98.1-dB DR. IEEE Trans. Circuits Syst. I Regul. Pap. 71(12): 6447-6458 (2024) - [j4]Siji Huang, Debajit Basak, Yanhang Chen, Qifeng Huang, Yifei Fan, Jie Yuan:
An Efficient 1.4-GS/s 10-bit Timing-Skew-Free Time-Interleaved SAR ADC With a Centralized Sampling Frontend. IEEE Trans. Very Large Scale Integr. Syst. 32(7): 1195-1204 (2024) - [j3]Qifeng Huang, Siji Huang, Yanhang Chen, Yifei Fan, Jie Yuan:
An Injection-Locked and Sub-Sampling Clock Multiplier With a Two-Step SC DAC Achieving 2.67% Jitter Variation. IEEE Trans. Very Large Scale Integr. Syst. 32(10): 1841-1851 (2024) - [j2]Yanhang Chen, Siji Huang, Qifeng Huang, Yifei Fan, Jie Yuan:
The Error Analysis of Bit Weight Self-Calibration Methods for High-Resolution SAR ADCs. IEEE Trans. Very Large Scale Integr. Syst. 32(11): 1983-1992 (2024) - [c4]Qifeng Huang, Siji Huang, Yanhang Chen, Yifei Fan, Jie Yuan:
A 16b 5MS/s 93.7dB-SNDR SAR ADC with a Split Sampling Technique and SRM-Assisted Self-Calibration. CICC 2024: 1-2
2010 – 2019
- 2018
- [c3]Jianping Guo, Weimin Li, Yicheng Li, Siji Huang, Zhao Wang, Bing Mo, Dihu Chen:
A 70-nA 13-ppm/°C All-MOSFET Voltage Reference for Low-Power IoT Systems. ISCAS 2018: 1-4 - [c2]Siji Huang, Yicheng Li, Bing Mo, Jianping Guo, Dihu Chen:
An Output-Capacitorless Adaptively Biased Low-Dropout Regulator with Maximum 132-MHz UGF and Without Minimum Loading Requirement. SoCC 2018: 206-212 - 2012
- [j1]Ming Jiang, Siji Huang, Wenkun Wen:
Adaptive Polar-Linear Interpolation Aided Channel Estimation for Wireless Communication Systems. IEEE Trans. Wirel. Commun. 11(3): 920-926 (2012) - 2011
- [c1]Ming Jiang, Wenkun Wen, Siji Huang:
Low-Complexity Channel Estimation for Mobile Communication Systems. VTC Fall 2011: 1-5
Coauthor Index
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