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"Selective State Retention Power Gating Based on Gate-Level Analysis."

Shlomo Greenberg et al. (2014)

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DOI: 10.1109/TCSI.2013.2286029

access: closed

type: Journal Article

metadata version: 2020-05-22

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  - https://dblp.org/rec/journals/tcas/GreenbergRTP14
Shlomo Greenberg, Joseph Rabinowicz, Ron Tsechanski, Eugene Paperno:
Selective State Retention Power Gating Based on Gate-Level Analysis. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(4): 1095-1104 (2014)

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