Abstract
Floating point computing ability is an important concern in high performance scientific application and engineering computing. Although as a fundamental operation, floating point division (or reciprocal) has long been much less efficiency compared with addition and multiplication. Architectures like GPU and MIC even have no instruction for such division in the instruction level. This paper proposes a fast approximation algorithm to estimate the division of floating point numbers in IEEE 754 format based on existing instructions which in most cases are accurate enough for practical computing. It consists of a predicting step and an iterating step like most iterative numerical algorithm. The predicting step makes use of the property of IEEE 754 format to calculate estimation by only one integer subtraction instruction. The iterating step improves the accuracy by fast iterations in about ten instructions. This new algorithm is extremely easy to implement and shows a great performance in practical experiments.
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Acknowledgments
We thank anonymous reviewers for comments and suggestions on the submitted version of this paper. Special thanks to the suggestions from members of the Parallel Software Group of EECS, Peking University.
This research is supported by the National HTRD 863 Plan under Grants No. 2012AA010902, 2012AA010903; and NSFC Grants No. 61170053, 61432018, 61379048.
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Huang, K., Chen, Y. (2015). Improving Performance of Floating Point Division on GPU and MIC. In: Wang, G., Zomaya, A., Martinez, G., Li, K. (eds) Algorithms and Architectures for Parallel Processing. ICA3PP 2015. Lecture Notes in Computer Science(), vol 9529. Springer, Cham. https://doi.org/10.1007/978-3-319-27122-4_48
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DOI: https://doi.org/10.1007/978-3-319-27122-4_48
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