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High-Speed and Area-Efficient CMOS and CNFET-Based Level-Shifters

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Abstract

This paper proposes CMOS- and Carbon Nanotube FET (CNFET)-based high-speed level-shifter circuits. The proposed level-shifter designs make use of the Low-Threshold-Voltage Transistors and High-Threshold-Voltage Transistors devices available in the CNFET and 45 nm CMOS technologies, to significantly reduce the propagation delays and transistor count. The performance of the proposed level-shifters has been compared with the conventional level-shifter and other state-of-the-art level-shifter designs reported in the literature. The proposed level-shifters operate significantly faster (98% lower prorogation delays) as compared to the benchmarked level-shifter designs, and a reduction of 95% in Power Delay Product can be achieved.

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Authors and Affiliations

  1. Department of ECE, Mahindra University École Centrale School of Engineering, Hyderabad, Telangana, 500043, India

    Abhay S. Vidhyadharan

  2. Department of Electronics and Electrical Engineering, Birla Institute of Technology and Science Pilani, Hyderabad Campus, Telangana, 500078, India

    Aiswarya Satheesh, Kilari Pragnaa & Sanjay Vidhyadharan

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Vidhyadharan, A.S., Satheesh, A., Pragnaa, K. et al. High-Speed and Area-Efficient CMOS and CNFET-Based Level-Shifters. Circuits Syst Signal Process 41, 4649–4670 (2022). https://doi.org/10.1007/s00034-022-01999-4

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