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stm32/boards: Enable ROMFS partitions on PYBD_SFx boards.
Using unused and previously inaccessible external QSPI flash. Signed-off-by: Damien George <damien@micropython.org>
1 parent bea7645 commit 45c36f8

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4 files changed

+21
-2
lines changed

4 files changed

+21
-2
lines changed

ports/stm32/boards/PYBD_SF2/f722_qspi.ld

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,8 @@ MEMORY
2020
{
2121
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
2222
FLASH_APP (rx) : ORIGIN = 0x08008000, LENGTH = 480K /* sectors 2-7 */
23-
FLASH_EXT (rx) : ORIGIN = 0x90000000, LENGTH = 2048K /* external QSPI */
23+
FLASH_EXT (rx) : ORIGIN = 0x90000000, LENGTH = 1024K /* external QSPI */
24+
FLASH_ROMFS (rx): ORIGIN = 0x90100000, LENGTH = 1024K /* external QSPI */
2425
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 256K /* DTCM+SRAM1+SRAM2 */
2526
}
2627

@@ -39,6 +40,10 @@ _ram_end = ORIGIN(RAM) + LENGTH(RAM);
3940
_heap_start = _ebss; /* heap starts just after statically allocated memory */
4041
_heap_end = _sstack;
4142

43+
/* ROMFS location */
44+
_micropy_hw_romfs_part1_start = ORIGIN(FLASH_ROMFS);
45+
_micropy_hw_romfs_part1_size = LENGTH(FLASH_ROMFS);
46+
4247
/* Define output sections */
4348
SECTIONS
4449
{

ports/stm32/boards/PYBD_SF2/mpconfigboard.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -64,6 +64,11 @@ void board_sleep(int value);
6464
#define MICROPY_HW_RTC_USE_US (1)
6565
#define MICROPY_HW_RTC_USE_CALOUT (1)
6666

67+
// ROMFS config
68+
#define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI (1)
69+
#define MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ (&spi_bdev2.spiflash)
70+
#define MICROPY_HW_ROMFS_ENABLE_PART1 (1)
71+
6772
// SPI flash #1, for R/W storage
6873
#define MICROPY_HW_SOFTQSPI_SCK_LOW(self) (GPIOE->BSRR = (0x10000 << 11))
6974
#define MICROPY_HW_SOFTQSPI_SCK_HIGH(self) (GPIOE->BSRR = (1 << 11))

ports/stm32/boards/PYBD_SF6/f767.ld

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@ MEMORY
1818
{
1919
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
2020
FLASH_APP (rx) : ORIGIN = 0x08008000, LENGTH = 2016K /* sectors 1-11 3x32K 1*128K 7*256K */
21-
FLASH_EXT (rx) : ORIGIN = 0x90000000, LENGTH = 2048K /* external QSPI */
21+
FLASH_ROMFS (rx): ORIGIN = 0x90000000, LENGTH = 2048K /* external QSPI */
2222
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 512K /* DTCM=128k, SRAM1=368K, SRAM2=16K */
2323
}
2424

@@ -37,4 +37,8 @@ _ram_end = ORIGIN(RAM) + LENGTH(RAM);
3737
_heap_start = _ebss; /* heap starts just after statically allocated memory */
3838
_heap_end = _sstack;
3939

40+
/* ROMFS location */
41+
_micropy_hw_romfs_part1_start = ORIGIN(FLASH_ROMFS);
42+
_micropy_hw_romfs_part1_size = LENGTH(FLASH_ROMFS);
43+
4044
INCLUDE common_bl.ld

ports/stm32/boards/PYBD_SF6/mpconfigboard.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,11 @@
4545
#define MICROPY_HW_CLK_PLLQ (6)
4646
#define MICROPY_HW_FLASH_LATENCY (FLASH_LATENCY_4)
4747

48+
// ROMFS config
49+
#define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI (1)
50+
#define MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ (&spi_bdev2.spiflash)
51+
#define MICROPY_HW_ROMFS_ENABLE_PART1 (1)
52+
4853
// Extra UART config
4954
#define MICROPY_HW_UART7_TX (pyb_pin_W16)
5055
#define MICROPY_HW_UART7_RX (pyb_pin_W22B)

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