diff --git a/.github/workflows/main.yml b/.github/workflows/main.yml new file mode 100644 index 0000000..0aec6ca --- /dev/null +++ b/.github/workflows/main.yml @@ -0,0 +1,23 @@ +name: Testing the GitHub pages Publication + +on: + schedule: + - cron: '*/60 0 * * *' + push: + branch: + - master + +jobs: + jekyll: + runs-on: ubuntu-latest + steps: + - uses: actions/checkout@v2 + - uses: actions/cache@v2 + with: + path: vendor/bundle + key: ${{ runner.os }}-gems-${{ hashFiles('**/Gemfile') }} + restore-keys: | + ${{ runner.os }}-gems- + - uses: helaili/jekyll-action@v2 + with: + token: ${{ secrets.JEKYLL_PAT }} diff --git a/NetFPGA-PLUS.html b/NetFPGA-PLUS.html index 0f4b88b..ec7f3dc 100644 --- a/NetFPGA-PLUS.html +++ b/NetFPGA-PLUS.html @@ -56,24 +56,91 @@
A partial list of publications using the NetFPGA platform
-the links for the addresses are, where possible, doi.org links
+A partial list of publications using the NetFPGA platform.
+The links for the addresses are, where possible, doi.org links.
A line-rate, flexible, and open platform for research, and classroom experimentation. More than 3,500 NetFPGA systems have been deployed at over 300 institutions in over 60 countries around the world.
+The NetFPGA-10G is an FPGA-based PCI Express board with 10-Gigabit SFP+ interface, a x8 gen1 PCIe adapter card incorporating Xilinx’s Virtex-5 TX240TFPGA. It is ideal for the high bandwidth applications.
+Features list:
+To see the NetFPGA-10G repository and Wiki you will need to register.
+Title | +Organisation | +Documentation | +
---|---|---|
Production Test | +Stanford University | +Wiki | +
RLDRAM Test | +Xilinx | +Wiki | +
10G Ethernet Interface Loopback Test | +Stanford University / University of Cambridge | +Wiki | +
1G Ethernet Interface Loopback Test | +Stanford University / University of Cambridge | +Wiki | +
Reference NIC 10G | +Stanford University / University of Cambridge | +Wiki | +
Reference NIC 1G | +Stanford University / University of Cambridge | +Wiki | +
Flash Configuration | +University of Cambridge | +Wiki | +
Learning CAM Switch | +University of Pisa / University of Cambridge | +Wiki | +
Title | +Organisation | +Documentation | +
---|---|---|
NetFPGA-1G Ported Switch 10G | +University of Pisa / University of Cambridge | +Wiki | +
NetFPGA-1G Ported NIC 1G | +University of Pisa / University of Cambridge | +Wiki | +
NIC | +Stanford University / University of Cambridge | +Wiki | +
OpenFlow Switch | +Stanford University | +Wiki | +
NIC (SRAM) | +Stanford University / University of Cambridge | +Wiki | +
Simple 10G Switch | +Xilinx | +Wiki | +
NetFlow simple 10G Bram | +Universidad Autónoma de Madrid | +Wiki | +
Flash | +University of Cambridge | +Wiki | +
Where can I buy a NetFPGA 10G Platform?
+It seems that my board is broken, what should I do?
+What if I have Hardware problems with my board?
+What if I have Software problems with my board?
+You can exchange your ideas and questions with the NetFPGA 10G community here.
+How can I get involved with the NetFPGA project?
+How can I obtain the gateware and software package?
+Once you have used the NetFPGA, we hope that you will contribute to the project.
+You can find our Wiki here.
+The NetFPGA is the low-cost reconfigurable hardware platform optimized for high-speed networking. The NetFPGA includes the all fo the logic resources, memory, and Gigabit Ethernet interfaces necessary to build a complete switch, router, and/or security device. Because the entire datapath is implemented in hardware, the system can support back-to-back packets at full Gigabit line rates and has a processing latency measured in only a few clock cycles.
+Title | +Organisation | +Documentation | +
---|---|---|
IPv4 Reference Router | +Stanford University | +Wiki | +
Quad-Port Gigabit NIC | +Stanford University | +Wiki | +
Ethernet Switch | +Stanford University | +Wiki | +
Buffer Monitoring System | +Stanford University | +Wiki | +
Hardware-Accelerated Linux Router | +Stanford University | +Wiki | +
DRAM-Router | +Stanford University | +Wiki | +
DRAM-Queue Test | +Stanford University | +Wiki | +
Packet Generator | +Stanford University | +Wiki | +
OpenFlow Switch | +Stanford University | +Wiki | +
NetFlow Probe | +Brno University | +Wiki | +
AirFPGA | +Stanford University | +Wiki | +
Fast Reroute & Multipath Router | +Stanford University | +Wiki | +
NetThreads | +University of Toronto | +Wiki | +
NetThreads-RE | +University of Toronto | +Wiki | +
NetTM | +University of Toronto | +Wiki | +
Precise Traffic Generator | +University of Toronto | +Wiki | +
URL Extraction | +Univ. of New South Wales | +Wiki | +
zFilter Sprouter (Pub/Sub) | +Ericsson | +Wiki | +
Windows Driver | +Microsoft Research | +Wiki | +
RED | +Stanford University | +Wiki | +
Open Network Lab | +Washington University | +Wiki | +
DFA | +UMass Lowell | +Wiki | +
G/PaX | +Xilinx | +Wiki | +
RCP Router | +Stanford University | +Wiki | +
Deficit Round Robin (DRR) | +Stanford University | +Wiki | +
OpenFlow-MPLS Switch | +Ericsson | +Wiki | +
PTP-enabled Router | +Stanford University | +Wiki | +
Vlan Tag Handler | +Stanford University | +Wiki | +
Port Aggregator | +Stanford University | +Wiki | +
IP Lookup w/Blooming Tree | +University of Pisa | +Wiki | +
KOREN Testbed | +Chungnam-Korea | +Wiki | +
Virtual Data Plane | +Georgia Tech | +Wiki | +
Deficit Round Robin (DRR) Input Arbiter | +Universidade Federal do Rio Grande do Sul (Brazil) | +Wiki | +
Counter Braids | +Stanford (Lu, Jianying) | +Wiki | +
Ethernet Switch with Real-time support | +University of Waterloo and Universidad de Concepcion | +Wiki | +
End-to-End Ethernet Authorization | +Euskal Herriko Unibertsitateko | +Wiki | +
Ultra-high Speed Congestion-control | +University of North Carolina | +Wiki | +
Promiscuous Reference Router | +University of Catania | +Wiki | +
BORPH (Operating System) | +University of Hong Kong / University of Cape Town | +Wiki | +
Traffic Monitor | +University of Catania | +Wiki | +
Latency Measurement Module | +Algo-Logic Systems | +Wiki | +
NetFPGA Logic Analyzer | +USC/ISI | +Wiki | +
Bounded Jitter Policy | +University of Toronto | +Wiki | +
Traffic Classifier | +University of Toronto | +Wiki | +
Network IO Fairness | +Georgia Tech | +Wiki | +
Tunneling OpenFlow Switch with ICMP | +Stanford University | +Wiki | +
zFormation PSrouter (Pub/Sub) | +Ericsson | +Wiki | +
High Performance Packet Classifier | +University of Pisa | +Wiki | +
Flexible Router | +University of Catania | +Wiki | +
Monitoring System | +University of Pisa / University of Cambridge | +Wiki | +
Deficit Round Robin Router Backplane | +Cairo University | +Wiki | +
NetCoding Project Transmit Node | +? | +Download | +
Router Buffer Adaptation | +University of New South Wales | +Wiki | +
Where can I buy a NetFPGA 1G platform
+It seems that my board is broken, what should I do?
+What if I have Hardware problems with my boards?
+What if I have Software problems with my board?
+You can exchange your ideas and questions with the NetFPGA community here.
+How can I get involved with the NetFPGA project?
+How can I obtain the gateware and software package?
+Once you have used the NetFPGA, we hope that you will contribute to the project.
+You can find our Wiki here.
+The NetFPGA-1G-CML is an FPGA-based PCI Express board with Gigabit Ethernet I/O, an x4 gen2 PCIe adapter card incorporating Xilinx’s Kintex-7 325T FPGA. It is ideal for the development of highly complex, low bandwidth applications.
+Features list:
+To see the NetFPGA-1G-CML repository and Wiki you will need to register.
+Title | +Organisation | +Documentation | +
---|---|---|
Ethernet Interface Loopback Test | +CML / University of Cambridge | +Wiki | +
Reference NIC | +CML / University of Cambridge | +Wiki | +
Reference Flash | +CML / University of Cambridge | +Wiki | +
Learning CAM Switch | +CML / University of Cambridge | +Wiki | +
Learning Switch (Lite) | +CML / University of Cambridge | +Wiki | +
Reference Router | +CML / University of Cambridge | +Wiki | +
Where can I buy a NetFPGA 1G CML Platform?
+It seems that my board is broken, what should I do?
+What if I have Hardware problems with my board?
+What if I have Software problems with my board?
+You can exchange your ideas and questions with the NetFPGA CML community here.
+How can I get involved with the NetFPGA project?
+How can I obtain the gateware and software package?
+Once you have used the NetFPGA, we hope that you will contribute to the project.
+You can find our Wiki here.
+The NetFPGA SUME is an FPGA-based PCI Express board with I/O capabilities for 10 and 100 Gbps operation, an x8 gen3 PCIe adapter card incorporating Xilinx’s Virtex-7 690T FPGA. It can be used as NIC, multiport switch, firewall, test/measurement environment, and more.
+Features list:
+A full description of the board and its potential use cases is provided in the following paper:
+Noa Zilberman, Yury Audzevich, G. Adam Covington, Andrew W. Moore, 'NetFPGA SUME: Toward 100 Gbps as Research Commodity,' IEEE Micro, vol.34, no.5, pp.32,41, September-October 2014 (official version) (pdf)
+Please use this citation as the canonical reference for NetFPGA-SUME.
+To see the NetFPGA-SUME repository and Wiki you will need to register.
+Title | +Organisation | +Documentation | +
---|---|---|
Reference Switch | +University of Cambridge | +Wiki | +
Reference Switch Lite | +University of Cambridge | +Wiki | +
Reference NIC | +University of Cambridge | +Wiki | +
Reference Router | +University of Cambridge | +Wiki | +
Where can I buy a NetFPGA SUME Platform?
+It seems that my board is broken, what should I do?
+What if I have Hardware problems with my board?
+What if I have Software problems with my board?
+You can change your ideas and questions with the NetFPGA SUME community, please register here.
+How can I get involved with the NetFPGA project?
+How can I obtain the gateware and software package?
+Digilent Hardware documentation wiki about NetFPGA SUME board here.
+Once you have used the NetFPGA, we hope that you will contribute to the project.
+You can find our Wiki here.
+A partial list of publications using the NetFPGA platform.
+The links for the addresses are, where possible, doi.org links.
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