@@ -21,7 +21,7 @@ static const char *TAG = "board";
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// This is an ILO373 control chip. The display is a 2.9" grayscale EInk.
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- const uint8_t display_start_sequence [] = {
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+ const uint8_t il0373_display_start_sequence [] = {
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0x01 , 5 , 0x03 , 0x00 , 0x2b , 0x2b , 0x13 , // power setting
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0x06 , 3 , 0x17 , 0x17 , 0x17 , // booster soft start
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0x04 , DELAY , 200 , // power on and wait 200 ms
@@ -83,17 +83,121 @@ const uint8_t display_start_sequence[] = {
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0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00
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};
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- const uint8_t display_stop_sequence [] = {
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+ const uint8_t il0373_display_stop_sequence [] = {
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0x50 , 0x01 , 0x17 , // CDI Setting
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0x82 , 0x01 , 0x00 , // VCM DC to -0.1V
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0x02 , 0x00 // Power off
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};
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- const uint8_t refresh_sequence [] = {
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+ const uint8_t il0373_display_refresh_sequence [] = {
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0x12 , 0x00
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};
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+
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+ // This is an SSD1680 control chip. The display is a 2.9" grayscale EInk.
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+ const uint8_t ssd1680_display_start_sequence [] = {
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+ 0x12 , DELAY , 0x00 , 0x14 , // soft reset and wait 20ms
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+ 0x11 , 0x00 , 0x01 , 0x03 , // Ram data entry mode
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+ 0x3c , 0x00 , 0x01 , 0x03 , // border color
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+ 0x2c , 0x00 , 0x01 , 0x28 , // Set vcom voltage
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+ 0x03 , 0x00 , 0x01 , 0x17 , // Set gate voltage
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+ 0x04 , 0x00 , 0x03 , 0x41 , 0xae , 0x32 , // Set source voltage
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+ 0x4e , 0x00 , 0x01 , 0x01 , // ram x count
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+ 0x4f , 0x00 , 0x02 , 0x00 , 0x00 , // ram y count
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+ 0x01 , 0x00 , 0x03 , 0x27 , 0x01 , 0x00 , // set display size
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+ 0x32 , 0x00 , 0x99 , // Update waveforms
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+ 0x2a , 0x60 , 0x15 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , // VS L0
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+ 0x20 , 0x60 , 0x10 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , // VS L1
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+ 0x28 , 0x60 , 0x14 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , // VS L2
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+ 0x00 , 0x60 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , // VS L3
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+ 0x00 , 0x90 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , // VS L4
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+ 0x00 , 0x02 , 0x00 , 0x05 , 0x14 , 0x00 , 0x00 , // TP, SR, RP of Group0
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+ 0x1E , 0x1E , 0x00 , 0x00 , 0x00 , 0x00 , 0x01 , // TP, SR, RP of Group1
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+ 0x00 , 0x02 , 0x00 , 0x05 , 0x14 , 0x00 , 0x00 , // TP, SR, RP of Group2
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+ 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , // TP, SR, RP of Group3
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+ 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , // TP, SR, RP of Group4
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+ 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , // TP, SR, RP of Group5
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+ 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , // TP, SR, RP of Group6
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+ 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , // TP, SR, RP of Group7
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+ 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , // TP, SR, RP of Group8
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+ 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , // TP, SR, RP of Group9
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+ 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , // TP, SR, RP of Group10
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+ 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , // TP, SR, RP of Group11
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+ 0x24 , 0x22 , 0x22 , 0x22 , 0x23 , 0x32 , 0x00 , 0x00 , 0x00 , // FR, XON
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+ 0x22 , 0x00 , 0x01 , 0xc7 // display update mode
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+ };
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+
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+ const uint8_t ssd1680_display_stop_sequence [] = {
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+ 0x10 , DELAY , 0x01 , 0x01 , 0x64
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+ };
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+
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+ const uint8_t ssd1680_display_refresh_sequence [] = {
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+ 0x20 , 0x00 , 0x00
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+ };
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+
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+ static bool detect_ssd1680 (void ) {
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+ // Bitbang 4-wire SPI with a bidirectional data line to read register 0x71.
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+ // On the IL0373 it will return 0x13 or similar. On the SSD1680 it is
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+ // unsupported and will be 0xff.
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+ digitalio_digitalinout_obj_t data ;
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+ digitalio_digitalinout_obj_t clock ;
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+ digitalio_digitalinout_obj_t chip_select ;
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+ digitalio_digitalinout_obj_t data_command ;
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+ digitalio_digitalinout_obj_t reset ;
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+ data .base .type = & digitalio_digitalinout_type ;
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+ clock .base .type = & digitalio_digitalinout_type ;
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+ chip_select .base .type = & digitalio_digitalinout_type ;
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+ data_command .base .type = & digitalio_digitalinout_type ;
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+ reset .base .type = & digitalio_digitalinout_type ;
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+
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+ common_hal_digitalio_digitalinout_construct (& data , & pin_GPIO35 );
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+ common_hal_digitalio_digitalinout_construct (& clock , & pin_GPIO36 );
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+ common_hal_digitalio_digitalinout_construct (& chip_select , & pin_GPIO8 );
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+ common_hal_digitalio_digitalinout_construct (& data_command , & pin_GPIO7 );
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+ common_hal_digitalio_digitalinout_construct (& reset , & pin_GPIO6 );
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+
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+ // Set CS and DC low
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+ common_hal_digitalio_digitalinout_switch_to_output (& chip_select , false, DRIVE_MODE_PUSH_PULL );
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+ common_hal_digitalio_digitalinout_switch_to_output (& data_command , false, DRIVE_MODE_PUSH_PULL );
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+ common_hal_digitalio_digitalinout_switch_to_output (& data , false, DRIVE_MODE_PUSH_PULL );
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+ common_hal_digitalio_digitalinout_switch_to_output (& reset , true, DRIVE_MODE_PUSH_PULL );
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+ common_hal_digitalio_digitalinout_switch_to_output (& clock , false, DRIVE_MODE_PUSH_PULL );
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+
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+ uint8_t status_read = 0x71 ;
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+ for (int i = 0 ; i < 8 ; i ++ ) {
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+ common_hal_digitalio_digitalinout_set_value (& data , (status_read & (1 << (7 - i ))) != 0 );
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+ common_hal_digitalio_digitalinout_set_value (& clock , true);
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+ common_hal_digitalio_digitalinout_set_value (& clock , false);
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+ }
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+
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+ // Set DC high for data and switch to input with pull-up in case the SSD1680 doesn't send any
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+ // data back (as it should.)
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+ common_hal_digitalio_digitalinout_switch_to_input (& data , PULL_UP );
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+ common_hal_digitalio_digitalinout_set_value (& data_command , true);
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+ uint8_t status = 0 ;
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+ for (int bit = 0 ; bit < 8 ; bit ++ ) {
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+ status <<= 1 ;
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+ if (common_hal_digitalio_digitalinout_get_value (& data )) {
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+ status |= 1 ;
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+ }
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+ common_hal_digitalio_digitalinout_set_value (& clock , true);
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+ common_hal_digitalio_digitalinout_set_value (& clock , false);
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+ }
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+
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+ // Set CS high
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+ common_hal_digitalio_digitalinout_set_value (& chip_select , true);
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+
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+ common_hal_digitalio_digitalinout_deinit (& data );
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+ common_hal_digitalio_digitalinout_deinit (& clock );
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+ common_hal_digitalio_digitalinout_deinit (& chip_select );
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+ common_hal_digitalio_digitalinout_deinit (& data_command );
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+ common_hal_digitalio_digitalinout_deinit (& reset );
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+ return status == 0xff ;
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+ }
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+
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void board_init (void ) {
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+ bool is_ssd1680 = detect_ssd1680 ();
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+
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fourwire_fourwire_obj_t * bus = & allocate_display_bus ()-> fourwire_bus ;
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busio_spi_obj_t * spi = & bus -> inline_bus ;
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common_hal_busio_spi_construct (spi , & pin_GPIO36 , & pin_GPIO35 , NULL , false);
@@ -111,39 +215,76 @@ void board_init(void) {
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epaperdisplay_epaperdisplay_obj_t * display = & allocate_display ()-> epaper_display ;
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display -> base .type = & epaperdisplay_epaperdisplay_type ;
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- common_hal_epaperdisplay_epaperdisplay_construct (
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- display ,
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- bus ,
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- display_start_sequence , sizeof (display_start_sequence ),
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- 0 , // start up time
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- display_stop_sequence , sizeof (display_stop_sequence ),
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- 296 , // width
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- 128 , // height
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- 160 , // ram_width
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- 296 , // ram_height
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- 0 , // colstart
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- 0 , // rowstart
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- 270 , // rotation
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- NO_COMMAND , // set_column_window_command
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- NO_COMMAND , // set_row_window_command
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- NO_COMMAND , // set_current_column_command
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- NO_COMMAND , // set_current_row_command
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- 0x10 , // write_black_ram_command
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- false, // black_bits_inverted
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- 0x13 , // write_color_ram_command
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- false, // color_bits_inverted
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- 0x000000 , // highlight_color
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- refresh_sequence , sizeof (refresh_sequence ),
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- 1.0 , // refresh_time
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- & pin_GPIO5 , // busy_pin
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- false, // busy_state
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- 5.0 , // seconds_per_frame
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- false, // always_toggle_chip_select
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- true, // grayscale
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- false, // acep
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- false, // spectra6
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- false, // two_byte_sequence_length
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- false); // address_little_endian
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+
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+ if (is_ssd1680 ) {
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+ common_hal_epaperdisplay_epaperdisplay_construct (
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+ display ,
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+ bus ,
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+ ssd1680_display_start_sequence , sizeof (ssd1680_display_start_sequence ),
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+ 0 , // start up time
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+ ssd1680_display_stop_sequence , sizeof (ssd1680_display_stop_sequence ),
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+ 296 , // width
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+ 128 , // height
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+ 250 , // ram_width
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+ 296 , // ram_height
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+ 0 , // colstart
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+ 0 , // rowstart
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+ 270 , // rotation
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+ 0x44 , // set_column_window_command
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+ 0x45 , // set_row_window_command
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+ 0x4e , // set_current_column_command
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+ 0x4f , // set_current_row_command
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+ 0x24 , // write_black_ram_command
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+ false, // black_bits_inverted
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+ 0x26 , // write_color_ram_command
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+ false, // color_bits_inverted
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+ 0x000000 , // highlight_color
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+ ssd1680_display_refresh_sequence , sizeof (ssd1680_display_refresh_sequence ),
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+ 1.0 , // refresh_time
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+ & pin_GPIO5 , // busy_pin
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+ true, // busy_state
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+ 5.0 , // seconds_per_frame
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+ false, // always_toggle_chip_select
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+ true, // grayscale
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+ false, // acep
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+ false, // spectra6
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+ true, // two_byte_sequence_length
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+ true); // address_little_endian
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+ } else {
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+ common_hal_epaperdisplay_epaperdisplay_construct (
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+ display ,
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+ bus ,
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+ il0373_display_start_sequence , sizeof (il0373_display_start_sequence ),
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+ 0 , // start up time
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+ il0373_display_stop_sequence , sizeof (il0373_display_stop_sequence ),
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+ 296 , // width
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+ 128 , // height
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+ 160 , // ram_width
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+ 296 , // ram_height
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+ 0 , // colstart
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+ 0 , // rowstart
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+ 270 , // rotation
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+ NO_COMMAND , // set_column_window_command
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+ NO_COMMAND , // set_row_window_command
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+ NO_COMMAND , // set_current_column_command
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+ NO_COMMAND , // set_current_row_command
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+ 0x10 , // write_black_ram_command
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+ false, // black_bits_inverted
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+ 0x13 , // write_color_ram_command
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+ false, // color_bits_inverted
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+ 0x000000 , // highlight_color
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+ il0373_display_refresh_sequence , sizeof (il0373_display_refresh_sequence ),
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+ 1.0 , // refresh_time
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+ & pin_GPIO5 , // busy_pin
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+ false, // busy_state
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+ 5.0 , // seconds_per_frame
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+ false, // always_toggle_chip_select
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+ true, // grayscale
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+ false, // acep
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+ false, // spectra6
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+ false, // two_byte_sequence_length
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+ false); // address_little_endian
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+ }
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}
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bool espressif_board_reset_pin_number (gpio_num_t pin_number ) {
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