diff --git a/svd/R7FA4M1AB.svd b/svd/R7FA4M1AB.svd index 67a6ba02f..cfe51af9b 100644 --- a/svd/R7FA4M1AB.svd +++ b/svd/R7FA4M1AB.svd @@ -2213,6 +2213,65 @@ Note: MOMCR register must be set before setting MOSTP to 0. + + + HOCOCR2 + High-Speed On-Chip Oscillator Control Register 2 + 0x037 + 8 + read-write + 0x00 + 0xC7 + + + Reserved + These bits are read as 00. The write value should be 00. + 6 + 7 + read-write + + + HCFRQ1 + HOCO Frequency Setting 1 + 3 + 5 + read-write + + + 000 + 24 MHz + #000 + + + 010 + 32 MHz + #010 + + + 100 + 48 MHz + #100 + + + 101 + 64 MHz + #101 + + + others + Setting prohibited + true + + + + + Reserved + These bits are read as 000. The write value should be 000. + 0 + 2 + read-write + + MOCOCR diff --git a/svd/R7FA6M5BH.svd b/svd/R7FA6M5BH.svd index e7b13b3aa..6db539e0e 100644 --- a/svd/R7FA6M5BH.svd +++ b/svd/R7FA6M5BH.svd @@ -9869,6 +9869,53 @@ http://www.renesas.com/disclaimer \n + + + HOCOCR2 + High-Speed On-Chip Oscillator Control Register 2 + 0x037 + 8 + read-write + 0x00 + 0xFC + + + Reserved + These bits are read as 000000. The write value should be 000000. + 2 + 7 + read-write + + + HCFRQ1 + HOCO Frequency Setting 0 + 0 + 1 + read-write + + + 00 + 16 MHz + #00 + + + 01 + 18 MHz + #01 + + + 10 + 20 MHz + #10 + + + others + Setting prohibited + true + + + + MOCOCR diff --git a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h index 24f360cb0..9a8c9ddac 100644 --- a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h +++ b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h @@ -8892,7 +8892,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16145,7 +16158,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h index b923e93cc..7f7262ffc 100644 --- a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h +++ b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h @@ -7967,7 +7967,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -13697,7 +13710,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h index b7a11de8e..ca9d010f8 100644 --- a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h +++ b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h @@ -7785,7 +7785,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -13456,7 +13469,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h index 8fa45d408..c314c8a61 100644 --- a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h +++ b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h @@ -8634,7 +8634,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -14833,7 +14846,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h index 89f76d586..90ac6ea05 100644 --- a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h +++ b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h @@ -8574,7 +8574,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16004,7 +16017,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h index c3d059bc0..c30d6d644 100644 --- a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h +++ b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h @@ -9126,7 +9126,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16514,7 +16527,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h index 461f5a7df..2fdc41300 100644 --- a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h +++ b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h @@ -9563,7 +9563,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -17515,7 +17528,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h index 906511c2b..3c864be12 100644 --- a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h +++ b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h @@ -9563,7 +9563,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -17620,7 +17633,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h index 6c7ed53d6..dc7427ee9 100644 --- a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h +++ b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h @@ -8962,7 +8962,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16246,7 +16259,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h index ac3e59b90..6929433e1 100644 --- a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h +++ b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h @@ -9992,7 +9992,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -18149,7 +18162,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h index 809ff39b7..a84f60d0d 100644 --- a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h +++ b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h @@ -9763,7 +9763,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -18474,7 +18487,12 @@ typedef struct /*!< (@ 0x40060000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h index c7437f3d3..4f1ff9520 100644 --- a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h +++ b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h @@ -11744,7 +11744,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -21458,7 +21471,12 @@ typedef struct /*!< (@ 0x40060000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h index 2041059fb..8fd8ce4d2 100644 --- a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h +++ b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h @@ -14402,7 +14402,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -25093,7 +25106,12 @@ typedef struct /*!< (@ 0x40060000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h index c326adc07..f8dbe7906 100644 --- a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h +++ b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h @@ -10326,7 +10326,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -20010,7 +20023,12 @@ typedef struct /*!< (@ 0x40111000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h index b1bf25540..7994941cd 100644 --- a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h +++ b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h @@ -13124,7 +13124,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -24790,7 +24803,12 @@ typedef struct /*!< (@ 0x40111000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h index 8ad5235aa..aa001b61c 100644 --- a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h +++ b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h @@ -7943,7 +7943,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -13787,7 +13800,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h index 291e667b6..5fc5e5a86 100644 --- a/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h +++ b/variants/MINIMA/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h @@ -12066,7 +12066,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -26456,7 +26469,12 @@ typedef struct /*!< (@ 0x40021000) R_TFU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h index 24f360cb0..9a8c9ddac 100644 --- a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h +++ b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h @@ -8892,7 +8892,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16145,7 +16158,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h index b923e93cc..7f7262ffc 100644 --- a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h +++ b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h @@ -7967,7 +7967,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -13697,7 +13710,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h index b7a11de8e..ca9d010f8 100644 --- a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h +++ b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h @@ -7785,7 +7785,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -13456,7 +13469,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h index 8fa45d408..c314c8a61 100644 --- a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h +++ b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h @@ -8634,7 +8634,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -14833,7 +14846,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h index 89f76d586..90ac6ea05 100644 --- a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h +++ b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h @@ -8574,7 +8574,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16004,7 +16017,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h index c3d059bc0..c30d6d644 100644 --- a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h +++ b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h @@ -9126,7 +9126,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16514,7 +16527,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h index 461f5a7df..2fdc41300 100644 --- a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h +++ b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h @@ -9563,7 +9563,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -17515,7 +17528,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h index 906511c2b..3c864be12 100644 --- a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h +++ b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h @@ -9563,7 +9563,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -17620,7 +17633,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h index 6c7ed53d6..dc7427ee9 100644 --- a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h +++ b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h @@ -8962,7 +8962,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16246,7 +16259,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h index ac3e59b90..6929433e1 100644 --- a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h +++ b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h @@ -9992,7 +9992,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -18149,7 +18162,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h index 809ff39b7..a84f60d0d 100644 --- a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h +++ b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h @@ -9763,7 +9763,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -18474,7 +18487,12 @@ typedef struct /*!< (@ 0x40060000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h index c7437f3d3..4f1ff9520 100644 --- a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h +++ b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h @@ -11744,7 +11744,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -21458,7 +21471,12 @@ typedef struct /*!< (@ 0x40060000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h index 2041059fb..8fd8ce4d2 100644 --- a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h +++ b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h @@ -14402,7 +14402,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -25093,7 +25106,12 @@ typedef struct /*!< (@ 0x40060000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h index c326adc07..f8dbe7906 100644 --- a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h +++ b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h @@ -10326,7 +10326,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -20010,7 +20023,12 @@ typedef struct /*!< (@ 0x40111000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h index b1bf25540..7994941cd 100644 --- a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h +++ b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h @@ -13124,7 +13124,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -24790,7 +24803,12 @@ typedef struct /*!< (@ 0x40111000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h index 8ad5235aa..aa001b61c 100644 --- a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h +++ b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h @@ -7943,7 +7943,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -13787,7 +13800,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h index 291e667b6..5fc5e5a86 100644 --- a/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h +++ b/variants/MUXTO/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h @@ -12066,7 +12066,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -26456,7 +26469,12 @@ typedef struct /*!< (@ 0x40021000) R_TFU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h index 24f360cb0..9a8c9ddac 100644 --- a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h +++ b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h @@ -8892,7 +8892,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16145,7 +16158,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h index b923e93cc..7f7262ffc 100644 --- a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h +++ b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h @@ -7967,7 +7967,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -13697,7 +13710,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h index b7a11de8e..ca9d010f8 100644 --- a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h +++ b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h @@ -7785,7 +7785,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -13456,7 +13469,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h index 8fa45d408..c314c8a61 100644 --- a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h +++ b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h @@ -8634,7 +8634,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -14833,7 +14846,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h index 89f76d586..90ac6ea05 100644 --- a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h +++ b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h @@ -8574,7 +8574,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16004,7 +16017,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h index c3d059bc0..c30d6d644 100644 --- a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h +++ b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h @@ -9126,7 +9126,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16514,7 +16527,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h index 461f5a7df..2fdc41300 100644 --- a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h +++ b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h @@ -9563,7 +9563,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -17515,7 +17528,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h index 906511c2b..3c864be12 100644 --- a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h +++ b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h @@ -9563,7 +9563,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -17620,7 +17633,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h index 6c7ed53d6..dc7427ee9 100644 --- a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h +++ b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h @@ -8962,7 +8962,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16246,7 +16259,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h index ac3e59b90..6929433e1 100644 --- a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h +++ b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h @@ -9992,7 +9992,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -18149,7 +18162,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h index 809ff39b7..a84f60d0d 100644 --- a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h +++ b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h @@ -9763,7 +9763,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -18474,7 +18487,12 @@ typedef struct /*!< (@ 0x40060000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h index c7437f3d3..4f1ff9520 100644 --- a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h +++ b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h @@ -11744,7 +11744,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -21458,7 +21471,12 @@ typedef struct /*!< (@ 0x40060000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h index 2041059fb..8fd8ce4d2 100644 --- a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h +++ b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h @@ -14402,7 +14402,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -25093,7 +25106,12 @@ typedef struct /*!< (@ 0x40060000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h index c326adc07..f8dbe7906 100644 --- a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h +++ b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h @@ -10326,7 +10326,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -20010,7 +20023,12 @@ typedef struct /*!< (@ 0x40111000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h index b1bf25540..7994941cd 100644 --- a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h +++ b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h @@ -13124,7 +13124,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -24790,7 +24803,12 @@ typedef struct /*!< (@ 0x40111000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h index 8ad5235aa..aa001b61c 100644 --- a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h +++ b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h @@ -7943,7 +7943,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -13787,7 +13800,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h index 291e667b6..5fc5e5a86 100644 --- a/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h +++ b/variants/OPTA_ANALOG/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h @@ -12066,7 +12066,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -26456,7 +26469,12 @@ typedef struct /*!< (@ 0x40021000) R_TFU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h index 24f360cb0..9a8c9ddac 100644 --- a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h +++ b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h @@ -8892,7 +8892,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16145,7 +16158,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h index b923e93cc..7f7262ffc 100644 --- a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h +++ b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h @@ -7967,7 +7967,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -13697,7 +13710,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h index b7a11de8e..ca9d010f8 100644 --- a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h +++ b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h @@ -7785,7 +7785,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -13456,7 +13469,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h index 8fa45d408..c314c8a61 100644 --- a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h +++ b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h @@ -8634,7 +8634,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -14833,7 +14846,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h index 89f76d586..90ac6ea05 100644 --- a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h +++ b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h @@ -8574,7 +8574,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16004,7 +16017,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h index c3d059bc0..c30d6d644 100644 --- a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h +++ b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h @@ -9126,7 +9126,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16514,7 +16527,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h index 461f5a7df..2fdc41300 100644 --- a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h +++ b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h @@ -9563,7 +9563,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -17515,7 +17528,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h index 906511c2b..3c864be12 100644 --- a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h +++ b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h @@ -9563,7 +9563,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -17620,7 +17633,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h index 6c7ed53d6..dc7427ee9 100644 --- a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h +++ b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h @@ -8962,7 +8962,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16246,7 +16259,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h index ac3e59b90..6929433e1 100644 --- a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h +++ b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h @@ -9992,7 +9992,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -18149,7 +18162,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h index 809ff39b7..a84f60d0d 100644 --- a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h +++ b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h @@ -9763,7 +9763,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -18474,7 +18487,12 @@ typedef struct /*!< (@ 0x40060000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h index c7437f3d3..4f1ff9520 100644 --- a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h +++ b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h @@ -11744,7 +11744,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -21458,7 +21471,12 @@ typedef struct /*!< (@ 0x40060000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h index 2041059fb..8fd8ce4d2 100644 --- a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h +++ b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h @@ -14402,7 +14402,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -25093,7 +25106,12 @@ typedef struct /*!< (@ 0x40060000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h index c326adc07..f8dbe7906 100644 --- a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h +++ b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h @@ -10326,7 +10326,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -20010,7 +20023,12 @@ typedef struct /*!< (@ 0x40111000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h index b1bf25540..7994941cd 100644 --- a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h +++ b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h @@ -13124,7 +13124,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -24790,7 +24803,12 @@ typedef struct /*!< (@ 0x40111000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h index 8ad5235aa..aa001b61c 100644 --- a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h +++ b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h @@ -7943,7 +7943,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -13787,7 +13800,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h index 291e667b6..5fc5e5a86 100644 --- a/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h +++ b/variants/OPTA_DIGITAL/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h @@ -12066,7 +12066,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -26456,7 +26469,12 @@ typedef struct /*!< (@ 0x40021000) R_TFU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h index 24f360cb0..9a8c9ddac 100644 --- a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h +++ b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h @@ -8892,7 +8892,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16145,7 +16158,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h index b923e93cc..7f7262ffc 100644 --- a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h +++ b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h @@ -7967,7 +7967,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -13697,7 +13710,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h index b7a11de8e..ca9d010f8 100644 --- a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h +++ b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h @@ -7785,7 +7785,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -13456,7 +13469,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h index 8fa45d408..c314c8a61 100644 --- a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h +++ b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h @@ -8634,7 +8634,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -14833,7 +14846,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h index 89f76d586..90ac6ea05 100644 --- a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h +++ b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h @@ -8574,7 +8574,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16004,7 +16017,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h index c3d059bc0..c30d6d644 100644 --- a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h +++ b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h @@ -9126,7 +9126,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16514,7 +16527,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h index 461f5a7df..2fdc41300 100644 --- a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h +++ b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h @@ -9563,7 +9563,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -17515,7 +17528,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h index 906511c2b..3c864be12 100644 --- a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h +++ b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h @@ -9563,7 +9563,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -17620,7 +17633,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h index 6c7ed53d6..dc7427ee9 100644 --- a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h +++ b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h @@ -8962,7 +8962,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16246,7 +16259,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h index ac3e59b90..6929433e1 100644 --- a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h +++ b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h @@ -9992,7 +9992,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -18149,7 +18162,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h index 809ff39b7..a84f60d0d 100644 --- a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h +++ b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h @@ -9763,7 +9763,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -18474,7 +18487,12 @@ typedef struct /*!< (@ 0x40060000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h index c7437f3d3..4f1ff9520 100644 --- a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h +++ b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h @@ -11744,7 +11744,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -21458,7 +21471,12 @@ typedef struct /*!< (@ 0x40060000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h index 2041059fb..8fd8ce4d2 100644 --- a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h +++ b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h @@ -14402,7 +14402,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -25093,7 +25106,12 @@ typedef struct /*!< (@ 0x40060000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h index c326adc07..f8dbe7906 100644 --- a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h +++ b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h @@ -10326,7 +10326,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -20010,7 +20023,12 @@ typedef struct /*!< (@ 0x40111000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h index b1bf25540..7994941cd 100644 --- a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h +++ b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h @@ -13124,7 +13124,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -24790,7 +24803,12 @@ typedef struct /*!< (@ 0x40111000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h index 8ad5235aa..aa001b61c 100644 --- a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h +++ b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h @@ -7943,7 +7943,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -13787,7 +13800,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h index 291e667b6..5fc5e5a86 100644 --- a/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h +++ b/variants/PORTENTA_C33/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h @@ -12066,7 +12066,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -26456,7 +26469,12 @@ typedef struct /*!< (@ 0x40021000) R_TFU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h index 24f360cb0..9a8c9ddac 100644 --- a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h +++ b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2A1AB.h @@ -8892,7 +8892,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16145,7 +16158,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h index b923e93cc..7f7262ffc 100644 --- a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h +++ b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E1A9.h @@ -7967,7 +7967,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -13697,7 +13710,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h index b7a11de8e..ca9d010f8 100644 --- a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h +++ b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2E2A7.h @@ -7785,7 +7785,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -13456,7 +13469,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h index 8fa45d408..c314c8a61 100644 --- a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h +++ b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h @@ -8634,7 +8634,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -14833,7 +14846,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h index 89f76d586..90ac6ea05 100644 --- a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h +++ b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h @@ -8574,7 +8574,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16004,7 +16017,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h index c3d059bc0..c30d6d644 100644 --- a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h +++ b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h @@ -9126,7 +9126,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16514,7 +16527,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h index 461f5a7df..2fdc41300 100644 --- a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h +++ b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M2AD.h @@ -9563,7 +9563,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -17515,7 +17528,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h index 906511c2b..3c864be12 100644 --- a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h +++ b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M3AF.h @@ -9563,7 +9563,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -17620,7 +17633,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h index 6c7ed53d6..dc7427ee9 100644 --- a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h +++ b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4W1AD.h @@ -8962,7 +8962,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -16246,7 +16259,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h index ac3e59b90..6929433e1 100644 --- a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h +++ b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6E10F.h @@ -9992,7 +9992,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -18149,7 +18162,12 @@ typedef struct /*!< (@ 0x40008000) R_CPSCU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h index 809ff39b7..a84f60d0d 100644 --- a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h +++ b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M1AD.h @@ -9763,7 +9763,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -18474,7 +18487,12 @@ typedef struct /*!< (@ 0x40060000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h index c7437f3d3..4f1ff9520 100644 --- a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h +++ b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M2AF.h @@ -11744,7 +11744,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -21458,7 +21471,12 @@ typedef struct /*!< (@ 0x40060000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h index 2041059fb..8fd8ce4d2 100644 --- a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h +++ b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M3AH.h @@ -14402,7 +14402,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -25093,7 +25106,12 @@ typedef struct /*!< (@ 0x40060000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h index c326adc07..f8dbe7906 100644 --- a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h +++ b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M4AF.h @@ -10326,7 +10326,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -20010,7 +20023,12 @@ typedef struct /*!< (@ 0x40111000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h index b1bf25540..7994941cd 100644 --- a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h +++ b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6M5BH.h @@ -13124,7 +13124,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -24790,7 +24803,12 @@ typedef struct /*!< (@ 0x40111000) R_USB_HS0 Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h index 8ad5235aa..aa001b61c 100644 --- a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h +++ b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T1AD.h @@ -7943,7 +7943,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -13787,7 +13800,12 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ diff --git a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h index 291e667b6..5fc5e5a86 100644 --- a/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h +++ b/variants/UNOWIFIR4/includes/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA6T2BD.h @@ -12066,7 +12066,20 @@ typedef struct /*!< (@ 0x4001E000) R_SYSTEM Structure uint8_t : 7; } HOCOCR_b; }; - __IM uint8_t RESERVED8; + + union + { + __IOM uint8_t HOCOCR2; /*!< (@ 0x00000037) High-Speed On-Chip Oscillator Control Register + * 2 */ + + struct + { + __IOM uint8_t HCFRQ0 : 2; /*!< [1..0] HOCO Frequency Setting 0 */ + uint8_t : 1; + __IOM uint8_t HCFRQ1 : 3; /*!< [5..3] HOCO Frequency Setting 1 */ + uint8_t : 2; + } HOCOCR2_b; + }; union { @@ -26456,7 +26469,12 @@ typedef struct /*!< (@ 0x40021000) R_TFU Structure /* ======================================================== HOCOCR ========================================================= */ #define R_SYSTEM_HOCOCR_HCSTP_Pos (0UL) /*!< HCSTP (Bit 0) */ #define R_SYSTEM_HOCOCR_HCSTP_Msk (0x1UL) /*!< HCSTP (Bitfield-Mask: 0x01) */ -/* ======================================================== MOCOCR ========================================================= */ +/* ======================================================== HOCOCR2 ======================================================== */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Pos (0UL) /*!< HCFRQ0 (Bit 0) */ + #define R_SYSTEM_HOCOCR2_HCFRQ0_Msk (0x3UL) /*!< HCFRQ0 (Bitfield-Mask: 0x03) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Pos (3UL) /*!< HCFRQ1 (Bit 3) */ + #define R_SYSTEM_HOCOCR2_HCFRQ1_Msk (0x38UL) /*!< HCFRQ1 (Bitfield-Mask: 0x07) */ + /* ======================================================== MOCOCR ========================================================= */ #define R_SYSTEM_MOCOCR_MCSTP_Pos (0UL) /*!< MCSTP (Bit 0) */ #define R_SYSTEM_MOCOCR_MCSTP_Msk (0x1UL) /*!< MCSTP (Bitfield-Mask: 0x01) */ /* ======================================================== FLLCR1 ========================================================= */ pFad - Phonifier reborn

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