temp: fix display/camera coexistence

facchinm · facchinm · commit dc22eb97e8ca · 2025-03-06T10:30:44.000+01:00
diff --git a/loader/fixups.c b/loader/fixups.c
@@ -77,45 +77,27 @@ SYS_INIT(camera_ext_clock_enable, POST_KERNEL, CONFIG_CLOCK_CONTROL_PWM_INIT_PRI
 #include <zephyr/devicetree.h>
 #include <zephyr/multi_heap/shared_multi_heap.h>
 
-struct memory_region_t {
-	uintptr_t dt_addr;
-	size_t dt_size;
-	const char *dt_name;
-};
-
-#define _BUILD_MEM_REGION(node_id)      \
-	{ .dt_addr = DT_REG_ADDR(node_id),  \
-      .dt_size = DT_REG_SIZE(node_id),  \
-      .dt_name = DT_PROP(node_id, zephyr_memory_region) \
-    },
-
-int smh_init(void)
-{
+__stm32_sdram1_section static uint8_t __aligned(32) smh_pool[4*1024*1024];
+
+int smh_init(void) {
     int ret = 0;
     ret = shared_multi_heap_pool_init();
     if (ret != 0) {
         return ret;
     }
 
-    const struct memory_region_t regions[] = {
-        DT_FOREACH_STATUS_OKAY(zephyr_memory_region, _BUILD_MEM_REGION)
+    struct shared_multi_heap_region smh_sdram = {
+        .addr = (uintptr_t) smh_pool,
+        .size = sizeof(smh_pool),
+        .attr = SMH_REG_ATTR_EXTERNAL,
     };
 
-    for (size_t i=0; i<ARRAY_SIZE(regions); i++) {
-        if (!strncmp("SDRAM", regions[i].dt_name, 5)) {
-            struct shared_multi_heap_region smh_sdram = {
-                .addr = regions[i].dt_addr,
-                .size = regions[i].dt_size,
-                .attr = SMH_REG_ATTR_EXTERNAL,
-            };
-            ret = shared_multi_heap_add(&smh_sdram, NULL);
-            if (ret != 0) {
-                return ret;
-            }
-        }
+    ret = shared_multi_heap_add(&smh_sdram, NULL);
+    if (ret != 0) {
+        return ret;
     }
 	return 0;
 }
 
 SYS_INIT(smh_init, POST_KERNEL, CONFIG_CLOCK_CONTROL_PWM_INIT_PRIORITY);
-#endif
+#endif
