Skip to content

Commit cf56e09

Browse files
committed
Add Makerdiary iMX RT1011 Nano Kit.
Signed-off-by: Zelin Cai <zelin@makerdiary.com>
1 parent 9f0ca3b commit cf56e09

File tree

6 files changed

+349
-0
lines changed

6 files changed

+349
-0
lines changed
Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,26 @@
1+
# Makerdiary iMX RT1011 Nano Kit
2+
3+
## Introduction
4+
5+
[iMX RT1011 Nano Kit](https://makerdiary.com/products/imxrt1011-nanokit) is a small, high-performing prototyping kit designed around NXP's iMX RT1011 Crossover MCU based on the Arm Cortex-M7 core, which operates at speeds up to 500 MHz to provide high CPU performance and best real-time response. It has 128 KB on-chip RAM that can be flexibly configured as TCM or general-purpose as well as numerous peripherals including high speed USB, UART, SPI, I2C, SAI, PWM, GPIO, ADC and etc to support a wide range of applications.
6+
7+
The design provides external 128 Mbit QSPI flash with XIP support, flexible power management, programmable LED and Button, easy-to-use form factor with USB-C and dual-row 40 pins in DIP/SMT type, including up to 33 multi-function GPIO pins (15 can be configured as ADC inputs) and Serial Wire Debug (SWD) port. Available with loose or pre-soldered headers, for even more flexibility in your projects.
8+
9+
It's shipped with UF2 Bootloader for easy firmware update, which means you can easily install CircuitPython firmware by just copying the .uf2-format images to the flash drive without using an external programmer.
10+
11+
Refer to [iMX RT1011 Nano Kit Documentation](https://wiki.makerdiary.com/imxrt1011-nanokit/) for more details.
12+
13+
![](https://wiki.makerdiary.com/imxrt1011-nanokit/assets/images/imxrt1011-nanokit-hero.png)
14+
15+
## Hardware Diagram
16+
17+
The following figure illustrates the iMX RT1011 Nano Kit hardware diagram. The design is available with loose or pre-soldered pin headers. For more details, refer to the [Hardware description](https://wiki.makerdiary.com/imxrt1011-nanokit/hardware/) section.
18+
19+
[![](https://wiki.makerdiary.com/imxrt1011-nanokit/assets/images/imxrt1011-nanokit-pinout_reva.png)](https://wiki.makerdiary.com/imxrt1011-nanokit/assets/attachments/imxrt1011-nanokit-pinout_reva.pdf)
20+
21+
## Get Involved
22+
23+
We think the best way to learn is by doing. And to help you get started, we have provided an extensive set of documentation. Find the details below:
24+
25+
- [Getting started with CircuitPython](https://wiki.makerdiary.com/imxrt1011-nanokit/guides/python/getting-started/)
26+
- [CircuitPython Samples for iMX RT1011 Nano Kit](https://wiki.makerdiary.com/imxrt1011-nanokit/guides/python/samples/)
Lines changed: 45 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,45 @@
1+
// This file is part of the CircuitPython project: https://circuitpython.org
2+
//
3+
// SPDX-FileCopyrightText: Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
4+
// SPDX-FileCopyrightText: Copyright (c) 2019 Artur Pacholec
5+
// SPDX-FileCopyrightText: Copyright (c) 2024 Makerdiary
6+
//
7+
// SPDX-License-Identifier: MIT
8+
9+
#include "supervisor/board.h"
10+
#include "shared-bindings/microcontroller/Pin.h"
11+
12+
// These pins should never ever be reset; doing so could interfere with basic operation.
13+
// Used in common-hal/microcontroller/Pin.c
14+
const mcu_pin_obj_t *mimxrt10xx_reset_forbidden_pins[] = {
15+
// SWD Pins
16+
&pin_GPIO_AD_13,// SWDIO
17+
&pin_GPIO_AD_12,// SWCLK
18+
19+
// FLEX flash
20+
&pin_GPIO_SD_12,
21+
&pin_GPIO_SD_11,
22+
&pin_GPIO_SD_10,
23+
&pin_GPIO_SD_09,
24+
&pin_GPIO_SD_08,
25+
&pin_GPIO_SD_07,
26+
&pin_GPIO_SD_06,
27+
NULL, // Must end in NULL.
28+
};
29+
30+
// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here.
31+
32+
bool mimxrt10xx_board_reset_pin_number(const mcu_pin_obj_t *pin) {
33+
#if CIRCUITPY_SWO_TRACE
34+
if (pin == &pin_GPIO_AD_09) {
35+
IOMUXC_SetPinMux( /* Add these lines*/
36+
IOMUXC_GPIO_AD_09_ARM_TRACE_SWO,
37+
0U);
38+
IOMUXC_SetPinConfig( /* Add these lines*/
39+
IOMUXC_GPIO_AD_09_ARM_TRACE_SWO,
40+
0x00F9U);
41+
return true;
42+
}
43+
#endif
44+
return false;
45+
}
Lines changed: 153 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,153 @@
1+
/*
2+
* Copyright 2017 NXP
3+
* All rights reserved.
4+
*
5+
* SPDX-License-Identifier: BSD-3-Clause
6+
*/
7+
8+
#include "boards/flash_config.h"
9+
10+
#include "xip/fsl_flexspi_nor_boot.h"
11+
12+
// Config for W25Q128JV with QSPI routed.
13+
__attribute__((section(".boot_hdr.conf")))
14+
const flexspi_nor_config_t qspiflash_config = {
15+
.pageSize = 256u,
16+
.sectorSize = 4u * 1024u,
17+
.ipcmdSerialClkFreq = kFLEXSPISerialClk_133MHz,
18+
.blockSize = 0x00010000,
19+
.isUniformBlockSize = false,
20+
.memConfig =
21+
{
22+
.tag = FLEXSPI_CFG_BLK_TAG,
23+
.version = FLEXSPI_CFG_BLK_VERSION,
24+
.readSampleClkSrc = kFLEXSPIReadSampleClk_LoopbackFromSckPad,
25+
.csHoldTime = 3u,
26+
.csSetupTime = 3u,
27+
28+
.busyOffset = 0u, // Status bit 0 indicates busy.
29+
.busyBitPolarity = 0u, // Busy when the bit is 1.
30+
31+
.deviceModeCfgEnable = 1u,
32+
.deviceModeType = kDeviceConfigCmdType_QuadEnable,
33+
.deviceModeSeq = {
34+
.seqId = 4u,
35+
.seqNum = 1u,
36+
},
37+
.deviceModeArg = 0x0200,
38+
.configCmdEnable = 1u,
39+
.configModeType[0] = kDeviceConfigCmdType_Generic,
40+
.configCmdSeqs[0] = {
41+
.seqId = 2u,
42+
.seqNum = 1u,
43+
},
44+
.deviceType = kFLEXSPIDeviceType_SerialNOR,
45+
.sflashPadType = kSerialFlash_4Pads,
46+
.serialClkFreq = kFLEXSPISerialClk_133MHz,
47+
.sflashA1Size = FLASH_SIZE,
48+
.lookupTable =
49+
{
50+
// FSL_ROM_FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1)
51+
// The high 16 bits is command 1 and the low are command 0.
52+
// Within a command, the top 6 bits are the opcode, the next two are the number
53+
// of pads and then last byte is the operand. The operand's meaning changes
54+
// per opcode.
55+
56+
// Indices with ROM should always have the same function because the ROM
57+
// bootloader uses it.
58+
59+
// 0: ROM: Read LUTs
60+
// Quad version
61+
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB /* the command to send */,
62+
RADDR_SDR, FLEXSPI_4PAD, 24 /* bits to transmit */),
63+
FSL_ROM_FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 6 /* 6 dummy cycles, 2 for M7-0 and 4 dummy */,
64+
READ_SDR, FLEXSPI_4PAD, 0x04),
65+
// Single fast read version, good for debugging.
66+
// FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x0B /* the command to send */,
67+
// RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */),
68+
// FSL_ROM_FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_1PAD, 8 /* 8 dummy clocks */,
69+
// READ_SDR, FLEXSPI_1PAD, 0x04),
70+
TWO_EMPTY_STEPS,
71+
TWO_EMPTY_STEPS),
72+
73+
// 1: ROM: Read status
74+
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05 /* the command to send */,
75+
READ_SDR, FLEXSPI_1PAD, 0x02),
76+
TWO_EMPTY_STEPS,
77+
TWO_EMPTY_STEPS,
78+
TWO_EMPTY_STEPS),
79+
80+
// 2: Empty
81+
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x35 /* the command to send */,
82+
DUMMY_SDR, FLEXSPI_1PAD, 8),
83+
TWO_EMPTY_STEPS,
84+
TWO_EMPTY_STEPS,
85+
TWO_EMPTY_STEPS),
86+
87+
// 3: ROM: Write Enable
88+
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06 /* the command to send */,
89+
STOP, FLEXSPI_1PAD, 0x00),
90+
TWO_EMPTY_STEPS,
91+
TWO_EMPTY_STEPS,
92+
TWO_EMPTY_STEPS),
93+
94+
// 4: Config: Write Status
95+
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x01 /* the command to send */,
96+
WRITE_SDR, FLEXSPI_1PAD, 0x02),
97+
TWO_EMPTY_STEPS,
98+
TWO_EMPTY_STEPS,
99+
TWO_EMPTY_STEPS),
100+
101+
// 5: ROM: Erase Sector
102+
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20 /* the command to send */,
103+
RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */),
104+
TWO_EMPTY_STEPS,
105+
TWO_EMPTY_STEPS,
106+
TWO_EMPTY_STEPS),
107+
108+
// 6: Empty
109+
EMPTY_SEQUENCE,
110+
111+
// 7: Empty
112+
EMPTY_SEQUENCE,
113+
114+
// 8: Block Erase
115+
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8 /* the command to send */,
116+
RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */),
117+
TWO_EMPTY_STEPS,
118+
TWO_EMPTY_STEPS,
119+
TWO_EMPTY_STEPS),
120+
121+
// 9: ROM: Page program
122+
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02 /* the command to send */,
123+
RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */),
124+
125+
FSL_ROM_FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04 /* data out */,
126+
STOP, FLEXSPI_1PAD, 0),
127+
TWO_EMPTY_STEPS,
128+
TWO_EMPTY_STEPS),
129+
130+
// 10: Empty
131+
EMPTY_SEQUENCE,
132+
133+
// 11: ROM: Chip erase
134+
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60 /* the command to send */,
135+
STOP, FLEXSPI_1PAD, 0),
136+
TWO_EMPTY_STEPS,
137+
TWO_EMPTY_STEPS,
138+
TWO_EMPTY_STEPS),
139+
140+
// 12: Empty
141+
EMPTY_SEQUENCE,
142+
143+
// 13: ROM: Read SFDP
144+
EMPTY_SEQUENCE,
145+
146+
// 14: ROM: Restore no cmd
147+
EMPTY_SEQUENCE,
148+
149+
// 15: ROM: Dummy
150+
EMPTY_SEQUENCE
151+
},
152+
},
153+
};
Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,30 @@
1+
// This file is part of the CircuitPython project: https://circuitpython.org
2+
//
3+
// SPDX-FileCopyrightText: Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
4+
// SPDX-FileCopyrightText: Copyright (c) 2019 Artur Pacholec
5+
// SPDX-FileCopyrightText: Copyright (c) 2024 Makerdiary
6+
//
7+
// SPDX-License-Identifier: MIT
8+
9+
#pragma once
10+
11+
#define MICROPY_HW_BOARD_NAME "iMX RT1011 Nano Kit"
12+
#define MICROPY_HW_MCU_NAME "IMXRT1011DAE5A"
13+
14+
#define MICROPY_HW_NEOPIXEL (&pin_GPIO_00)
15+
16+
// If you change this, then make sure to update the linker scripts as well to
17+
// make sure you don't overwrite code
18+
#define CIRCUITPY_INTERNAL_NVM_SIZE 0
19+
20+
#define BOARD_FLASH_SIZE (16 * 1024 * 1024)
21+
22+
#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_02)
23+
#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_01)
24+
25+
#define DEFAULT_SPI_BUS_SCK (&pin_GPIO_AD_06)
26+
#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_AD_04)
27+
#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_AD_03)
28+
29+
#define DEFAULT_UART_BUS_RX (&pin_GPIO_09)
30+
#define DEFAULT_UART_BUS_TX (&pin_GPIO_10)
Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,12 @@
1+
USB_VID = 0x2886
2+
USB_PID = 0xF004
3+
USB_PRODUCT = "iMX RT1011 Nano Kit"
4+
USB_MANUFACTURER = "Makerdiary"
5+
6+
CHIP_VARIANT = MIMXRT1011DAE5A
7+
CHIP_FAMILY = MIMXRT1011
8+
FLASH = W25Q128JV
9+
10+
# Include these Python libraries in firmware.
11+
FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel
12+
FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_HID
Lines changed: 83 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,83 @@
1+
// This file is part of the CircuitPython project: https://circuitpython.org
2+
//
3+
// SPDX-FileCopyrightText: Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
4+
// SPDX-FileCopyrightText: Copyright (c) 2019 Artur Pacholec
5+
// SPDX-FileCopyrightText: Copyright (c) 2024 Makerdiary
6+
//
7+
// SPDX-License-Identifier: MIT
8+
9+
#include "shared-bindings/board/__init__.h"
10+
11+
#include "supervisor/board.h"
12+
13+
static const mp_rom_map_elem_t board_module_globals_table[] = {
14+
CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
15+
16+
// Analog
17+
{ MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_00) },
18+
{ MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_01) },
19+
{ MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_02) },
20+
{ MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_03) },
21+
{ MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_04) },
22+
{ MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_05) },
23+
{ MP_OBJ_NEW_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_GPIO_AD_06) },
24+
{ MP_OBJ_NEW_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_GPIO_AD_07) },
25+
{ MP_OBJ_NEW_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_GPIO_AD_08) },
26+
{ MP_OBJ_NEW_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_GPIO_AD_09) },
27+
{ MP_OBJ_NEW_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_GPIO_AD_10) },
28+
{ MP_OBJ_NEW_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_GPIO_AD_11) },
29+
{ MP_OBJ_NEW_QSTR(MP_QSTR_A14), MP_ROM_PTR(&pin_GPIO_AD_14) },
30+
31+
// Digital
32+
{ MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_00) },
33+
{ MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_01) },
34+
{ MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_02) },
35+
{ MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_03) },
36+
{ MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_04) },
37+
{ MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_05) },
38+
{ MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_06) },
39+
{ MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO_07) },
40+
{ MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO_08) },
41+
{ MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_09) },
42+
{ MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_10) },
43+
{ MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_11) },
44+
{ MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_12) },
45+
{ MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_13) },
46+
{ MP_OBJ_NEW_QSTR(MP_QSTR_SD0), MP_ROM_PTR(&pin_GPIO_SD_00) },
47+
{ MP_OBJ_NEW_QSTR(MP_QSTR_SD1), MP_ROM_PTR(&pin_GPIO_SD_01) },
48+
{ MP_OBJ_NEW_QSTR(MP_QSTR_SD2), MP_ROM_PTR(&pin_GPIO_SD_02) },
49+
{ MP_OBJ_NEW_QSTR(MP_QSTR_SD3), MP_ROM_PTR(&pin_GPIO_SD_03) },
50+
{ MP_OBJ_NEW_QSTR(MP_QSTR_SD4), MP_ROM_PTR(&pin_GPIO_SD_04) },
51+
{ MP_OBJ_NEW_QSTR(MP_QSTR_SD5), MP_ROM_PTR(&pin_GPIO_SD_05) },
52+
{ MP_OBJ_NEW_QSTR(MP_QSTR_SD13), MP_ROM_PTR(&pin_GPIO_SD_13) },
53+
54+
{ MP_OBJ_NEW_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO_SD_04) },
55+
{ MP_OBJ_NEW_QSTR(MP_QSTR_USR_BTN), MP_ROM_PTR(&pin_GPIO_SD_03) },
56+
{ MP_OBJ_NEW_QSTR(MP_QSTR_DCDC_MODE), MP_ROM_PTR(&pin_GPIO_SD_13) },
57+
58+
// SPI
59+
{ MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO_AD_06) },
60+
{ MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO_AD_03) },
61+
{ MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO_AD_04) },
62+
63+
// I2C
64+
{ MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_01) },
65+
{ MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_02) },
66+
67+
{ MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO_00) },
68+
69+
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
70+
{ MP_ROM_QSTR(MP_QSTR_STEMMA_I2C), MP_ROM_PTR(&board_i2c_obj) },
71+
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
72+
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
73+
74+
{ MP_ROM_QSTR(MP_QSTR_I2S_WORD_SELECT), MP_ROM_PTR(&pin_GPIO_06) },
75+
{ MP_ROM_QSTR(MP_QSTR_I2S_WSEL), MP_ROM_PTR(&pin_GPIO_06) },
76+
77+
{ MP_ROM_QSTR(MP_QSTR_I2S_BIT_CLOCK), MP_ROM_PTR(&pin_GPIO_07) },
78+
{ MP_ROM_QSTR(MP_QSTR_I2S_BCLK), MP_ROM_PTR(&pin_GPIO_07) },
79+
80+
{ MP_ROM_QSTR(MP_QSTR_I2S_DATA), MP_ROM_PTR(&pin_GPIO_04) },
81+
{ MP_ROM_QSTR(MP_QSTR_I2S_DOUT), MP_ROM_PTR(&pin_GPIO_04) },
82+
};
83+
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);

0 commit comments

Comments
 (0)
pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy