From c8f85707eb3c04a6f74cd0acd76d27e5acdd263e Mon Sep 17 00:00:00 2001 From: me-no-dev Date: Tue, 21 Jan 2025 17:16:51 +0200 Subject: [PATCH 01/11] Initial changes for IDF v5.5 and ESP32-C5 --- .github/workflows/push.yml | 2 +- configs/builds.json | 16 +++++++++++- configs/defconfig.esp32c5 | 51 ++++++++++++++++++++++++++++++++++++++ tools/config.sh | 4 +-- 4 files changed, 69 insertions(+), 4 deletions(-) create mode 100644 configs/defconfig.esp32c5 diff --git a/.github/workflows/push.yml b/.github/workflows/push.yml index 95610c403..d5beb6212 100644 --- a/.github/workflows/push.yml +++ b/.github/workflows/push.yml @@ -25,7 +25,7 @@ jobs: runs-on: ubuntu-latest strategy: matrix: - target: [esp32, esp32s2, esp32s3, esp32c2, esp32c3, esp32c6, esp32h2, esp32p4] + target: [esp32, esp32s2, esp32s3, esp32c2, esp32c3, esp32c6, esp32h2, esp32p4, esp32c5] fail-fast: false steps: - uses: actions/checkout@v4 diff --git a/configs/builds.json b/configs/builds.json index ddfb8e4f8..f8f7e5b8e 100644 --- a/configs/builds.json +++ b/configs/builds.json @@ -4,7 +4,7 @@ "file":"libspi_flash.a", "src":"build/esp-idf/spi_flash/libspi_flash.a", "out":"lib/libspi_flash.a", - "targets":["esp32","esp32c2","esp32c3","esp32s2","esp32s3","esp32c6","esp32h2","esp32p4"] + "targets":["esp32","esp32c2","esp32c3","esp32s2","esp32s3","esp32c6","esp32h2","esp32p4","esp32c5"] }, { "file":"libesp_psram.a", @@ -44,6 +44,20 @@ } ], "targets":[ + { + "target": "esp32c5", + "features":[], + "idf_libs":["qio","80m"], + "bootloaders":[ + ["qio","80m"], + ["dio","80m"], + ["qio","40m"], + ["dio","40m"] + ], + "mem_variants":[ + ["dio","80m"] + ] + }, { "target": "esp32p4", "features":["qio_ram"], diff --git a/configs/defconfig.esp32c5 b/configs/defconfig.esp32c5 new file mode 100644 index 000000000..8a45b0eed --- /dev/null +++ b/configs/defconfig.esp32c5 @@ -0,0 +1,51 @@ +CONFIG_BT_ENABLED=y +CONFIG_BT_BLE_BLUFI_ENABLE=y +CONFIG_RTC_CLK_CAL_CYCLES=576 +# CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 is not set +CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=2304 +# This Enables RISCV LP for C6 - but it can't be used within Arduino at this time. +#CONFIG_ULP_COPROC_ENABLED=y +#CONFIG_ULP_COPROC_LP_CORE=y +#CONFIG_ULP_COPROC_RESERVE_MEM=4096 + +# +# OpenThread +# +CONFIG_OPENTHREAD_ENABLED=y +# Border Router disabled +# CONFIG_OPENTHREAD_BORDER_ROUTER=y +# CONFIG_OPENTHREAD_RADIO_SPINEL_UART=y + +# DNS64 and NAT64 will be disabled for a while +# OT IDF issue https://github.com/espressif/esp-idf/issues/15069 +# CONFIG_OPENTHREAD_DNS64_CLIENT=y + +# Radio for RPC +# CONFIG_OPENTHREAD_RADIO=y +# CONFIG_OPENTHREAD_RADIO_NATIVE=y +# CONFIG_OPENTHREAD_DIAG=n +CONFIG_OPENTHREAD_COMMISSIONER=y +CONFIG_OPENTHREAD_JOINER=y +CONFIG_OPENTHREAD_CLI=y +CONFIG_OPENTHREAD_SRP_CLIENT=y +CONFIG_OPENTHREAD_DNS_CLIENT=y +# Default dataset for quick start +CONFIG_OPENTHREAD_NETWORK_NAME="OpenThread-ESP" +CONFIG_OPENTHREAD_MESH_LOCAL_PREFIX="fd00:db8:a0:0::/64" +CONFIG_OPENTHREAD_NETWORK_CHANNEL=15 +CONFIG_OPENTHREAD_NETWORK_PANID=0x1234 +CONFIG_OPENTHREAD_NETWORK_EXTPANID="dead00beef00cafe" +CONFIG_OPENTHREAD_NETWORK_MASTERKEY="00112233445566778899aabbccddeeff" +CONFIG_OPENTHREAD_NETWORK_PSKC="104810e2315100afd6bc9215a6bfac53" +# end of OpenThread + +# Matter shall use only WiFi +CONFIG_ENABLE_MATTER_OVER_THREAD=n + +# +# Zigbee +# +CONFIG_ZB_ENABLED=y +CONFIG_ZB_ZED=y +CONFIG_ZB_RADIO_NATIVE=y +# end of Zigbee diff --git a/tools/config.sh b/tools/config.sh index 1b2941e97..d180e7afc 100755 --- a/tools/config.sh +++ b/tools/config.sh @@ -6,11 +6,11 @@ if [ -z $IDF_PATH ]; then fi if [ -z $IDF_BRANCH ]; then - IDF_BRANCH="release/v5.4" + IDF_BRANCH="master" fi if [ -z $AR_PR_TARGET_BRANCH ]; then - AR_PR_TARGET_BRANCH="release/v3.2.x" + AR_PR_TARGET_BRANCH="release/v3.3.x" fi if [ -z $IDF_TARGET ]; then From 763774ed9dd11464ec6aa300ecee338030d13357 Mon Sep 17 00:00:00 2001 From: me-no-dev Date: Tue, 21 Jan 2025 17:53:49 +0200 Subject: [PATCH 02/11] Update gen_pioarduino_manifest.py --- tools/gen_pioarduino_manifest.py | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tools/gen_pioarduino_manifest.py b/tools/gen_pioarduino_manifest.py index 9d2b99c19..2a76d6cd8 100644 --- a/tools/gen_pioarduino_manifest.py +++ b/tools/gen_pioarduino_manifest.py @@ -23,6 +23,9 @@ def convert_version(version_string): 'v7.7.7' becomes '7.7.7' """ + if version_string == 'heads/master': + return ".".join(("5", "5", "0")) #temporary + regex_pattern = ( r"v(?P0|[1-9]\d*)\.(?P0|[1-9]\d*)\.*(?P0|[1-9]\d*)*" ) From bcaa709530dc8a11bc92415166cc7f0f057795c1 Mon Sep 17 00:00:00 2001 From: me-no-dev Date: Mon, 27 Jan 2025 14:07:36 +0200 Subject: [PATCH 03/11] Add support for ESP32-C5 PSRAM --- configs/builds.json | 2 +- configs/defconfig.esp32c5 | 6 ++++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/configs/builds.json b/configs/builds.json index f8f7e5b8e..1e161c683 100644 --- a/configs/builds.json +++ b/configs/builds.json @@ -46,7 +46,7 @@ "targets":[ { "target": "esp32c5", - "features":[], + "features":["qio_ram"], "idf_libs":["qio","80m"], "bootloaders":[ ["qio","80m"], diff --git a/configs/defconfig.esp32c5 b/configs/defconfig.esp32c5 index 8a45b0eed..efb756f15 100644 --- a/configs/defconfig.esp32c5 +++ b/configs/defconfig.esp32c5 @@ -1,3 +1,9 @@ +CONFIG_XTAL_FREQ_AUTO=y +CONFIG_XTAL_FREQ=0 +CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP=y +CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240=y +CONFIG_SPIRAM=y + CONFIG_BT_ENABLED=y CONFIG_BT_BLE_BLUFI_ENABLE=y CONFIG_RTC_CLK_CAL_CYCLES=576 From d3946f9202072211f2e2cec01dd0cb529570140f Mon Sep 17 00:00:00 2001 From: me-no-dev Date: Tue, 15 Apr 2025 16:41:57 +0300 Subject: [PATCH 04/11] Update TinyUSB DWC2 DCD --- .../arduino_tinyusb/patches/dcd_dwc2.patch | 8 +- components/arduino_tinyusb/src/dcd_dwc2.c | 106 +++++++++--------- 2 files changed, 57 insertions(+), 57 deletions(-) diff --git a/components/arduino_tinyusb/patches/dcd_dwc2.patch b/components/arduino_tinyusb/patches/dcd_dwc2.patch index 11c1c05c0..14e6975f0 100644 --- a/components/arduino_tinyusb/patches/dcd_dwc2.patch +++ b/components/arduino_tinyusb/patches/dcd_dwc2.patch @@ -19,11 +19,11 @@ dwc2_regs_t* dwc2 = DWC2_REG(rhport); const uint8_t epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress); @@ -266,7 +277,18 @@ - depctl.bm.set_data0_iso_even = 1; + depctl.set_data0_iso_even = 1; } if (dir == TUSB_DIR_IN) { -- depctl.bm.tx_fifo_num = epnum; -+ //depctl.bm.tx_fifo_num = epnum; +- depctl.tx_fifo_num = epnum; ++ //depctl.tx_fifo_num = epnum; + uint8_t fifo_num = epnum; +#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) + // Special Case for EP5, which is used by CDC but not actually called by the driver @@ -34,7 +34,7 @@ + fifo_num = get_free_fifo(); + } +#endif -+ depctl.bm.tx_fifo_num = fifo_num; ++ depctl.tx_fifo_num = fifo_num; } dwc2_dep_t* dep = &dwc2->ep[dir == TUSB_DIR_IN ? 0 : 1][epnum]; diff --git a/components/arduino_tinyusb/src/dcd_dwc2.c b/components/arduino_tinyusb/src/dcd_dwc2.c index d6796641a..ea931ab90 100644 --- a/components/arduino_tinyusb/src/dcd_dwc2.c +++ b/components/arduino_tinyusb/src/dcd_dwc2.c @@ -41,12 +41,6 @@ #include "device/dcd.h" #include "dwc2_common.h" -#if TU_CHECK_MCU(OPT_MCU_GD32VF103) - #define DWC2_EP_COUNT(_dwc2) DWC2_EP_MAX -#else - #define DWC2_EP_COUNT(_dwc2) ((_dwc2)->ghwcfg2_bm.num_dev_ep + 1) -#endif - //--------------------------------------------------------------------+ // MACRO TYPEDEF CONSTANT ENUM //--------------------------------------------------------------------+ @@ -79,6 +73,16 @@ CFG_TUD_MEM_SECTION static struct { TUD_EPBUF_DEF(setup_packet, 8); } _dcd_usbbuf; +TU_ATTR_ALWAYS_INLINE static inline uint8_t dwc2_ep_count(const dwc2_regs_t* dwc2) { + #if TU_CHECK_MCU(OPT_MCU_GD32VF103) + return DWC2_EP_MAX; + #else + const dwc2_ghwcfg2_t ghwcfg2 = {.value = dwc2->ghwcfg2}; + return ghwcfg2.num_dev_ep + 1; + #endif +} + + //-------------------------------------------------------------------- // DMA //-------------------------------------------------------------------- @@ -102,7 +106,8 @@ bool dcd_dcache_clean_invalidate(const void* addr, uint32_t data_size) { TU_ATTR_ALWAYS_INLINE static inline bool dma_device_enabled(const dwc2_regs_t* dwc2) { (void) dwc2; // Internal DMA only - return CFG_TUD_DWC2_DMA_ENABLE && dwc2->ghwcfg2_bm.arch == GHWCFG2_ARCH_INTERNAL_DMA; + const dwc2_ghwcfg2_t ghwcfg2 = {.value = dwc2->ghwcfg2}; + return CFG_TUD_DWC2_DMA_ENABLE && ghwcfg2.arch == GHWCFG2_ARCH_INTERNAL_DMA; } static void dma_setup_prepare(uint8_t rhport) { @@ -261,20 +266,15 @@ static void edpt_activate(uint8_t rhport, const tusb_desc_endpoint_t* p_endpoint xfer->interval = p_endpoint_desc->bInterval; // Endpoint control - union { - uint32_t value; - dwc2_depctl_t bm; - } depctl; - depctl.value = 0; - - depctl.bm.mps = xfer->max_size; - depctl.bm.active = 1; - depctl.bm.type = p_endpoint_desc->bmAttributes.xfer; + dwc2_depctl_t depctl = {.value = 0}; + depctl.mps = xfer->max_size; + depctl.active = 1; + depctl.type = p_endpoint_desc->bmAttributes.xfer; if (p_endpoint_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS) { - depctl.bm.set_data0_iso_even = 1; + depctl.set_data0_iso_even = 1; } if (dir == TUSB_DIR_IN) { - //depctl.bm.tx_fifo_num = epnum; + //depctl.tx_fifo_num = epnum; uint8_t fifo_num = epnum; #if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) // Special Case for EP5, which is used by CDC but not actually called by the driver @@ -285,7 +285,7 @@ static void edpt_activate(uint8_t rhport, const tusb_desc_endpoint_t* p_endpoint fifo_num = get_free_fifo(); } #endif - depctl.bm.tx_fifo_num = fifo_num; + depctl.tx_fifo_num = fifo_num; } dwc2_dep_t* dep = &dwc2->ep[dir == TUSB_DIR_IN ? 0 : 1][epnum]; @@ -365,31 +365,22 @@ static void edpt_schedule_packets(uint8_t rhport, const uint8_t epnum, const uin } // transfer size: A full OUT transfer (multiple packets, possibly) triggers XFRC. - union { - uint32_t value; - dwc2_ep_tsize_t bm; - } deptsiz; - deptsiz.value = 0; - deptsiz.bm.xfer_size = total_bytes; - deptsiz.bm.packet_count = num_packets; - + dwc2_ep_tsize_t deptsiz = {.value = 0}; + deptsiz.xfer_size = total_bytes; + deptsiz.packet_count = num_packets; dep->tsiz = deptsiz.value; // control - union { - dwc2_depctl_t bm; - uint32_t value; - } depctl; - depctl.value = dep->ctl; - - depctl.bm.clear_nak = 1; - depctl.bm.enable = 1; - if (depctl.bm.type == DEPCTL_EPTYPE_ISOCHRONOUS && xfer->interval == 1) { - const uint32_t odd_now = (dwc2->dsts_bm.frame_number & 1u); + dwc2_depctl_t depctl = {.value = dep->ctl}; + depctl.clear_nak = 1; + depctl.enable = 1; + if (depctl.type == DEPCTL_EPTYPE_ISOCHRONOUS && xfer->interval == 1) { + const dwc2_dsts_t dsts = {.value = dwc2->dsts}; + const uint32_t odd_now = dsts.frame_number & 1u; if (odd_now) { - depctl.bm.set_data0_iso_even = 1; + depctl.set_data0_iso_even = 1; } else { - depctl.bm.set_data1_iso_odd = 1; + depctl.set_data1_iso_odd = 1; } } @@ -432,7 +423,8 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) { // XCVRDLY: transceiver delay between xcvr_sel and txvalid during device chirp is required // when using with some PHYs such as USB334x (USB3341, USB3343, USB3346, USB3347) - if (dwc2->ghwcfg2_bm.hs_phy_type == GHWCFG2_HSPHY_ULPI) { + const dwc2_ghwcfg2_t ghwcfg2 = {.value = dwc2->ghwcfg2}; + if (ghwcfg2.hs_phy_type == GHWCFG2_HSPHY_ULPI) { dcfg |= DCFG_XCVRDLY; } } else { @@ -667,7 +659,7 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) { // 7.4.1 Initialization on USB Reset static void handle_bus_reset(uint8_t rhport) { dwc2_regs_t *dwc2 = DWC2_REG(rhport); - const uint8_t ep_count = DWC2_EP_COUNT(dwc2); + const uint8_t ep_count = dwc2_ep_count(dwc2); tu_memclr(xfer_status, sizeof(xfer_status)); @@ -697,7 +689,9 @@ static void handle_bus_reset(uint8_t rhport) { dfifo_device_init(rhport); // 5. Reset device address - dwc2->dcfg_bm.address = 0; + dwc2_dcfg_t dcfg = {.value = dwc2->dcfg}; + dcfg.address = 0; + dwc2->dcfg = dcfg.value; // Fixed both control EP0 size to 64 bytes dwc2->epin[0].ctl &= ~(0x03 << DIEPCTL_MPSIZ_Pos); @@ -717,8 +711,9 @@ static void handle_bus_reset(uint8_t rhport) { static void handle_enum_done(uint8_t rhport) { dwc2_regs_t *dwc2 = DWC2_REG(rhport); + const dwc2_dsts_t dsts = {.value = dwc2->dsts}; tusb_speed_t speed; - switch (dwc2->dsts_bm.enum_speed) { + switch (dsts.enum_speed) { case DCFG_SPEED_HIGH: speed = TUSB_SPEED_HIGH; break; @@ -763,12 +758,12 @@ static void handle_rxflvl_irq(uint8_t rhport) { const volatile uint32_t* rx_fifo = dwc2->fifo[0]; // Pop control word off FIFO - const dwc2_grxstsp_t grxstsp_bm = dwc2->grxstsp_bm; - const uint8_t epnum = grxstsp_bm.ep_ch_num; + const dwc2_grxstsp_t grxstsp = {.value = dwc2->grxstsp}; + const uint8_t epnum = grxstsp.ep_ch_num; dwc2_dep_t* epout = &dwc2->epout[epnum]; - switch (grxstsp_bm.packet_status) { + switch (grxstsp.packet_status) { case GRXSTS_PKTSTS_GLOBAL_OUT_NAK: // Global OUT NAK: do nothing break; @@ -790,7 +785,7 @@ static void handle_rxflvl_irq(uint8_t rhport) { case GRXSTS_PKTSTS_RX_DATA: { // Out packet received - const uint16_t byte_count = grxstsp_bm.byte_count; + const uint16_t byte_count = grxstsp.byte_count; xfer_ctl_t* xfer = XFER_CTL_BASE(epnum, TUSB_DIR_OUT); if (byte_count) { @@ -804,7 +799,8 @@ static void handle_rxflvl_irq(uint8_t rhport) { // short packet, minus remaining bytes (xfer_size) if (byte_count < xfer->max_size) { - xfer->total_len -= epout->tsiz_bm.xfer_size; + const dwc2_ep_tsize_t tsiz = {.value = epout->tsiz}; + xfer->total_len -= tsiz.xfer_size; if (epnum == 0) { xfer->total_len -= _dcd_data.ep0_pending[TUSB_DIR_OUT]; _dcd_data.ep0_pending[TUSB_DIR_OUT] = 0; @@ -866,11 +862,13 @@ static void handle_epin_slave(uint8_t rhport, uint8_t epnum, dwc2_diepint_t diep // - 64 bytes or // - Half/Empty of TX FIFO size (configured by GAHBCFG.TXFELVL) if (diepint_bm.txfifo_empty && (dwc2->diepempmsk & (1 << epnum))) { - const uint16_t remain_packets = epin->tsiz_bm.packet_count; + dwc2_ep_tsize_t tsiz = {.value = epin->tsiz}; + const uint16_t remain_packets = tsiz.packet_count; // Process every single packet (only whole packets can be written to fifo) for (uint16_t i = 0; i < remain_packets; i++) { - const uint16_t remain_bytes = (uint16_t) epin->tsiz_bm.xfer_size; + tsiz.value = epin->tsiz; + const uint16_t remain_bytes = (uint16_t) tsiz.xfer_size; const uint16_t xact_bytes = tu_min16(remain_bytes, xfer->max_size); // Check if dtxfsts has enough space available @@ -889,7 +887,8 @@ static void handle_epin_slave(uint8_t rhport, uint8_t epnum, dwc2_diepint_t diep } // Turn off TXFE if all bytes are written. - if (epin->tsiz_bm.xfer_size == 0) { + tsiz.value = epin->tsiz; + if (tsiz.xfer_size == 0) { dwc2->diepempmsk &= ~(1 << epnum); } } @@ -920,7 +919,8 @@ static void handle_epout_dma(uint8_t rhport, uint8_t epnum, dwc2_doepint_t doepi xfer_ctl_t* xfer = XFER_CTL_BASE(epnum, TUSB_DIR_OUT); // determine actual received bytes - const uint16_t remain = epout->tsiz_bm.xfer_size; + const dwc2_ep_tsize_t tsiz = {.value = epout->tsiz}; + const uint16_t remain = tsiz.xfer_size; xfer->total_len -= remain; // this is ZLP, so prepare EP0 for next setup @@ -956,7 +956,7 @@ static void handle_epin_dma(uint8_t rhport, uint8_t epnum, dwc2_diepint_t diepin static void handle_ep_irq(uint8_t rhport, uint8_t dir) { dwc2_regs_t* dwc2 = DWC2_REG(rhport); const bool is_dma = dma_device_enabled(dwc2); - const uint8_t ep_count = DWC2_EP_COUNT(dwc2); + const uint8_t ep_count = dwc2_ep_count(dwc2); const uint8_t daint_offset = (dir == TUSB_DIR_IN) ? DAINT_IEPINT_Pos : DAINT_OEPINT_Pos; dwc2_dep_t* ep_base = &dwc2->ep[dir == TUSB_DIR_IN ? 0 : 1][0]; From 69d504b9e3a3c6debd66c40d3367002d40690c95 Mon Sep 17 00:00:00 2001 From: me-no-dev Date: Wed, 23 Apr 2025 16:04:16 +0300 Subject: [PATCH 05/11] Disable Matter on C5 for now --- main/idf_component.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/main/idf_component.yml b/main/idf_component.yml index 8c574bb08..67f5d539d 100644 --- a/main/idf_component.yml +++ b/main/idf_component.yml @@ -20,4 +20,4 @@ dependencies: version: "^1.4.0" require: public rules: - - if: "target not in [esp32c2, esp32h2, esp32p4]" + - if: "target not in [esp32c2, esp32h2, esp32p4, esp32c5]" From 05c563fdd4bb90ed74ae4673ee4465d2287d2ea3 Mon Sep 17 00:00:00 2001 From: me-no-dev Date: Wed, 7 May 2025 13:46:11 +0300 Subject: [PATCH 06/11] fix(libs): Remove unnecessary IDF patches --- patches/lwip_max_tcp_pcb.diff | 118 ---------------------------------- tools/install-esp-idf.sh | 7 +- 2 files changed, 3 insertions(+), 122 deletions(-) delete mode 100644 patches/lwip_max_tcp_pcb.diff diff --git a/patches/lwip_max_tcp_pcb.diff b/patches/lwip_max_tcp_pcb.diff deleted file mode 100644 index 6b9e73cb6..000000000 --- a/patches/lwip_max_tcp_pcb.diff +++ /dev/null @@ -1,118 +0,0 @@ -diff --git a/components/lwip/lwip/src/core/memp.c b/components/lwip/lwip/src/core/memp.c -index 352ce5a55127a658b6b3c9d8541298c42df332ff..39433cf476b3456b046e337e9b1f016299964a84 100644 ---- a/components/lwip/lwip/src/core/memp.c -+++ b/components/lwip/lwip/src/core/memp.c -@@ -240,6 +240,10 @@ memp_init(void) - #endif /* MEMP_OVERFLOW_CHECK >= 2 */ - } - -+#if MEMP_MEM_MALLOC && ESP_LWIP && LWIP_TCP -+static u32_t num_tcp_pcb = 0; -+#endif -+ - static void * - #if !MEMP_OVERFLOW_CHECK - do_memp_malloc_pool(const struct memp_desc *desc) -@@ -251,6 +255,16 @@ do_memp_malloc_pool_fn(const struct memp_desc *desc, const char *file, const int - SYS_ARCH_DECL_PROTECT(old_level); - - #if MEMP_MEM_MALLOC -+#if ESP_LWIP -+#if LWIP_TCP -+ if(desc == memp_pools[MEMP_TCP_PCB]){ -+ if(num_tcp_pcb >= MEMP_NUM_TCP_PCB){ -+ return NULL; -+ } -+ } -+#endif -+#endif -+ - memp = (struct memp *)mem_malloc(MEMP_SIZE + MEMP_ALIGN_SIZE(desc->size)); - SYS_ARCH_PROTECT(old_level); - #else /* MEMP_MEM_MALLOC */ -@@ -260,6 +274,12 @@ do_memp_malloc_pool_fn(const struct memp_desc *desc, const char *file, const int - #endif /* MEMP_MEM_MALLOC */ - - if (memp != NULL) { -+#if MEMP_MEM_MALLOC && ESP_LWIP && LWIP_TCP -+ if (desc == memp_pools[MEMP_TCP_PCB]) { -+ num_tcp_pcb++; -+ } -+#endif -+ - #if !MEMP_MEM_MALLOC - #if MEMP_OVERFLOW_CHECK == 1 - memp_overflow_check_element(memp, desc); -@@ -369,6 +389,12 @@ do_memp_free_pool(const struct memp_desc *desc, void *mem) - - SYS_ARCH_PROTECT(old_level); - -+#if MEMP_MEM_MALLOC && ESP_LWIP && LWIP_TCP -+ if (desc == memp_pools[MEMP_TCP_PCB]) { -+ num_tcp_pcb--; -+ } -+#endif -+ - #if MEMP_OVERFLOW_CHECK == 1 - memp_overflow_check_element(memp, desc); - #endif /* MEMP_OVERFLOW_CHECK */ -diff --git a/components/lwip/lwip/src/core/tcp.c b/components/lwip/lwip/src/core/tcp.c -index 3fbdd89ae07807208ff7466abb50f90b5e7727e4..fe6baaf250927cb4b89f8d1dbd41c73def88692b 100644 ---- a/components/lwip/lwip/src/core/tcp.c -+++ b/components/lwip/lwip/src/core/tcp.c -@@ -1765,7 +1765,9 @@ tcp_kill_state(enum tcp_state state) - struct tcp_pcb *pcb, *inactive; - u32_t inactivity; - -+#if !ESP_LWIP - LWIP_ASSERT("invalid state", (state == CLOSING) || (state == LAST_ACK)); -+#endif - - inactivity = 0; - inactive = NULL; -@@ -1870,17 +1872,41 @@ tcp_alloc(u8_t prio) - tcp_kill_state(CLOSING); - /* Try to allocate a tcp_pcb again. */ - pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB); -+#if ESP_LWIP - if (pcb == NULL) { -- /* Try killing oldest active connection with lower priority than the new one. */ -- LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing oldest connection with prio lower than %d\n", prio)); -- tcp_kill_prio(prio); -- /* Try to allocate a tcp_pcb again. */ -+ /* Try killing oldest connection in FIN_WAIT_2. */ -+ LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest FIN_WAIT_2 connection\n")); -+ tcp_kill_state(FIN_WAIT_2); - pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB); -+ if (pcb == NULL) { -+ /* Try killing oldest connection in FIN_WAIT_1. */ -+ LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest FIN_WAIT_1 connection\n")); -+ tcp_kill_state(FIN_WAIT_1); -+ pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB); -+#endif -+ if (pcb == NULL) { -+ /* Try killing oldest active connection with lower priority than the new one. */ -+ LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing oldest connection with prio lower than %d\n", prio)); -+ tcp_kill_prio(prio); -+ /* Try to allocate a tcp_pcb again. */ -+ pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB); -+ if (pcb != NULL) { -+ /* adjust err stats: memp_malloc failed multiple times before */ -+ MEMP_STATS_DEC(err, MEMP_TCP_PCB); -+ } -+ } -+#if ESP_LWIP -+ if (pcb != NULL) { -+ /* adjust err stats: memp_malloc failed multiple times before */ -+ MEMP_STATS_DEC(err, MEMP_TCP_PCB); -+ } -+ } - if (pcb != NULL) { - /* adjust err stats: memp_malloc failed multiple times before */ - MEMP_STATS_DEC(err, MEMP_TCP_PCB); - } - } -+#endif - if (pcb != NULL) { - /* adjust err stats: memp_malloc failed multiple times before */ - MEMP_STATS_DEC(err, MEMP_TCP_PCB); diff --git a/tools/install-esp-idf.sh b/tools/install-esp-idf.sh index 0519ae67a..66c50aca5 100755 --- a/tools/install-esp-idf.sh +++ b/tools/install-esp-idf.sh @@ -38,10 +38,9 @@ if [ ! -x $idf_was_installed ] || [ ! -x $commit_predefined ]; then export IDF_BRANCH=$(git -C "$IDF_PATH" symbolic-ref --short HEAD || git -C "$IDF_PATH" tag --points-at HEAD) # Temporarily patch the ESP32-S2 I2C LL driver to keep the clock source - cd $IDF_PATH - patch -p1 -N -i $AR_PATCHES/esp32s2_i2c_ll_master_init.diff - patch -p1 -N -i $AR_PATCHES/lwip_max_tcp_pcb.diff - cd - + #cd $IDF_PATH + #patch -p1 -N -i $AR_PATCHES/esp32s2_i2c_ll_master_init.diff + #cd - fi # From 917e6caea4f8c1c0b12b137af5120c37dfa51638 Mon Sep 17 00:00:00 2001 From: me-no-dev Date: Thu, 15 May 2025 10:56:09 +0200 Subject: [PATCH 07/11] Update target IDF branch for v5.5 --- tools/config.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/config.sh b/tools/config.sh index d180e7afc..948941ece 100755 --- a/tools/config.sh +++ b/tools/config.sh @@ -6,7 +6,7 @@ if [ -z $IDF_PATH ]; then fi if [ -z $IDF_BRANCH ]; then - IDF_BRANCH="master" + IDF_BRANCH="release/v5.5" fi if [ -z $AR_PR_TARGET_BRANCH ]; then From da49b4a8cd3d81b5a310c9883420ff16b27f7951 Mon Sep 17 00:00:00 2001 From: me-no-dev Date: Fri, 30 May 2025 19:13:14 +0300 Subject: [PATCH 08/11] Enable Matter on ESP32-C5 --- main/idf_component.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/main/idf_component.yml b/main/idf_component.yml index d064e5989..a85eca541 100644 --- a/main/idf_component.yml +++ b/main/idf_component.yml @@ -20,4 +20,4 @@ dependencies: version: "1.4.1" require: public rules: - - if: "target not in [esp32c2, esp32h2, esp32p4, esp32c5]" + - if: "target not in [esp32c2, esp32h2, esp32p4]" From 9ddd4f741de345d0fd7d2de14cda4d9b130ddfa0 Mon Sep 17 00:00:00 2001 From: Lucas Saavedra Vaz <32426024+lucasssvaz@users.noreply.github.com> Date: Tue, 1 Apr 2025 13:43:47 -0300 Subject: [PATCH 09/11] feat(nimble): Replace Bluedroid with NimBLE except for ESP32 --- configs/defconfig.esp32c2 | 7 ++++++- configs/defconfig.esp32c3 | 5 +++++ configs/defconfig.esp32c5 | 7 ++++++- configs/defconfig.esp32c6 | 7 ++++++- configs/defconfig.esp32h2 | 7 ++++++- configs/defconfig.esp32s3 | 5 +++++ 6 files changed, 34 insertions(+), 4 deletions(-) diff --git a/configs/defconfig.esp32c2 b/configs/defconfig.esp32c2 index 11c0100a0..9cc76880e 100644 --- a/configs/defconfig.esp32c2 +++ b/configs/defconfig.esp32c2 @@ -1,7 +1,12 @@ CONFIG_XTAL_FREQ_26=y CONFIG_XTAL_FREQ=26 CONFIG_BT_ENABLED=y -CONFIG_BT_BLE_BLUFI_ENABLE=y +CONFIG_BTDM_CTRL_MODE_BLE_ONLY=y +CONFIG_BTDM_CTRL_MODE_BR_EDR_ONLY=n +CONFIG_BTDM_CTRL_MODE_BTDM=n +CONFIG_BT_BLUEDROID_ENABLED=n +CONFIG_BT_NIMBLE_ENABLED=y +CONFIG_BT_NIMBLE_BLUFI_ENABLE=y CONFIG_RTC_CLK_CAL_CYCLES=576 # CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 is not set CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=2304 diff --git a/configs/defconfig.esp32c3 b/configs/defconfig.esp32c3 index 1baf62540..804a908fd 100644 --- a/configs/defconfig.esp32c3 +++ b/configs/defconfig.esp32c3 @@ -2,6 +2,11 @@ CONFIG_RTC_CLK_CAL_CYCLES=576 # CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 is not set CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=2304 CONFIG_BT_ENABLED=y +CONFIG_BTDM_CTRL_MODE_BLE_ONLY=y +CONFIG_BTDM_CTRL_MODE_BR_EDR_ONLY=n +CONFIG_BTDM_CTRL_MODE_BTDM=n +CONFIG_BT_BLUEDROID_ENABLED=n +CONFIG_BT_NIMBLE_ENABLED=y CONFIG_ESP_WIFI_11KV_SUPPORT=y CONFIG_ESP_WIFI_SCAN_CACHE=y CONFIG_ESP_WIFI_MBO_SUPPORT=y diff --git a/configs/defconfig.esp32c5 b/configs/defconfig.esp32c5 index efb756f15..b18dd4b05 100644 --- a/configs/defconfig.esp32c5 +++ b/configs/defconfig.esp32c5 @@ -5,7 +5,12 @@ CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240=y CONFIG_SPIRAM=y CONFIG_BT_ENABLED=y -CONFIG_BT_BLE_BLUFI_ENABLE=y +CONFIG_BTDM_CTRL_MODE_BLE_ONLY=y +CONFIG_BTDM_CTRL_MODE_BR_EDR_ONLY=n +CONFIG_BTDM_CTRL_MODE_BTDM=n +CONFIG_BT_BLUEDROID_ENABLED=n +CONFIG_BT_NIMBLE_ENABLED=y +CONFIG_BT_NIMBLE_BLUFI_ENABLE=y CONFIG_RTC_CLK_CAL_CYCLES=576 # CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 is not set CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=2304 diff --git a/configs/defconfig.esp32c6 b/configs/defconfig.esp32c6 index d0e2b7bbd..ce5cb19e3 100644 --- a/configs/defconfig.esp32c6 +++ b/configs/defconfig.esp32c6 @@ -1,5 +1,10 @@ CONFIG_BT_ENABLED=y -CONFIG_BT_BLE_BLUFI_ENABLE=y +CONFIG_BTDM_CTRL_MODE_BLE_ONLY=y +CONFIG_BTDM_CTRL_MODE_BR_EDR_ONLY=n +CONFIG_BTDM_CTRL_MODE_BTDM=n +CONFIG_BT_BLUEDROID_ENABLED=n +CONFIG_BT_NIMBLE_ENABLED=y +CONFIG_BT_NIMBLE_BLUFI_ENABLE=y CONFIG_RTC_CLK_CAL_CYCLES=576 # CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 is not set CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=2304 diff --git a/configs/defconfig.esp32h2 b/configs/defconfig.esp32h2 index 024120d34..25e757de6 100644 --- a/configs/defconfig.esp32h2 +++ b/configs/defconfig.esp32h2 @@ -1,5 +1,10 @@ CONFIG_BT_ENABLED=y -CONFIG_BT_BLE_BLUFI_ENABLE=y +CONFIG_BTDM_CTRL_MODE_BLE_ONLY=y +CONFIG_BTDM_CTRL_MODE_BR_EDR_ONLY=n +CONFIG_BTDM_CTRL_MODE_BTDM=n +CONFIG_BT_BLUEDROID_ENABLED=n +CONFIG_BT_NIMBLE_ENABLED=y +CONFIG_BT_NIMBLE_BLUFI_ENABLE=y CONFIG_RTC_CLK_CAL_CYCLES=576 # CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 is not set CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=2304 diff --git a/configs/defconfig.esp32s3 b/configs/defconfig.esp32s3 index 36fa6b6a5..08e9d95ca 100644 --- a/configs/defconfig.esp32s3 +++ b/configs/defconfig.esp32s3 @@ -1,4 +1,9 @@ CONFIG_BT_ENABLED=y +CONFIG_BTDM_CTRL_MODE_BLE_ONLY=y +CONFIG_BTDM_CTRL_MODE_BR_EDR_ONLY=n +CONFIG_BTDM_CTRL_MODE_BTDM=n +CONFIG_BT_BLUEDROID_ENABLED=n +CONFIG_BT_NIMBLE_ENABLED=y CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP=y CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240=y CONFIG_SPIRAM=y From 7c4314f9e7b4233de1a21f2ec8188007c7a0e7cb Mon Sep 17 00:00:00 2001 From: me-no-dev Date: Tue, 10 Jun 2025 12:41:35 +0300 Subject: [PATCH 10/11] Update PSRAM Options --- configs/defconfig.qio_ram | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/defconfig.qio_ram b/configs/defconfig.qio_ram index 902680b3a..c5c13e4dd 100644 --- a/configs/defconfig.qio_ram +++ b/configs/defconfig.qio_ram @@ -1 +1,2 @@ +# CONFIG_SPIRAM_BOOT_HW_INIT is not set # CONFIG_SPIRAM_BOOT_INIT is not set \ No newline at end of file From ee861e1b1dfe538f231306d11befa76e31638899 Mon Sep 17 00:00:00 2001 From: me-no-dev Date: Tue, 10 Jun 2025 12:41:59 +0300 Subject: [PATCH 11/11] Add cleaner script --- clean.sh | 2 ++ 1 file changed, 2 insertions(+) create mode 100755 clean.sh diff --git a/clean.sh b/clean.sh new file mode 100755 index 000000000..5fbe754fa --- /dev/null +++ b/clean.sh @@ -0,0 +1,2 @@ +#!/bin/bash +rm -rf out build dist managed_components sdkconfig pFad - Phonifier reborn

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