Use Doxygen style comments + formatting

anokl · anokl · commit 39c7ed166148 · 2018-07-05T17:24:52.000+02:00
diff --git a/Disruptor.PerfTests/OneToOneRawBatchThroughputTest.h b/Disruptor.PerfTests/OneToOneRawBatchThroughputTest.h
@@ -18,42 +18,42 @@ namespace Disruptor
 namespace PerfTests
 {
 
-    /// <summary>
-    /// UniCast a series of items between 1 publisher and 1 event processor.
-    /// +----+    +-----+
-    /// | P1 |--->| EP1 |
-    /// +----+    +-----+
-    /// 
-    /// Queue Based:
-    /// ============
-    /// 
-    ///        put take
-    /// +----+    +====+    +-----+
-    /// | P1 |---\| Q1 |/---| EP1 |
-    /// +----+    +====+    +-----+
-    /// 
-    /// P1  - Publisher 1
-    /// Q1  - Queue 1
-    /// EP1 - EventProcessor 1
-    /// 
-    /// Disruptor:
-    /// ==========
-    ///              track to prevent wrap
-    ///              +------------------+
-    ///              |                  |
-    ///              |                  v
-    /// +----+    +====+    +====+   +-----+
-    /// | P1 |--->| RB |/---| SB |   | EP1 |
-    /// +----+    +====+    +====+   +-----+
-    ///      claim get    ^        |
-    ///                        |        |
-    ///                        +--------+
-    ///                          waitFor
-    /// P1  - Publisher 1
-    /// RB  - RingBuffer
-    /// SB  - SequenceBarrier
-    /// EP1 - EventProcessor 1
-    /// </summary>
+    /**
+     * UniCast a series of items between 1 publisher and 1 event processor.
+     * +----+    +-----+
+     * | P1 |--->| EP1 |
+     * +----+    +-----+
+     * 
+     * Queue Based:
+     * ============
+     * 
+     *        put take
+     * +----+    +====+    +-----+
+     * | P1 |---\| Q1 |/---| EP1 |
+     * +----+    +====+    +-----+
+     * 
+     * P1  - Publisher 1
+     * Q1  - Queue 1
+     * EP1 - EventProcessor 1
+     * 
+     * Disruptor:
+     * ==========
+     *              track to prevent wrap
+     *              +------------------+
+     *              |                  |
+     *              |                  v
+     * +----+    +====+    +====+   +-----+
+     * | P1 |--->| RB |/---| SB |   | EP1 |
+     * +----+    +====+    +====+   +-----+
+     *      claim get    ^        |
+     *                        |        |
+     *                        +--------+
+     *                          waitFor
+     * P1  - Publisher 1
+     * RB  - RingBuffer
+     * SB  - SequenceBarrier
+     * EP1 - EventProcessor 1
+     */
     class OneToOneRawBatchThroughputTest : public IThroughputTest
     {
         class MyRunnable;
diff --git a/Disruptor.PerfTests/OneToOneRawThroughputTest.cpp b/Disruptor.PerfTests/OneToOneRawThroughputTest.cpp
@@ -56,7 +56,7 @@ namespace PerfTests
         return 2;
     }
 
-    void OneToOneRawThroughputTest::waitForEventProcessorSequence(std::int64_t expectedCount)
+    void OneToOneRawThroughputTest::waitForEventProcessorSequence(std::int64_t expectedCount) const
     {
         while (m_myRunnable->sequence->value() != expectedCount)
         {
@@ -75,7 +75,7 @@ namespace PerfTests
         m_expectedCount = expectedCount;
     }
 
-    void OneToOneRawThroughputTest::MyRunnable::run()
+    void OneToOneRawThroughputTest::MyRunnable::run() const
     {
         auto expected = m_expectedCount;
 
@@ -85,11 +85,13 @@ namespace PerfTests
         try
         {
             std::int64_t processed;
+
             do
             {
                 processed = b.waitFor(s.value() + 1);
                 s.setValue(processed);
-            } while (processed < expected);
+            }
+            while (processed < expected);
 
             m_latch->set();
             s.setValueVolatile(processed);
diff --git a/Disruptor.PerfTests/OneToOneRawThroughputTest.h b/Disruptor.PerfTests/OneToOneRawThroughputTest.h
@@ -67,7 +67,7 @@ namespace PerfTests
         std::int32_t requiredProcessorCount() const override;
 
     private:
-        void waitForEventProcessorSequence(std::int64_t expectedCount);
+        void waitForEventProcessorSequence(std::int64_t expectedCount) const;
 
         const std::int32_t m_bufferSize = 1024 * 64;
 
@@ -90,7 +90,7 @@ namespace PerfTests
 
         void reset(const std::shared_ptr< Tests::ManualResetEvent >& latch, std::int64_t expectedCount);
 
-        void run();
+        void run() const;
 
         std::shared_ptr< Sequence > sequence = std::make_shared< Sequence >(-1);
 
diff --git a/Disruptor/ISequence.h b/Disruptor/ISequence.h
@@ -18,22 +18,22 @@ namespace Disruptor
         virtual std::int64_t value() const = 0;
 
         /**
-         * Perform an ordered write of this sequence.  The intent is
- a Store/Store barrier between this write and any previous
- store.
+         * Perform an ordered write of this sequence.  The intent isa Store/Store barrier between this write and any previous store.
+         * 
          * \param value The new value for the sequence.
          */ 
         virtual void setValue(std::int64_t value) = 0;
 
         /**
-         * Performs a volatile write of this sequence.  The intent is a Store/Store barrier between this write and any previous
- write and a Store/Load barrier between this write and any subsequent volatile read.
+         * Performs a volatile write of this sequence.  The intent is a Store/Store barrier between this write and any previous write and a Store/Load barrier between this write and any subsequent volatile read.
+         * 
          * \param value 
          */ 
         virtual void setValueVolatile(std::int64_t value) = 0;
 
         /**
          * Atomically set the value to the given updated value if the current value == the expected value.
+         * 
          * \param expectedSequence the expected value for the sequence
          * \param nextSequence the new value for the sequence
          * \returns true if successful. False return indicates that the actual value was not equal to the expected value.
@@ -42,12 +42,14 @@ namespace Disruptor
 
         /**
          * Increments the sequence and stores the result, as an atomic operation.
+         * 
          * \returns incremented sequence
          */ 
         virtual std::int64_t incrementAndGet() = 0;
 
         /**
          * Increments the sequence and stores the result, as an atomic operation.
+         * 
          * \returns incremented sequence
          */ 
         virtual std::int64_t addAndGet(std::int64_t value) = 0;

Original file line number	Diff line number	Diff line change
`@@ -56,7 +56,7 @@ namespace PerfTests`
`56`	`56`	`return 2;`
`57`	`57`	`}`
`58`	`58`
`59`		`- void OneToOneRawThroughputTest::waitForEventProcessorSequence(std::int64_t expectedCount)`
	`59`	`+ void OneToOneRawThroughputTest::waitForEventProcessorSequence(std::int64_t expectedCount) const`
`60`	`60`	`{`
`61`	`61`	`while (m_myRunnable->sequence->value() != expectedCount)`
`62`	`62`	`{`
`@@ -75,7 +75,7 @@ namespace PerfTests`
`75`	`75`	`m_expectedCount = expectedCount;`
`76`	`76`	`}`
`77`	`77`
`78`		`- void OneToOneRawThroughputTest::MyRunnable::run()`
	`78`	`+ void OneToOneRawThroughputTest::MyRunnable::run() const`
`79`	`79`	`{`
`80`	`80`	`auto expected = m_expectedCount;`
`81`	`81`
`@@ -85,11 +85,13 @@ namespace PerfTests`
`85`	`85`	`try`
`86`	`86`	`{`
`87`	`87`	`std::int64_t processed;`
	`88`	`+`
`88`	`89`	`do`
`89`	`90`	`{`
`90`	`91`	`processed = b.waitFor(s.value() + 1);`
`91`	`92`	`s.setValue(processed);`
`92`		`- } while (processed < expected);`
	`93`	`+ }`
	`94`	`+ while (processed < expected);`
`93`	`95`
`94`	`96`	`m_latch->set();`
`95`	`97`	`s.setValueVolatile(processed);`