mimxrt/flash.c: Invalidate cache after disabling IRQ.

robert-hh · robert-hh · commit 574e47ebbbb3 · 2025-01-26T21:39:58.000+01:00
It used to happen before disabling IRQ. This change stopped problems
with USB IRQ happening during flash writes.

Signed-off-by: robert-hh &lt;robert@hammelrath.com&gt;
diff --git a/ports/mimxrt/flash.c b/ports/mimxrt/flash.c
@@ -45,14 +45,14 @@ void flash_init(void) {
 __attribute__((section(".ram_functions"))) status_t flash_erase_block(uint32_t erase_addr) {
     status_t status = kStatus_Fail;
 
+    __disable_irq();
     SCB_CleanInvalidateDCache();
     SCB_DisableDCache();
-    __disable_irq();
 
     status = flexspi_nor_flash_erase_block(BOARD_FLEX_SPI, erase_addr);
 
-    __enable_irq();
     SCB_EnableDCache();
+    __enable_irq();
 
     return status;
 }
@@ -62,14 +62,14 @@ __attribute__((section(".ram_functions"))) status_t flash_erase_block(uint32_t e
 __attribute__((section(".ram_functions"))) status_t flash_erase_sector(uint32_t erase_addr) {
     status_t status = kStatus_Fail;
 
+    __disable_irq();
     SCB_CleanInvalidateDCache();
     SCB_DisableDCache();
-    __disable_irq();
 
     status = flexspi_nor_flash_erase_sector(BOARD_FLEX_SPI, erase_addr);
 
-    __enable_irq();
     SCB_EnableDCache();
+    __enable_irq();
 
     return status;
 }
@@ -86,8 +86,6 @@ __attribute__((section(".ram_functions"))) status_t flash_write_block(uint32_t d
         status = kStatus_Success;  // Nothing to do
     } else {
 
-        SCB_CleanInvalidateDCache();
-        SCB_DisableDCache();
 
         // write data in chunks not crossing a page boundary
         do {
@@ -98,7 +96,12 @@ __attribute__((section(".ram_functions"))) status_t flash_write_block(uint32_t d
             }
 
             __disable_irq();
+            SCB_CleanInvalidateDCache();
+            SCB_DisableDCache();
+            
             status = flexspi_nor_flash_page_program(BOARD_FLEX_SPI, dest_addr, (uint32_t *)src, write_length);
+            
+            SCB_EnableDCache();
             __enable_irq();
 
             // Update remaining data length
@@ -109,7 +112,6 @@ __attribute__((section(".ram_functions"))) status_t flash_write_block(uint32_t d
             dest_addr += write_length;
         } while ((length > 0) && (status == kStatus_Success));
 
-        SCB_EnableDCache();
 
     }
     return status;
