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qemu-arm: Merge RISC-V 32-bit support into qemu-arm port.
Signed-off-by: Damien George <damien@micropython.org>
1 parent 9647f9c commit 920e4c0

31 files changed

+154
-586
lines changed

‎.github/workflows/ports_qemu-riscv.yml

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This file was deleted.

‎ports/qemu-arm/Makefile

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Original file line numberDiff line numberDiff line change
@@ -14,14 +14,18 @@ QSTR_DEFS = qstrdefsport.h
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# MicroPython feature configurations
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MICROPY_ROM_TEXT_COMPRESSION ?= 1
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ifeq ($(QEMU_ARCH),arm)
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FROZEN_MANIFEST ?= "freeze('test-frzmpy')"
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endif
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ifeq ($(QEMU_ARCH),riscv32)
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FROZEN_MANIFEST ?= "freeze('test-frzmpy', ('frozen_const.py', 'frozen_viper.py', 'native_frozen_align.py'))"
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endif
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# include py core make definitions
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include $(TOP)/py/py.mk
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include $(TOP)/extmod/extmod.mk
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CROSS_COMPILE ?= arm-none-eabi-
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QEMU_SYSTEM = qemu-system-$(QEMU_ARCH)
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QEMU_ARGS += -machine $(QEMU_MACHINE) -nographic -monitor null -semihosting
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@@ -42,6 +46,10 @@ else
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COPT += -Os -DNDEBUG
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endif
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ifeq ($(QEMU_ARCH),arm)
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CROSS_COMPILE ?= arm-none-eabi-
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## With CoudeSourcery it's actually a little different, you just need `-T generic-m-hosted.ld`.
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## Although for some reason `$(LD)` will not find that linker script, it works with `$(CC)`.
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## It turns out that this is specific to CoudeSourcery, and ARM version of GCC ships something
@@ -51,16 +59,52 @@ endif
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LDFLAGS= -T $(LDSCRIPT) --gc-sections -Map=$(@:.elf=.map)
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LIBS = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
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54-
SRC_C = \
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SRC_C += \
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mcu/arm/startup.c \
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shared/runtime/semihosting_arm.c \
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endif
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ifeq ($(QEMU_ARCH),riscv32)
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#CROSS_COMPILE ?= riscv64-unknown-elf-
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CROSS_COMPILE ?= riscv64-elf-
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GCC_VERSION = $(word 1, $(subst ., , $(shell $(CC) -dumpversion)))
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# If Picolibc is available then select it explicitly. Ubuntu 22.04 ships its
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# bare metal RISC-V toolchain with Picolibc rather than Newlib, and the default
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# is "nosys" so a value must be provided. To avoid having per-distro
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# workarounds, always select Picolibc if available.
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PICOLIBC_SPECS = $(shell $(CC) --print-file-name=picolibc.specs)
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ifeq ($(PICOLIBC_SPECS),picolibc.specs)
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# Picolibc was not found.
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SPECS_FRAGMENT =
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else
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SPECS_FRAGMENT = --specs=$(PICOLIBC_SPECS)
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CFLAGS += $(SPECS_FRAGMENT)
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endif
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LD = $(CC)
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LDFLAGS += $(SPECS_FRAGMENT) -Wl,--gc-sections -Wl,-Map=$(@:.elf=.map)
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SRC_C += \
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mcu/rv32/interrupts.c \
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mcu/rv32/startup.c \
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QEMU_ARGS += -bios none
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endif
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SRC_C += \
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main.c \
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startup.c \
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uart.c \
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mphalport.c \
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shared/libc/string0.c \
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shared/readline/readline.c \
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shared/runtime/interrupt_char.c \
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shared/runtime/pyexec.c \
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shared/runtime/semihosting_arm.c \
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shared/runtime/stdout_helpers.c \
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shared/runtime/sys_stdio_mphal.c \
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@@ -86,6 +130,11 @@ repl: $(BUILD)/firmware.elf
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run: $(BUILD)/firmware.elf
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$(QEMU_SYSTEM) $(QEMU_ARGS) -serial pty -kernel $<
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# `make debug` will block QEMU until a debugger is connected to port 1234.
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.PHONY: debug
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debug: $(BUILD)/firmware.elf
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$(QEMU_SYSTEM) $(QEMU_ARGS) -serial mon:stdio -S -s -kernel $<
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.PHONY: test
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test: $(BUILD)/firmware.elf
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$(eval DIRNAME=ports/$(notdir $(CURDIR)))

‎ports/qemu-arm/README.md

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Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
MicroPython port to qemu-arm
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============================
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4-
This is experimental, community-supported port for Cortex-M emulation as
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provided by QEMU (http://qemu.org).
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This is experimental, community-supported port for Cortex-M and RISC-V RV32IMC
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emulation as provided by QEMU (http://qemu.org).
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The purposes of this port are to enable:
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@@ -18,6 +18,25 @@ The purposes of this port are to enable:
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- no need to use OpenOCD or anything else that might slow down the
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process in terms of plugging things together, pressing buttons, etc.
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Dependencies
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------------
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### ARM
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For ARM-based boards the build requires a bare-metal ARM toolchain, such as
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`arm-none-eabi-gcc`.
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### RISC-V
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For RISC-V-based boards the build requires a bare metal RISC-V toolchain with GCC 10
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or later, either with multilib support or 32 bits specific (M, C, and Zicsr
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extensions must be supported, along with ilp32 ABI). Both newlib and picolibc are
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supported, with the latter having precedence if found.
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Most pre-built toolchains should work out of the box, either coming from your
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Linux distribution's package manager, or independently packaged ones like
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[xPack](https://xpack.github.io/dev-tools/riscv-none-elf-gcc/).
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Build instructions
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------------------
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‎ports/qemu-arm/boards/MICROBIT.mk

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Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ CFLAGS += -mthumb -mcpu=cortex-m0 -mfloat-abi=soft
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CFLAGS += -DQEMU_SOC_NRF51
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CFLAGS += -DMICROPY_HW_MCU_NAME='"nRF51"'
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9-
LDSCRIPT = nrf51.ld
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LDSCRIPT = mcu/arm/nrf51.ld
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SRC_BOARD_O = shared/runtime/gchelper_native.o shared/runtime/gchelper_thumb1.o
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‎ports/qemu-arm/boards/MPS2_AN385.mk

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Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@ CFLAGS += -mthumb -mcpu=cortex-m3 -mfloat-abi=soft
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CFLAGS += -DQEMU_SOC_MPS2
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CFLAGS += -DMICROPY_HW_MCU_NAME='"Cortex-M3"'
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LDSCRIPT = mps2.ld
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LDSCRIPT = mcu/arm/mps2.ld
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SRC_BOARD_O = shared/runtime/gchelper_native.o shared/runtime/gchelper_thumb2.o
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‎ports/qemu-arm/boards/NETDUINO2.mk

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@@ -5,7 +5,7 @@ CFLAGS += -mthumb -mcpu=cortex-m3 -mfloat-abi=soft
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CFLAGS += -DQEMU_SOC_STM32
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CFLAGS += -DMICROPY_HW_MCU_NAME='"STM32"'
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LDSCRIPT = stm32.ld
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LDSCRIPT = mcu/arm/stm32.ld
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SRC_BOARD_O = shared/runtime/gchelper_native.o shared/runtime/gchelper_thumb2.o
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‎ports/qemu-arm/boards/SABRELITE.mk

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@@ -8,7 +8,7 @@ CFLAGS += -DMICROPY_HW_MCU_NAME='"Cortex-A9"'
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# Cortex-A9 should support unaligned-access, but qemu doesn't seem to.
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CFLAGS += -mno-unaligned-access
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11-
LDSCRIPT = imx6.ld
11+
LDSCRIPT = mcu/arm/imx6.ld
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SRC_BOARD_O = shared/runtime/gchelper_generic.o
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‎ports/qemu-arm/boards/VIRT_RV32.mk

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@@ -0,0 +1,32 @@
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QEMU_ARCH = riscv32
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QEMU_MACHINE = virt
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ABI = ilp32
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# GCC 10 and lower do not recognise the Zicsr extension in the
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# architecture name. "Make" unfortunately does not provide any simple way
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# to perform numeric comparisons, so to keep things simple we assume that
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# GCC is at least version 10 for the time being.
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ifeq ($(GCC_VERSION),10)
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ARCH ?= rv32imac
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else
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# Recent GCC versions explicitly require to declare extensions.
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ARCH ?= rv32imac_zicsr
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ARCH_LD ?= rv32imac_zicsr
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endif
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AFLAGS += -mabi=$(ABI) -march=$(ARCH)
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CFLAGS += $(AFLAGS)
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CFLAGS += -DQEMU_SOC_VIRT
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CFLAGS += -DMICROPY_HW_MCU_NAME='"$(ARCH)"'
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ARCH_LD ?= $(ARCH)
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LDSCRIPT = mcu/rv32/virt.ld
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LDFLAGS += -mabi=$(ABI) -march=$(ARCH_LD) -T $(LDSCRIPT) -Wl,-EL
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SRC_BOARD_O += shared/runtime/gchelper_native.o shared/runtime/gchelper_rv32i.o
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SRC_BOARD_O += rv/entrypoint.o
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MPY_CROSS_FLAGS += -march=rv32imc
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# These Thumb tests don't run on RV32.
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TESTS_EXCLUDE = --exclude 'inlineasm|qemu-arm/asm_test'

‎ports/qemu-arm/imx6.ld renamed to ‎ports/qemu-arm/mcu/arm/imx6.ld

File renamed without changes.

‎ports/qemu-arm/mps2.ld renamed to ‎ports/qemu-arm/mcu/arm/mps2.ld

File renamed without changes.

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