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esp32/machine_pwm: Rebase and fix compile error.
Fix duplicate line. Signed-off-by: Yoann Darche <yoannd@hotmail.com>
1 parent eb98c26 commit 93591d8

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-70
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ports/esp32/machine_pwm.c

Lines changed: 6 additions & 70 deletions
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,6 @@
3737
#include "esp_err.h"
3838
#include "esp_sleep.h"
3939
#include "esp_clk_tree.h"
40-
// #include "soc/clk_tree_defs.h"
4140
#include "soc/gpio_sig_map.h"
4241

4342

@@ -122,45 +121,6 @@ static ledc_timer_config_t timers[PWM_TIMER_MAX];
122121
#define EMPIRIC_FREQ (10) // Hz
123122
#endif
124123

125-
// Clock alias values (used by clock parameter)
126-
// PWM_LAST_CLK_IDX is not clock by a maker to identify outofindex values
127-
// PWM_AUTO_CLK is used in order to auto determinate the clock (no specific clock has been required)
128-
129-
enum { PWM_AUTO_CLK, PWM_APB_CLK, PWM_RC_FAST_CLK, PWM_REF_TICK, PWM_XTAL_CLK, PWM_PLL_CLK, _PWM_LAST_CLK_IDX };
130-
static const ledc_clk_cfg_t clk_source_map[] = {
131-
-2,
132-
#if SOC_LEDC_SUPPORT_APB_CLOCK
133-
LEDC_USE_APB_CLK,
134-
#else
135-
-1,
136-
#endif
137-
LEDC_USE_RC_FAST_CLK, // LEDC_USE_RC_FAST_CLK == LEDC_USE_RTC8M_CLK
138-
#if SOC_LEDC_SUPPORT_REF_TICK
139-
LEDC_USE_REF_TICK,
140-
#else
141-
-1,
142-
#endif
143-
#if SOC_LEDC_SUPPORT_XTAL_CLOCK
144-
LEDC_USE_XTAL_CLK,
145-
#else
146-
-1,
147-
#endif
148-
#if SOC_LEDC_SUPPORT_PLL_DIV_CLOCK
149-
LEDC_USE_PLL_DIV_CLK,
150-
#else
151-
-1,
152-
#endif
153-
};
154-
155-
// MicroPython bindings for ESP32-PWM
156-
#define MICROPY_PY_MACHINE_PWM_CLASS_CONSTANTS \
157-
{ MP_ROM_QSTR(MP_QSTR_PWM_AUTO_CLK), MP_ROM_INT(PWM_AUTO_CLK) }, \
158-
{ MP_ROM_QSTR(MP_QSTR_PWM_APB_CLK), MP_ROM_INT(PWM_APB_CLK) }, \
159-
{ MP_ROM_QSTR(MP_QSTR_PWM_RC_FAST_CLK), MP_ROM_INT(PWM_RC_FAST_CLK) }, \
160-
{ MP_ROM_QSTR(MP_QSTR_PWM_REF_TICK), MP_ROM_INT(PWM_REF_TICK) }, \
161-
{ MP_ROM_QSTR(MP_QSTR_PWM_XTAL_CLK), MP_ROM_INT(PWM_XTAL_CLK) }, \
162-
{ MP_ROM_QSTR(MP_QSTR_PWM_PLL_CLK), MP_ROM_INT(PWM_PLL_CLK) }, \
163-
164124
// Config of timer upon which we run all PWM'ed GPIO pins
165125
static bool pwm_inited = false;
166126

@@ -510,8 +470,6 @@ static ledc_clk_cfg_t find_clock_in_use() {
510470
return found_clk;
511471
}
512472

513-
514-
515473
// Helper function to check the maximum allowed frequency regarding the clock source and SoC
516474
// return True if the frequency is supported.
517475
static bool check_freq(machine_pwm_obj_t *self, int freq) {
@@ -652,6 +610,7 @@ static void mp_machine_pwm_init_helper(machine_pwm_obj_t *self,
652610
if (pwm_clk != LEDC_AUTO_CLK) {
653611
pwm_src_clock = pwm_clk;
654612
} else {
613+
655614
#if SOC_LEDC_SUPPORT_PLL_DIV_CLOCK
656615
pwm_src_clock = LEDC_USE_PLL_DIV_CLK;
657616
#elif SOC_LEDC_SUPPORT_APB_CLOCK
@@ -662,28 +621,12 @@ static void mp_machine_pwm_init_helper(machine_pwm_obj_t *self,
662621
#error No supported PWM / LEDC clocks.
663622
#endif
664623

665-
#if SOC_LEDC_SUPPORT_REF_TICK
666-
if (freq < EMPIRIC_FREQ) {
667-
pwm_src_clock = PWM_REF_TICK; // 1 MHz
668-
pwm_src_clock = PWM_APB_CLK;
669-
}
670-
#else
671-
#if SOC_LEDC_SUPPORT_PLL_DIV_CLOCK
672-
pwm_src_clock = LEDC_USE_PLL_DIV_CLK;
673-
#elif SOC_LEDC_SUPPORT_APB_CLOCK
674-
pwm_src_clock = LEDC_USE_APB_CLK;
675-
#elif SOC_LEDC_SUPPORT_XTAL_CLOCK
676-
pwm_src_clock = LEDC_USE_XTAL_CLK;
677-
#else
678-
#error No supported PWM / LEDC clocks.
679-
#endif
680-
#endif
681-
682-
#if SOC_LEDC_SUPPORT_REF_TICK
683-
if (freq < EMPIRIC_FREQ) {
684-
pwm_src_clock = LEDC_USE_REF_TICK; // 1 MHz
624+
#if SOC_LEDC_SUPPORT_REF_TICK
625+
if (freq < EMPIRIC_FREQ) {
626+
pwm_src_clock = LEDC_USE_REF_TICK; // 1 MHz
627+
}
628+
#endif
685629
}
686-
#endif
687630
}
688631

689632
// Check for clock source conflic
@@ -759,13 +702,6 @@ static void mp_machine_pwm_init_helper(machine_pwm_obj_t *self,
759702
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("out of PWM timers:%d"), PWM_TIMER_MAX); // in all modes
760703
}
761704

762-
#if !(PWM_SUPPORT_INDEP_CLOCK_SRC)
763-
// Check for the clock source consistency in case of ESP32-S3/C3 and C6
764-
if (is_timer_with_different_clock(timer_idx, pwm_src_clock)) {
765-
mp_raise_ValueError(MP_ERROR_TEXT("one or more active timers use a different clock source, which is not supported by the current SoC."));
766-
}
767-
#endif
768-
769705
// Check for the clock source consistency in case of ESP32-S3/C3 and C6
770706
if (is_timer_with_different_clock(timer_idx, pwm_src_clock)) {
771707
mp_raise_ValueError(MP_ERROR_TEXT("one or more active timers use a different clock source, which is not supported by the current SoC."));

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