rp2: Support for dynamic pins.

peterharperuk · peterharperuk · commit 9a47835d5cad · 2024-10-23T16:53:48.000+01:00
Support configuring wireless on arbitrary GPIO pins.
diff --git a/ports/rp2/CMakeLists.txt b/ports/rp2/CMakeLists.txt
@@ -193,6 +193,7 @@ set(MICROPY_SOURCE_QSTR
     ${MICROPY_PORT_DIR}/rp2_pio.c
     ${MICROPY_PORT_DIR}/rp2_dma.c
     ${CMAKE_BINARY_DIR}/pins_${MICROPY_BOARD}.c
+    ${MICROPY_PORT_DIR}/rp2_network_cyw43.c
 )
 
 set(PICO_SDK_COMPONENTS
@@ -403,6 +404,7 @@ if (MICROPY_PY_NETWORK_CYW43)
 
     list(APPEND MICROPY_SOURCE_PORT
         machine_pin_cyw43.c
+        rp2_network_cyw43.c
     )
 
     target_link_libraries(${MICROPY_TARGET}
diff --git a/ports/rp2/mpconfigport.h b/ports/rp2/mpconfigport.h
@@ -223,6 +223,10 @@ extern const struct _mp_obj_type_t mp_network_cyw43_type;
     { MP_ROM_QSTR(MP_QSTR_STAT_NO_AP_FOUND), MP_ROM_INT(CYW43_LINK_NONET) }, \
     { MP_ROM_QSTR(MP_QSTR_STAT_CONNECT_FAIL), MP_ROM_INT(CYW43_LINK_FAIL) }, \
     { MP_ROM_QSTR(MP_QSTR_STAT_GOT_IP), MP_ROM_INT(CYW43_LINK_UP) },
+
+// Override network_cyw43_make_new
+#define MICROPY_PY_NETWORK_CYW43_MAKE_NEW rp2_network_cyw43_make_new
+
 #else
 #define MICROPY_HW_NIC_CYW43
 #endif
diff --git a/ports/rp2/mpnetworkport.c b/ports/rp2/mpnetworkport.c
@@ -77,6 +77,10 @@ void cyw43_irq_init(void) {
     NVIC_SetPriority(PendSV_IRQn, IRQ_PRI_PENDSV);
 }
 
+void cyw43_irq_deinit(void) {
+    gpio_remove_raw_irq_handler(CYW43_PIN_WL_HOST_WAKE, gpio_irq_handler);
+}
+
 void cyw43_post_poll_hook(void) {
     cyw43_has_pending = 0;
     gpio_set_irq_enabled(CYW43_PIN_WL_HOST_WAKE, CYW43_IRQ_LEVEL, true);
diff --git a/ports/rp2/rp2_network_cyw43.c b/ports/rp2/rp2_network_cyw43.c
@@ -0,0 +1,65 @@
+#include "py/runtime.h"
+#include "extmod/network_cyw43.h"
+#include "extmod/modnetwork.h"
+
+void cyw43_irq_deinit(void);
+void cyw43_irq_init(void);
+
+#if CYW43_PIN_WL_DYNAMIC
+// Defined in cyw43_bus_pio_spi.c
+extern int cyw43_set_pins_wl(uint pins[CYW43_PIN_INDEX_WL_COUNT]);
+#endif
+
+#if CYW43_PIO_CLOCK_DIV_DYNAMIC
+// Defined in cyw43_bus_pio_spi.c
+extern void cyw43_set_pio_clock_divisor(uint16_t clock_div_int, uint8_t clock_div_frac);
+#endif
+
+mp_obj_t rp2_network_cyw43_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
+    enum { ARG_interface, ARG_pin_on, ARG_pin_out, ARG_pin_in, ARG_pin_wake, ARG_pin_clock, ARG_pin_cs, ARG_div, ARG_div_frac };
+    static const mp_arg_t allowed_args[] = {
+        { MP_QSTR_interface, MP_ARG_INT, {.u_int = MOD_NETWORK_STA_IF} },
+        #if CYW43_PIN_WL_DYNAMIC
+        { MP_QSTR_pin_on, MP_ARG_KW_ONLY | MP_ARG_OBJ, { .u_obj = MP_OBJ_NULL } },
+        { MP_QSTR_pin_out, MP_ARG_KW_ONLY | MP_ARG_OBJ, { .u_obj = MP_OBJ_NULL } },
+        { MP_QSTR_pin_in, MP_ARG_KW_ONLY | MP_ARG_OBJ, { .u_obj = MP_OBJ_NULL } },
+        { MP_QSTR_pin_wake, MP_ARG_KW_ONLY | MP_ARG_OBJ, { .u_obj = MP_OBJ_NULL } },
+        { MP_QSTR_pin_clock, MP_ARG_KW_ONLY | MP_ARG_OBJ, { .u_obj = MP_OBJ_NULL } },
+        { MP_QSTR_pin_cs, MP_ARG_KW_ONLY | MP_ARG_OBJ, { .u_obj = MP_OBJ_NULL } },
+        #endif
+        #if CYW43_PIO_CLOCK_DIV_DYNAMIC
+        { MP_QSTR_div, MP_ARG_KW_ONLY | MP_ARG_INT, { .u_int = 2 } },
+        { MP_QSTR_div_frac, MP_ARG_KW_ONLY | MP_ARG_INT, { .u_int = 0 } },
+        #endif
+    };
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+
+    // Set the pins
+    #if CYW43_PIN_WL_DYNAMIC
+    uint pins[CYW43_PIN_INDEX_WL_COUNT] = {
+        // REG_ON, OUT, IN, WAKE, CLOCK, CS
+        args[ARG_pin_on].u_obj == MP_OBJ_NULL ? CYW43_DEFAULT_PIN_WL_REG_ON : mp_hal_get_pin_obj(args[ARG_pin_on].u_obj),
+        args[ARG_pin_out].u_obj == MP_OBJ_NULL ? CYW43_DEFAULT_PIN_WL_DATA_OUT : mp_hal_get_pin_obj(args[ARG_pin_out].u_obj),
+        args[ARG_pin_in].u_obj == MP_OBJ_NULL ? CYW43_DEFAULT_PIN_WL_DATA_IN : mp_hal_get_pin_obj(args[ARG_pin_in].u_obj),
+        args[ARG_pin_wake].u_obj == MP_OBJ_NULL ? CYW43_DEFAULT_PIN_WL_HOST_WAKE : mp_hal_get_pin_obj(args[ARG_pin_wake].u_obj),
+        args[ARG_pin_clock].u_obj == MP_OBJ_NULL ? CYW43_DEFAULT_PIN_WL_CLOCK : mp_hal_get_pin_obj(args[ARG_pin_clock].u_obj),
+        args[ARG_pin_cs].u_obj == MP_OBJ_NULL ? CYW43_DEFAULT_PIN_WL_CS : mp_hal_get_pin_obj(args[ARG_pin_cs].u_obj),
+    };
+    // re-initialise cyw43
+    cyw43_irq_deinit();
+    cyw43_set_pins_wl(pins);
+    cyw43_irq_init();
+    #endif
+
+    #if CYW43_PIO_CLOCK_DIV_DYNAMIC
+    // set the pio clock divisor
+    cyw43_set_pio_clock_divisor((uint16_t)args[ARG_div].u_int, (uint16_t)args[ARG_div_frac].u_int);
+    #endif
+
+    if (n_args == 0 || mp_obj_get_int(all_args[ARG_interface]) == MOD_NETWORK_STA_IF) {
+        return network_cyw43_get_interface(MOD_NETWORK_STA_IF);
+    } else {
+        return network_cyw43_get_interface(MOD_NETWORK_AP_IF);
+    }
+}

Original file line number	Diff line number	Diff line change
`@@ -193,6 +193,7 @@ set(MICROPY_SOURCE_QSTR`
`193`	`193`	`${MICROPY_PORT_DIR}/rp2_pio.c`
`194`	`194`	`${MICROPY_PORT_DIR}/rp2_dma.c`
`195`	`195`	`${CMAKE_BINARY_DIR}/pins_${MICROPY_BOARD}.c`
	`196`	`+ ${MICROPY_PORT_DIR}/rp2_network_cyw43.c`
`196`	`197`	`)`
`197`	`198`
`198`	`199`	`set(PICO_SDK_COMPONENTS`
`@@ -403,6 +404,7 @@ if (MICROPY_PY_NETWORK_CYW43)`
`403`	`404`
`404`	`405`	`list(APPEND MICROPY_SOURCE_PORT`
`405`	`406`	`machine_pin_cyw43.c`
	`407`	`+ rp2_network_cyw43.c`
`406`	`408`	`)`
`407`	`409`
`408`	`410`	`target_link_libraries(${MICROPY_TARGET}`