Skip to content

Commit b7d19fe

Browse files
committed
stm32/network_lan.c: Allow defining phy_addr in the LAN constructor.
The default value is 0. Implementing that required changes to eth.c as well. The value of phy_addr is added to the eth_t data type. Signed-off-by: robert-hh <robert@hammelrath.com>
1 parent dbdcf32 commit b7d19fe

File tree

3 files changed

+28
-20
lines changed

3 files changed

+28
-20
lines changed

ports/stm32/eth.c

Lines changed: 17 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -40,8 +40,7 @@
4040
#include "lwip/dhcp.h"
4141
#include "netif/ethernet.h"
4242

43-
// ETH PHY register definitions (for LAN8742)
44-
43+
// ETH PHY register definitions (for LAN8742 and LAN8720/LAN8710)
4544
#undef PHY_BCR
4645
#define PHY_BCR (0x0000)
4746
#define PHY_BCR_SOFT_RESET (0x8000)
@@ -137,6 +136,7 @@ typedef struct _eth_t {
137136
uint32_t trace_flags;
138137
struct netif netif;
139138
struct dhcp dhcp_struct;
139+
uint32_t phy_addr;
140140
} eth_t;
141141

142142
static eth_dma_t eth_dma __attribute__((aligned(16384)));
@@ -146,7 +146,7 @@ eth_t eth_instance;
146146
STATIC void eth_mac_deinit(eth_t *self);
147147
STATIC void eth_process_frame(eth_t *self, size_t len, const uint8_t *buf);
148148

149-
STATIC void eth_phy_write(uint32_t reg, uint32_t val) {
149+
STATIC void eth_phy_write(uint32_t phy_addr, uint32_t reg, uint32_t val) {
150150
#if defined(STM32H5) || defined(STM32H7)
151151
while (ETH->MACMDIOAR & ETH_MACMDIOAR_MB) {
152152
}
@@ -165,14 +165,14 @@ STATIC void eth_phy_write(uint32_t reg, uint32_t val) {
165165
}
166166
ETH->MACMIIDR = val;
167167
uint32_t ar = ETH->MACMIIAR;
168-
ar = reg << ETH_MACMIIAR_MR_Pos | (ar & ETH_MACMIIAR_CR_Msk) | ETH_MACMIIAR_MW | ETH_MACMIIAR_MB;
168+
ar = reg << ETH_MACMIIAR_MR_Pos | (ar & ETH_MACMIIAR_CR_Msk) | ETH_MACMIIAR_MW | ETH_MACMIIAR_MB | (phy_addr << ETH_MACMIIAR_PA_Pos);
169169
ETH->MACMIIAR = ar;
170170
while (ETH->MACMIIAR & ETH_MACMIIAR_MB) {
171171
}
172172
#endif
173173
}
174174

175-
STATIC uint32_t eth_phy_read(uint32_t reg) {
175+
STATIC uint32_t eth_phy_read(uint32_t phy_addr, uint32_t reg) {
176176
#if defined(STM32H5) || defined(STM32H7)
177177
while (ETH->MACMDIOAR & ETH_MACMDIOAR_MB) {
178178
}
@@ -190,17 +190,18 @@ STATIC uint32_t eth_phy_read(uint32_t reg) {
190190
while (ETH->MACMIIAR & ETH_MACMIIAR_MB) {
191191
}
192192
uint32_t ar = ETH->MACMIIAR;
193-
ar = reg << ETH_MACMIIAR_MR_Pos | (ar & ETH_MACMIIAR_CR_Msk) | ETH_MACMIIAR_MB;
193+
ar = reg << ETH_MACMIIAR_MR_Pos | (ar & ETH_MACMIIAR_CR_Msk) | ETH_MACMIIAR_MB | (phy_addr << ETH_MACMIIAR_PA_Pos);
194194
ETH->MACMIIAR = ar;
195195
while (ETH->MACMIIAR & ETH_MACMIIAR_MB) {
196196
}
197197
return ETH->MACMIIDR;
198198
#endif
199199
}
200200

201-
void eth_init(eth_t *self, int mac_idx) {
201+
void eth_init(eth_t *self, int mac_idx, int phy_addr) {
202202
mp_hal_get_mac(mac_idx, &self->netif.hwaddr[0]);
203203
self->netif.hwaddr_len = 6;
204+
self->phy_addr = phy_addr;
204205

205206
// Configure GPIO
206207
mp_hal_pin_config_alt_static(MICROPY_HW_ETH_MDC, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, STATIC_AF_ETH_MDC);
@@ -362,7 +363,7 @@ STATIC int eth_mac_init(eth_t *self) {
362363
#endif
363364

364365
// Reset the PHY
365-
eth_phy_write(PHY_BCR, PHY_BCR_SOFT_RESET);
366+
eth_phy_write(self->phy_addr, PHY_BCR, PHY_BCR_SOFT_RESET);
366367
mp_hal_delay_ms(50);
367368

368369
// Wait for the PHY link to be established
@@ -373,8 +374,8 @@ STATIC int eth_mac_init(eth_t *self) {
373374
eth_mac_deinit(self);
374375
return -MP_ETIMEDOUT;
375376
}
376-
uint16_t bcr = eth_phy_read(0);
377-
uint16_t bsr = eth_phy_read(1);
377+
uint16_t bcr = eth_phy_read(self->phy_addr, PHY_BCR);
378+
uint16_t bsr = eth_phy_read(self->phy_addr, PHY_BSR);
378379
switch (phy_state) {
379380
case 0:
380381
if (!(bcr & PHY_BCR_SOFT_RESET)) {
@@ -383,7 +384,7 @@ STATIC int eth_mac_init(eth_t *self) {
383384
break;
384385
case 1:
385386
if (bsr & PHY_BSR_LINK_STATUS) {
386-
eth_phy_write(PHY_BCR, PHY_BCR_AUTONEG_EN);
387+
eth_phy_write(self->phy_addr, PHY_BCR, PHY_BCR_AUTONEG_EN);
387388
phy_state = 2;
388389
}
389390
break;
@@ -398,7 +399,7 @@ STATIC int eth_mac_init(eth_t *self) {
398399
}
399400

400401
// Get register with link status
401-
uint16_t phy_scsr = eth_phy_read(PHY_SCSR);
402+
uint16_t phy_scsr = eth_phy_read(self->phy_addr, PHY_SCSR);
402403

403404
// Burst mode configuration
404405
#if defined(STM32H5) || defined(STM32H7)
@@ -845,7 +846,7 @@ int eth_link_status(eth_t *self) {
845846
return 2; // link no-ip;
846847
}
847848
} else {
848-
if (eth_phy_read(PHY_BSR) & PHY_BSR_LINK_STATUS) {
849+
if (eth_phy_read(self->phy_addr, PHY_BSR) & PHY_BSR_LINK_STATUS) {
849850
return 1; // link up
850851
} else {
851852
return 0; // link down
@@ -883,10 +884,10 @@ void eth_low_power_mode(eth_t *self, bool enable) {
883884
__HAL_RCC_ETH_CLK_ENABLE();
884885
#endif
885886

886-
uint16_t bcr = eth_phy_read(PHY_BCR);
887+
uint16_t bcr = eth_phy_read(self->phy_addr, PHY_BCR);
887888
if (enable) {
888889
// Enable low-power mode.
889-
eth_phy_write(PHY_BCR, bcr | PHY_BCR_POWER_DOWN);
890+
eth_phy_write(self->phy_addr, PHY_BCR, bcr | PHY_BCR_POWER_DOWN);
890891
// Disable eth clock.
891892
#if defined(STM32H7)
892893
__HAL_RCC_ETH1MAC_CLK_DISABLE();
@@ -895,7 +896,7 @@ void eth_low_power_mode(eth_t *self, bool enable) {
895896
#endif
896897
} else {
897898
// Disable low-power mode.
898-
eth_phy_write(PHY_BCR, bcr & (~PHY_BCR_POWER_DOWN));
899+
eth_phy_write(self->phy_addr, PHY_BCR, bcr & (~PHY_BCR_POWER_DOWN));
899900
}
900901
}
901902
#endif // defined(MICROPY_HW_ETH_MDC)

ports/stm32/eth.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,7 @@
2929
typedef struct _eth_t eth_t;
3030
extern eth_t eth_instance;
3131

32-
void eth_init(eth_t *self, int mac_idx);
32+
void eth_init(eth_t *self, int mac_idx, int phy_addr);
3333
void eth_set_trace(eth_t *self, uint32_t value);
3434
struct netif *eth_netif(eth_t *self);
3535
int eth_link_status(eth_t *self);

ports/stm32/network_lan.c

Lines changed: 10 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -53,10 +53,17 @@ STATIC void network_lan_print(const mp_print_t *print, mp_obj_t self_in, mp_prin
5353
);
5454
}
5555

56-
STATIC mp_obj_t network_lan_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
57-
mp_arg_check_num(n_args, n_kw, 0, 0, false);
56+
STATIC mp_obj_t network_lan_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
57+
enum { ARG_phy_addr};
58+
static const mp_arg_t allowed_args[] = {
59+
{ MP_QSTR_phy_addr, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
60+
};
61+
// Parse args.
62+
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
63+
mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
64+
5865
const network_lan_obj_t *self = &network_lan_eth0;
59-
eth_init(self->eth, MP_HAL_MAC_ETH0);
66+
eth_init(self->eth, MP_HAL_MAC_ETH0, args[ARG_phy_addr].u_int);
6067
return MP_OBJ_FROM_PTR(self);
6168
}
6269

0 commit comments

Comments
 (0)
pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy