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#include "lwip/dhcp.h"
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#include "netif/ethernet.h"
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- // ETH PHY register definitions (for LAN8742)
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-
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+ // ETH PHY register definitions (for LAN8742 and LAN8720/LAN8710)
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#undef PHY_BCR
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#define PHY_BCR (0x0000)
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#define PHY_BCR_SOFT_RESET (0x8000)
@@ -137,6 +136,7 @@ typedef struct _eth_t {
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uint32_t trace_flags ;
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struct netif netif ;
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struct dhcp dhcp_struct ;
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+ uint32_t phy_addr ;
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} eth_t ;
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static eth_dma_t eth_dma __attribute__((aligned (16384 )));
@@ -146,7 +146,7 @@ eth_t eth_instance;
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STATIC void eth_mac_deinit (eth_t * self );
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STATIC void eth_process_frame (eth_t * self , size_t len , const uint8_t * buf );
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- STATIC void eth_phy_write (uint32_t reg , uint32_t val ) {
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+ STATIC void eth_phy_write (uint32_t phy_addr , uint32_t reg , uint32_t val ) {
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#if defined(STM32H5 ) || defined(STM32H7 )
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while (ETH -> MACMDIOAR & ETH_MACMDIOAR_MB ) {
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}
@@ -165,14 +165,14 @@ STATIC void eth_phy_write(uint32_t reg, uint32_t val) {
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}
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ETH -> MACMIIDR = val ;
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uint32_t ar = ETH -> MACMIIAR ;
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- ar = reg << ETH_MACMIIAR_MR_Pos | (ar & ETH_MACMIIAR_CR_Msk ) | ETH_MACMIIAR_MW | ETH_MACMIIAR_MB ;
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+ ar = reg << ETH_MACMIIAR_MR_Pos | (ar & ETH_MACMIIAR_CR_Msk ) | ETH_MACMIIAR_MW | ETH_MACMIIAR_MB | ( phy_addr << ETH_MACMIIAR_PA_Pos ) ;
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ETH -> MACMIIAR = ar ;
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while (ETH -> MACMIIAR & ETH_MACMIIAR_MB ) {
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}
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#endif
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}
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- STATIC uint32_t eth_phy_read (uint32_t reg ) {
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+ STATIC uint32_t eth_phy_read (uint32_t phy_addr , uint32_t reg ) {
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#if defined(STM32H5 ) || defined(STM32H7 )
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while (ETH -> MACMDIOAR & ETH_MACMDIOAR_MB ) {
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}
@@ -190,17 +190,18 @@ STATIC uint32_t eth_phy_read(uint32_t reg) {
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while (ETH -> MACMIIAR & ETH_MACMIIAR_MB ) {
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}
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uint32_t ar = ETH -> MACMIIAR ;
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- ar = reg << ETH_MACMIIAR_MR_Pos | (ar & ETH_MACMIIAR_CR_Msk ) | ETH_MACMIIAR_MB ;
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+ ar = reg << ETH_MACMIIAR_MR_Pos | (ar & ETH_MACMIIAR_CR_Msk ) | ETH_MACMIIAR_MB | ( phy_addr << ETH_MACMIIAR_PA_Pos ) ;
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ETH -> MACMIIAR = ar ;
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while (ETH -> MACMIIAR & ETH_MACMIIAR_MB ) {
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}
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return ETH -> MACMIIDR ;
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#endif
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}
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- void eth_init (eth_t * self , int mac_idx ) {
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+ void eth_init (eth_t * self , int mac_idx , int phy_addr ) {
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mp_hal_get_mac (mac_idx , & self -> netif .hwaddr [0 ]);
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self -> netif .hwaddr_len = 6 ;
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+ self -> phy_addr = phy_addr ;
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// Configure GPIO
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mp_hal_pin_config_alt_static (MICROPY_HW_ETH_MDC , MP_HAL_PIN_MODE_ALT , MP_HAL_PIN_PULL_NONE , STATIC_AF_ETH_MDC );
@@ -362,7 +363,7 @@ STATIC int eth_mac_init(eth_t *self) {
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#endif
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// Reset the PHY
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- eth_phy_write (PHY_BCR , PHY_BCR_SOFT_RESET );
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+ eth_phy_write (self -> phy_addr , PHY_BCR , PHY_BCR_SOFT_RESET );
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mp_hal_delay_ms (50 );
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// Wait for the PHY link to be established
@@ -373,8 +374,8 @@ STATIC int eth_mac_init(eth_t *self) {
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eth_mac_deinit (self );
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return - MP_ETIMEDOUT ;
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}
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- uint16_t bcr = eth_phy_read (0 );
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- uint16_t bsr = eth_phy_read (1 );
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+ uint16_t bcr = eth_phy_read (self -> phy_addr , PHY_BCR );
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+ uint16_t bsr = eth_phy_read (self -> phy_addr , PHY_BSR );
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switch (phy_state ) {
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case 0 :
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if (!(bcr & PHY_BCR_SOFT_RESET )) {
@@ -383,7 +384,7 @@ STATIC int eth_mac_init(eth_t *self) {
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break ;
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case 1 :
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if (bsr & PHY_BSR_LINK_STATUS ) {
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- eth_phy_write (PHY_BCR , PHY_BCR_AUTONEG_EN );
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+ eth_phy_write (self -> phy_addr , PHY_BCR , PHY_BCR_AUTONEG_EN );
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phy_state = 2 ;
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}
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break ;
@@ -398,7 +399,7 @@ STATIC int eth_mac_init(eth_t *self) {
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}
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// Get register with link status
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- uint16_t phy_scsr = eth_phy_read (PHY_SCSR );
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+ uint16_t phy_scsr = eth_phy_read (self -> phy_addr , PHY_SCSR );
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// Burst mode configuration
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#if defined(STM32H5 ) || defined(STM32H7 )
@@ -845,7 +846,7 @@ int eth_link_status(eth_t *self) {
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return 2 ; // link no-ip;
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}
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} else {
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- if (eth_phy_read (PHY_BSR ) & PHY_BSR_LINK_STATUS ) {
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+ if (eth_phy_read (self -> phy_addr , PHY_BSR ) & PHY_BSR_LINK_STATUS ) {
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return 1 ; // link up
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} else {
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return 0 ; // link down
@@ -883,10 +884,10 @@ void eth_low_power_mode(eth_t *self, bool enable) {
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__HAL_RCC_ETH_CLK_ENABLE ();
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#endif
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- uint16_t bcr = eth_phy_read (PHY_BCR );
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+ uint16_t bcr = eth_phy_read (self -> phy_addr , PHY_BCR );
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if (enable ) {
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// Enable low-power mode.
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- eth_phy_write (PHY_BCR , bcr | PHY_BCR_POWER_DOWN );
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+ eth_phy_write (self -> phy_addr , PHY_BCR , bcr | PHY_BCR_POWER_DOWN );
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// Disable eth clock.
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#if defined(STM32H7 )
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__HAL_RCC_ETH1MAC_CLK_DISABLE ();
@@ -895,7 +896,7 @@ void eth_low_power_mode(eth_t *self, bool enable) {
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#endif
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} else {
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// Disable low-power mode.
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- eth_phy_write (PHY_BCR , bcr & (~PHY_BCR_POWER_DOWN ));
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+ eth_phy_write (self -> phy_addr , PHY_BCR , bcr & (~PHY_BCR_POWER_DOWN ));
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}
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}
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#endif // defined(MICROPY_HW_ETH_MDC)
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