ports/rp2: Possible PSRAM fix.

MichaelBell · Gadgetoid · commit e3ba43066b1d · 2024-09-27T15:03:48.000+01:00
Signed-off-by: Phil Howard &lt;github@gadgetoid.com&gt;
diff --git a/ports/rp2/rp2_psram.c b/ports/rp2/rp2_psram.c
@@ -9,8 +9,6 @@
 size_t __no_inline_not_in_flash_func(psram_detect)() {
     int psram_size = 0;
 
-    uint32_t intr_stash = save_and_disable_interrupts();
-
     // Try and read the PSRAM ID via direct_csr.
     qmi_hw->direct_csr = 30 << QMI_DIRECT_CSR_CLKDIV_LSB | QMI_DIRECT_CSR_EN_BITS;
 
@@ -76,13 +74,14 @@ size_t __no_inline_not_in_flash_func(psram_detect)() {
         }
     }
 
-    restore_interrupts(intr_stash);
     return psram_size;
 }
 
 size_t __no_inline_not_in_flash_func(psram_init)(uint cs_pin) {
     gpio_set_function(cs_pin, GPIO_FUNC_XIP_CS1);
 
+    uint32_t intr_stash = save_and_disable_interrupts();
+
     size_t psram_size = psram_detect();
 
     if (!psram_size) {
@@ -162,5 +161,7 @@ size_t __no_inline_not_in_flash_func(psram_init)(uint cs_pin) {
     // Enable writes to PSRAM
     hw_set_bits(&xip_ctrl_hw->ctrl, XIP_CTRL_WRITABLE_M1_BITS);
 
+    restore_interrupts(intr_stash);
+
     return psram_size;
 }

Original file line number	Diff line number	Diff line change
`@@ -9,8 +9,6 @@`
`9`	`9`	`size_t __no_inline_not_in_flash_func(psram_detect)() {`
`10`	`10`	`int psram_size = 0;`
`11`	`11`
`12`		`- uint32_t intr_stash = save_and_disable_interrupts();`
`13`		`-`
`14`	`12`	`// Try and read the PSRAM ID via direct_csr.`
`15`	`13`	`qmi_hw->direct_csr = 30 << QMI_DIRECT_CSR_CLKDIV_LSB \| QMI_DIRECT_CSR_EN_BITS;`
`16`	`14`
`@@ -76,13 +74,14 @@ size_t __no_inline_not_in_flash_func(psram_detect)() {`
`76`	`74`	`}`
`77`	`75`	`}`
`78`	`76`
`79`		`- restore_interrupts(intr_stash);`
`80`	`77`	`return psram_size;`
`81`	`78`	`}`
`82`	`79`
`83`	`80`	`size_t __no_inline_not_in_flash_func(psram_init)(uint cs_pin) {`
`84`	`81`	`gpio_set_function(cs_pin, GPIO_FUNC_XIP_CS1);`
`85`	`82`
	`83`	`+ uint32_t intr_stash = save_and_disable_interrupts();`
	`84`	`+`
`86`	`85`	`size_t psram_size = psram_detect();`
`87`	`86`
`88`	`87`	`if (!psram_size) {`
`@@ -162,5 +161,7 @@ size_t __no_inline_not_in_flash_func(psram_init)(uint cs_pin) {`
`162`	`161`	`// Enable writes to PSRAM`
`163`	`162`	`hw_set_bits(&xip_ctrl_hw->ctrl, XIP_CTRL_WRITABLE_M1_BITS);`
`164`	`163`
	`164`	`+ restore_interrupts(intr_stash);`
	`165`	`+`
`165`	`166`	`return psram_size;`
`166`	`167`	`}`