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ports/renesas-ra/boards/VK-RA6M5: New Board.
ports/renesas-ra/boards: New processor RA6M5. ports/renesas-ra: Integration to the existing RA family. Signed-off-by: mbedNoobNinja <novoltage@gmail.com>
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ports/renesas-ra/Makefile

Lines changed: 40 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -16,48 +16,17 @@ endif
1616
# If the build directory is not given, make it reflect the board name.
1717
BUILD ?= build-$(BOARD)
1818

19-
ifeq ($(BOARD),RA4M1_CLICKER)
20-
BOARD_LOW = ra4m1_ek
21-
CMSIS_MCU_LOW = ra4m1
22-
CMSIS_MCU_CAP = RA4M1
23-
USE_FSP_LPM = 0
24-
endif
25-
26-
ifeq ($(BOARD),EK_RA4M1)
27-
BOARD_LOW = ra4m1_ek
28-
CMSIS_MCU_LOW = ra4m1
29-
CMSIS_MCU_CAP = RA4M1
30-
USE_FSP_LPM = 0
31-
endif
32-
33-
ifeq ($(BOARD),EK_RA4W1)
34-
BOARD_LOW = ra4w1_ek
35-
CMSIS_MCU_LOW = ra4w1
36-
CMSIS_MCU_CAP = RA4W1
37-
USE_FSP_LPM = 1
38-
endif
39-
40-
ifeq ($(BOARD),EK_RA6M1)
41-
BOARD_LOW = ra6m1_ek
42-
CMSIS_MCU_LOW = ra6m1
43-
CMSIS_MCU_CAP = RA6M1
44-
USE_FSP_LPM = 1
45-
endif
46-
47-
ifeq ($(BOARD),EK_RA6M2)
48-
BOARD_LOW = ra6m2_ek
49-
CMSIS_MCU_LOW = ra6m2
50-
CMSIS_MCU_CAP = RA6M2
51-
USE_FSP_LPM = 1
52-
endif
53-
5419
# select use wrapper function of FSP library
5520
USE_FSP_FLASH = 1
5621

5722
include ../../py/mkenv.mk
5823
-include mpconfigport.mk
5924
include $(BOARD_DIR)/mpconfigboard.mk
6025

26+
USE_FSP_LPM ?= 1
27+
USE_FSP_QSPI ?= 0
28+
FSP_BOARD_NAME ?= $(shell echo $(BOARD) | tr '[:upper:]' '[:lower:]')
29+
6130
# Files that are generated and needed before the QSTR build.
6231
#QSTR_GENERATED_HEADERS = $(BUILD)/pins_qstr.h $(BUILD)/modstm_qstr.h
6332
QSTR_GENERATED_HEADERS = $(BUILD)/pins_qstr.h
@@ -100,16 +69,18 @@ INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/inc/api
10069
INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/inc/instances
10170
INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include
10271
#INC += -Ilwip_inc
103-
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA4M1 RA4W1 RA6M1 RA6M2))
72+
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA4M1 RA4W1 RA6M1 RA6M2 RA6M5))
10473
INC += -Ira
10574
endif
10675
INC += -I$(BOARD_DIR)/ra_gen
76+
INC += -I$(BOARD_DIR)/ra_cfg/driver
10777
INC += -I$(BOARD_DIR)/ra_cfg/fsp_cfg
10878
INC += -I$(BOARD_DIR)/ra_cfg/fsp_cfg/bsp
10979
INC += -Idebug
11080

11181
CFLAGS += -D$(CMSIS_MCU)
11282
CFLAGS += -DRA_HAL_H='<$(CMSIS_MCU)_hal.h>'
83+
CFLAGS += -DRA_CFG_H='<$(FSP_BOARD_NAME)_conf.h>'
11384

11485
# Basic Cortex-M flags
11586
CFLAGS_CORTEX_M = -mthumb
@@ -122,12 +93,19 @@ CFLAGS_CORTEX_M += -mfpu=fpv4-sp-d16 -mfloat-abi=hard
12293
SUPPORTS_HARDWARE_FP_SINGLE = 1
12394
endif
12495

96+
ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES),m33))
97+
CFLAGS_CORTEX_M += -mfpu=fpv5-sp-d16 -mfloat-abi=hard
98+
SUPPORTS_HARDWARE_FP_SINGLE = 1
99+
endif
100+
125101
# Options for particular MCU series
126102
CFLAGS_MCU_RA4M1 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
127103
CFLAGS_MCU_RA4W1 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
128104
CFLAGS_MCU_RA6M1 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
129105
CFLAGS_MCU_RA6M2 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
106+
CFLAGS_MCU_RA6M5 = $(CFLAGS_CORTEX_M) -mtune=cortex-m33 -mcpu=cortex-m33
130107

108+
ASFLAGS += $(CFLAGS_CORTEX_M) -mcpu=cortex-$(MCU_SERIES)
131109
CFLAGS += $(INC) -Wall -Wpointer-arith -Werror -Wdouble-promotion -Wfloat-conversion -std=gnu99 -nostdlib $(CFLAGS_EXTRA)
132110
#CFLAGS += -D$(CMSIS_MCU)
133111
CFLAGS += $(CFLAGS_MCU_$(CMSIS_MCU))
@@ -313,11 +291,13 @@ SRC_C += \
313291
gccollect.c \
314292
help.c \
315293
machine_adc.c \
294+
machine_dac.c \
316295
machine_i2c.c \
317296
machine_spi.c \
318297
machine_uart.c \
319298
machine_pin.c \
320299
machine_rtc.c \
300+
machine_sdcard.c \
321301
modmachine.c \
322302
extint.c \
323303
usrsw.c \
@@ -361,6 +341,17 @@ HAL_SRC_C += $(addprefix $(HAL_DIR)/ra/fsp/src/,\
361341
r_ioport/r_ioport.c \
362342
)
363343

344+
ifeq ($(USE_FSP_QSPI), 1)
345+
CFLAGS += -DUSE_FSP_QSPI
346+
HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_qspi/r_qspi.c
347+
endif
348+
349+
ifeq ($(USE_FSP_SDHI), 1)
350+
CFLAGS += -DUSE_FSP_SDHI
351+
HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_sdhi/r_sdhi.c \
352+
$(HAL_DIR)/ra/fsp/src/r_dtc/r_dtc.c
353+
endif
354+
364355
ifeq ($(USE_FSP_LPM), 1)
365356
CFLAGS += -DUSE_FSP_LPM
366357
HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_lpm/r_lpm.c
@@ -373,16 +364,17 @@ HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_flash_lp/r_flash_lp.c
373364
endif
374365
endif
375366

376-
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA6M1 RA6M2))
367+
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA6M1 RA6M2 RA6M5))
377368
ifeq ($(USE_FSP_FLASH), 1)
378369
CFLAGS += -DUSE_FSP_FLASH
379370
HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_flash_hp/r_flash_hp.c
380371
endif
381372
endif
382373

383-
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA4M1 RA4W1 RA6M1 RA6M2))
374+
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA4M1 RA4W1 RA6M1 RA6M2 RA6M5))
384375
HAL_SRC_C += $(addprefix ra/,\
385376
ra_adc.c \
377+
ra_dac.c \
386378
ra_flash.c \
387379
ra_gpio.c \
388380
ra_i2c.c \
@@ -393,6 +385,7 @@ HAL_SRC_C += $(addprefix ra/,\
393385
ra_sci.c \
394386
ra_spi.c \
395387
ra_timer.c \
388+
ra_gpt.c \
396389
ra_utils.c \
397390
)
398391

@@ -409,6 +402,12 @@ OBJ += $(addprefix $(BUILD)/, $(SRC_CXX:.cpp=.o))
409402
OBJ += $(addprefix $(BUILD)/, $(SRC_O))
410403
OBJ += $(BUILD)/pins_$(BOARD).o
411404

405+
ifeq ($(CMSIS_MCU),RA6M5)
406+
$(BUILD)/shared/runtime/gchelper_thumb2.o: $(TOP)/shared/runtime/gchelper_thumb2.s
407+
$(ECHO) "AS $<"
408+
$(Q)$(AS) $(ASFLAGS) -o $@ $<
409+
endif
410+
412411
# This file contains performance critical functions so turn up the optimisation
413412
# level. It doesn't add much to the code size and improves performance a bit.
414413
# Don't use -O3 with this file because gcc tries to optimise memset in terms of itself.
@@ -495,6 +494,9 @@ endif
495494
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA6M2))
496495
AF_FILE = boards/ra6m2_af.csv
497496
endif
497+
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA6M5))
498+
AF_FILE = boards/ra6m5_af.csv
499+
endif
498500
GEN_PINS_SRC = $(BUILD)/pins_$(BOARD).c
499501
GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
500502
GEN_PINS_QSTR = $(BUILD)/pins_qstr.h

ports/renesas-ra/RA4M1_hal.h

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,8 +31,11 @@
3131
// #include "hal_data.h"
3232
#include "bsp_api.h"
3333
#include "common_data.h"
34+
#if defined(USE_DBG_PRINT)
35+
#include RA_CFG_H
36+
#endif
3437

35-
#define SCI_CH 0
38+
#define SCI_CH DEFAULT_DBG_CH
3639
#define SCI_BAUD 115200
3740
#define UART_CH SCI_CH
3841
#define UART_TxStr sci_tx_str
@@ -56,8 +59,10 @@
5659

5760
#include "ra_config.h"
5861
#include "ra_adc.h"
62+
#include "ra_dac.h"
5963
#include "ra_flash.h"
6064
#include "ra_gpio.h"
65+
#include "ra_gpt.h"
6166
#include "ra_i2c.h"
6267
#include "ra_icu.h"
6368
#include "ra_init.h"

ports/renesas-ra/RA4W1_hal.h

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,8 +31,11 @@
3131
// #include "hal_data.h"
3232
#include "bsp_api.h"
3333
#include "common_data.h"
34+
#if defined(USE_DBG_PRINT)
35+
#include RA_CFG_H
36+
#endif
3437

35-
#define SCI_CH 0
38+
#define SCI_CH DEFAULT_DBG_CH
3639
#define SCI_BAUD 115200
3740
#define UART_CH SCI_CH
3841
#define UART_TxStr sci_tx_str
@@ -56,8 +59,10 @@
5659

5760
#include "ra_config.h"
5861
#include "ra_adc.h"
62+
#include "ra_dac.h"
5963
#include "ra_flash.h"
6064
#include "ra_gpio.h"
65+
#include "ra_gpt.h"
6166
#include "ra_i2c.h"
6267
#include "ra_icu.h"
6368
#include "ra_init.h"

ports/renesas-ra/RA6M1_hal.h

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,8 +31,11 @@
3131
// #include "hal_data.h"
3232
#include "bsp_api.h"
3333
#include "common_data.h"
34+
#if defined(USE_DBG_PRINT)
35+
#include RA_CFG_H
36+
#endif
3437

35-
#define SCI_CH 0
38+
#define SCI_CH DEFAULT_DBG_CH
3639
#define SCI_BAUD 115200
3740
#define UART_CH SCI_CH
3841
#define UART_TxStr sci_tx_str
@@ -56,8 +59,10 @@
5659

5760
#include "ra_config.h"
5861
#include "ra_adc.h"
62+
#include "ra_dac.h"
5963
#include "ra_flash.h"
6064
#include "ra_gpio.h"
65+
#include "ra_gpt.h"
6166
#include "ra_i2c.h"
6267
#include "ra_icu.h"
6368
#include "ra_init.h"

ports/renesas-ra/RA6M2_hal.h

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,8 +31,11 @@
3131
// #include "hal_data.h"
3232
#include "bsp_api.h"
3333
#include "common_data.h"
34+
#if defined(USE_DBG_PRINT)
35+
#include RA_CFG_H
36+
#endif
3437

35-
#define SCI_CH 0
38+
#define SCI_CH DEFAULT_DBG_CH
3639
#define SCI_BAUD 115200
3740
#define UART_CH SCI_CH
3841
#define UART_TxStr sci_tx_str
@@ -56,8 +59,10 @@
5659

5760
#include "ra_config.h"
5861
#include "ra_adc.h"
62+
#include "ra_dac.h"
5963
#include "ra_flash.h"
6064
#include "ra_gpio.h"
65+
#include "ra_gpt.h"
6166
#include "ra_i2c.h"
6267
#include "ra_icu.h"
6368
#include "ra_init.h"

ports/renesas-ra/RA6M5_hal.h

Lines changed: 109 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,109 @@
1+
/*
2+
* The MIT License (MIT)
3+
*
4+
* Copyright (c) 2021 Renesas Electronics Corporation
5+
* Copyright (c) 2023 Vekatech Ltd.
6+
*
7+
* Permission is hereby granted, free of charge, to any person obtaining a copy
8+
* of this software and associated documentation files (the "Software"), to deal
9+
* in the Software without restriction, including without limitation the rights
10+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11+
* copies of the Software, and to permit persons to whom the Software is
12+
* furnished to do so, subject to the following conditions:
13+
*
14+
* The above copyright notice and this permission notice shall be included in
15+
* all copies or substantial portions of the Software.
16+
*
17+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23+
* THE SOFTWARE.
24+
*/
25+
26+
#ifndef PORTS_RA_RA6M5_HAL_H_
27+
#define PORTS_RA_RA6M5_HAL_H_
28+
29+
#include <stdio.h>
30+
#include <stdint.h>
31+
#include <stdbool.h>
32+
// #include "hal_data.h"
33+
#include "bsp_api.h"
34+
#include "common_data.h"
35+
#if defined(USE_DBG_PRINT)
36+
#include RA_CFG_H
37+
#endif
38+
39+
#define SCI_CH DEFAULT_DBG_CH
40+
#define SCI_BAUD 115200
41+
#define UART_CH SCI_CH
42+
#define UART_TxStr sci_tx_str
43+
#define PCLK 100000000
44+
45+
#define RA_PRI_SYSTICK (0)
46+
#define RA_PRI_UART (1)
47+
#define RA_PRI_SDIO (4)
48+
#define RA_PRI_DMA (5)
49+
#define RA_PRI_FLASH (6)
50+
#define RA_PRI_OTG_FS (6)
51+
#define RA_PRI_OTG_HS (6)
52+
#define RA_PRI_TIM5 (6)
53+
#define RA_PRI_CAN (7)
54+
#define RA_PRI_SPI (8)
55+
#define RA_PRI_I2C (8)
56+
#define RA_PRI_TIMX (13)
57+
#define RA_PRI_EXTINT (14)
58+
#define RA_PRI_PENDSV (15)
59+
#define RA_PRI_RTC_WKUP (15)
60+
61+
#include "ra_config.h"
62+
#include "ra_adc.h"
63+
#include "ra_dac.h"
64+
#include "ra_flash.h"
65+
#include "ra_gpio.h"
66+
#include "ra_gpt.h"
67+
#include "ra_i2c.h"
68+
#include "ra_icu.h"
69+
#include "ra_init.h"
70+
#include "ra_int.h"
71+
#include "ra_rtc.h"
72+
#include "ra_sci.h"
73+
#include "ra_spi.h"
74+
#include "ra_timer.h"
75+
#include "ra_utils.h"
76+
77+
typedef enum {
78+
HAL_OK = 0x00,
79+
HAL_ERROR = 0x01,
80+
HAL_BUSY = 0x02,
81+
HAL_TIMEOUT = 0x03
82+
} HAL_StatusTypeDef;
83+
84+
#define __IO volatile
85+
86+
#if defined(USE_DBG_PRINT)
87+
#if !defined(DEBUG_CH)
88+
#define DEBUG_CH SCI_CH
89+
#endif
90+
#if (DEBUG_CH == 6)
91+
#define DEBUG_TX_PIN P506
92+
#define DEBUG_RX_PIN P505
93+
#endif
94+
#if (DEBUG_CH == 7)
95+
#define DEBUG_TX_PIN P613
96+
#define DEBUG_RX_PIN P614
97+
#endif
98+
#if (DEBUG_CH == 9)
99+
#define DEBUG_TX_PIN P109
100+
#define DEBUG_RX_PIN P110
101+
#endif
102+
#define DEBUG_TXSTR(s) ra_sci_tx_str(DEBUG_CH, (unsigned char *)s)
103+
#define DEBUG_TXCH(c) ra_sci_tx_ch(DEBUG_CH, c)
104+
#else
105+
#define DEBUG_TXSTR(s)
106+
#define DEBUG_TXCH(c)
107+
#endif
108+
109+
#endif /* PORTS_RA_RA6M5_HAL_H_ */

ports/renesas-ra/boards/EK_RA4M1/mpconfigboard.mk

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,9 @@ LD_FILES = boards/EK_RA4M1/ra4m1_ek.ld
44

55
# MicroPython settings
66
MICROPY_VFS_FAT = 1
7+
USE_FSP_LPM = 0
8+
9+
CFLAGS+=-DDEFAULT_DBG_CH=0
710

811
# Don't include default frozen modules because MCU is tight on flash space
912
FROZEN_MANIFEST ?= boards/EK_RA4M1/manifest.py

ports/renesas-ra/boards/EK_RA4W1/mpconfigboard.mk

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,3 +4,5 @@ LD_FILES = boards/EK_RA4W1/ra4w1_ek.ld
44

55
# MicroPython settings
66
MICROPY_VFS_FAT = 1
7+
8+
CFLAGS+=-DDEFAULT_DBG_CH=0

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