From 64ad6764240e5cf59a8c38272226569fdbf8071d Mon Sep 17 00:00:00 2001 From: "Kwabena W. Agyeman" Date: Mon, 21 Aug 2023 20:03:52 -0700 Subject: [PATCH 1/3] mimxrt/boards: Define missing SNVS pins for all processors. Signed-off-by: "Kwabena W. Agyeman" --- ports/mimxrt/boards/MIMXRT1011_af.csv | 1 + ports/mimxrt/boards/MIMXRT1015_af.csv | 1 + ports/mimxrt/boards/MIMXRT1021_af.csv | 1 + ports/mimxrt/boards/MIMXRT1052_af.csv | 3 +++ ports/mimxrt/boards/MIMXRT1062_af.csv | 6 +++--- ports/mimxrt/boards/MIMXRT1064_af.csv | 3 +++ ports/mimxrt/boards/MIMXRT1176_af.csv | 2 ++ ports/mimxrt/boards/make-pins.py | 6 ++++-- 8 files changed, 18 insertions(+), 5 deletions(-) diff --git a/ports/mimxrt/boards/MIMXRT1011_af.csv b/ports/mimxrt/boards/MIMXRT1011_af.csv index 11dd08546332b..be8a9c634dd55 100644 --- a/ports/mimxrt/boards/MIMXRT1011_af.csv +++ b/ports/mimxrt/boards/MIMXRT1011_af.csv @@ -42,3 +42,4 @@ GPIO_SD_10,FLEXSPI_A_SCLK,LPSPI2_SDO,LPUART2_TXD,,FLEXIO1_IO16,GPIO2_IO10,,,,,,, GPIO_SD_11,FLEXSPI_A_DATA3,LPSPI2_SCK,LPUART1_RXD,,FLEXIO1_IO17,GPIO2_IO11,WDOG1_RST_B_DEB,,,,,,ALT5 GPIO_SD_12,FLEXSPI_A_DQS,LPSPI2_PCS0,LPUART1_TXD,,FLEXIO1_IO18,GPIO2_IO12,WDOG2_RST_B_DEB,,,,,,ALT5 GPIO_SD_13,FLEXSPI_B_SCLK,SAI3_RX_BCLK,ARM_CM7_TXEV,CCM_PMIC_RDY,FLEXIO1_IO19,GPIO2_IO13,SRC_BT_CFG3,,,,,,ALT5 +PMIC_ON_REQ,SNVS_LP_PMIC_ON_REQ,,,,,GPIO5_IO00,,,,,,,ALT0 diff --git a/ports/mimxrt/boards/MIMXRT1015_af.csv b/ports/mimxrt/boards/MIMXRT1015_af.csv index d9886625830a2..0d2504733c1b1 100644 --- a/ports/mimxrt/boards/MIMXRT1015_af.csv +++ b/ports/mimxrt/boards/MIMXRT1015_af.csv @@ -55,3 +55,4 @@ GPIO_SD_B1_08,,FLEXSPI_A_DATA0,,SAI3_TX_DATA,LPSPI2_SDO,GPIO3_IO28,,,,,,,ALT5 GPIO_SD_B1_09,,FLEXSPI_A_DATA2,,SAI3_RX_BCLK,LPSPI2_SDI,GPIO3_IO29,CCM_REF_EN_B,,,,,,ALT5 GPIO_SD_B1_10,,FLEXSPI_A_DATA1,,SAI3_RX_SYNC,LPSPI2_PCS2,GPIO3_IO30,SRC_SYSTEM_RESET,,,,,,ALT5 GPIO_SD_B1_11,,FLEXSPI_A_SS0_B,,SAI3_RX_DATA,LPSPI2_PCS3,GPIO3_IO31,SRC_EARLY_RESET,,,,,,ALT5 +PMIC_ON_REQ,SNVS_LP_PMIC_ON_REQ,,,,,GPIO5_IO01,,,,,,,ALT0 diff --git a/ports/mimxrt/boards/MIMXRT1021_af.csv b/ports/mimxrt/boards/MIMXRT1021_af.csv index 3ce38eb0b9a46..79ef29927c978 100644 --- a/ports/mimxrt/boards/MIMXRT1021_af.csv +++ b/ports/mimxrt/boards/MIMXRT1021_af.csv @@ -92,3 +92,4 @@ GPIO_SD_B1_08,USDHC2_DATA4,FLEXSPI_A_DATA0,ENET_RX_ER,SAI3_TX_DATA,LPSPI2_SDO,GP GPIO_SD_B1_09,USDHC2_DATA5,FLEXSPI_A_DATA2,ENET_TX_EN,SAI3_RX_BCLK,LPSPI2_SDI,GPIO3_IO29,CCM_REF_EN_B,,,,,,ALT5 GPIO_SD_B1_10,USDHC2_DATA6,FLEXSPI_A_DATA1,ENET_TX_DATA0,SAI3_RX_SYNC,LPSPI2_PCS2,GPIO3_IO30,SRC_SYSTEM_RESET,,,,,,ALT5 GPIO_SD_B1_11,USDHC2_DATA7,FLEXSPI_A_SS0_B,ENET_TX_DATA1,SAI3_RX_DATA,LPSPI2_PCS3,GPIO3_IO31,SRC_EARLY_RESET,,,,,,ALT5 +PMIC_ON_REQ,SNVS_LP_PMIC_ON_REQ,,,,,GPIO5_IO01,,,,,,,ALT0 diff --git a/ports/mimxrt/boards/MIMXRT1052_af.csv b/ports/mimxrt/boards/MIMXRT1052_af.csv index 754bf4ab7bf0f..ee11a12cfdc79 100644 --- a/ports/mimxrt/boards/MIMXRT1052_af.csv +++ b/ports/mimxrt/boards/MIMXRT1052_af.csv @@ -123,3 +123,6 @@ GPIO_SD_B1_08,USDHC2_DATA4,FLEXSPI_A_DATA0,LPUART7_TXD,SAI1_TX_BCLK,LPSPI2_SOUT, GPIO_SD_B1_09,USDHC2_DATA5,FLEXSPI_A_DATA1,LPUART7_RXD,SAI1_TX_SYNC,LPSPI2_SIN,GPIO3_IO09,,,,,,,ALT5 GPIO_SD_B1_10,USDHC2_DATA6,FLEXSPI_A_DATA2,LPUART2_RXD,LPI2C2_SDA,LPSPI2_PCS2,GPIO3_IO10,,,,,,,ALT5 GPIO_SD_B1_11,USDHC2_DATA7,FLEXSPI_A_DATA3,LPUART2_TXD,LPI2C2_SCL,LPSPI2_PCS3,GPIO3_IO11,,,,,,,ALT5 +WAKEUP,,,,,,GPIO5_IO00,,NMI_GLUE_NMI,,,,,ALT5 +PMIC_ON_REQ,SNVS_LP_PMIC_ON_REQ,,,,,GPIO5_IO01,,,,,,,ALT0 +PMIC_STBY_REQ,CCM_PMIC_VSTBY_REQ,,,,,GPIO5_IO02,,,,,,,ALT0 diff --git a/ports/mimxrt/boards/MIMXRT1062_af.csv b/ports/mimxrt/boards/MIMXRT1062_af.csv index d2f0b22023cda..9af33137ab63f 100644 --- a/ports/mimxrt/boards/MIMXRT1062_af.csv +++ b/ports/mimxrt/boards/MIMXRT1062_af.csv @@ -123,6 +123,6 @@ GPIO_SD_B1_08,USDHC2_DATA4,FLEXSPI_A_DATA0,LPUART7_TXD,SAI1_TX_BCLK,LPSPI2_SOUT, GPIO_SD_B1_09,USDHC2_DATA5,FLEXSPI_A_DATA1,LPUART7_RXD,SAI1_TX_SYNC,LPSPI2_SIN,GPIO3_IO09,,,,,,,ALT5 GPIO_SD_B1_10,USDHC2_DATA6,FLEXSPI_A_DATA2,LPUART2_RXD,LPI2C2_SDA,LPSPI2_PCS2,GPIO3_IO10,,,,,,,ALT5 GPIO_SD_B1_11,USDHC2_DATA7,FLEXSPI_A_DATA3,LPUART2_TXD,LPI2C2_SCL,LPSPI2_PCS3,GPIO3_IO11,,,,,,,ALT5 -WAKEUP,,,,,,GPIO5_IO00,,NMI,,,,,ALT5 -PMIC_ON_REQ,SNVS_PMIC_ON_REQ,,,,,GPIO5_IO01,,,,,,,ALT0 -PMIC_STBY_REQ,CCM_PMIC_STBY_REQ,,,,,GPIO5_IO02,,,,,,,ALT0 +WAKEUP,,,,,,GPIO5_IO00,,NMI_GLUE_NMI,,,,,ALT5 +PMIC_ON_REQ,SNVS_LP_PMIC_ON_REQ,,,,,GPIO5_IO01,,,,,,,ALT0 +PMIC_STBY_REQ,CCM_PMIC_VSTBY_REQ,,,,,GPIO5_IO02,,,,,,,ALT0 diff --git a/ports/mimxrt/boards/MIMXRT1064_af.csv b/ports/mimxrt/boards/MIMXRT1064_af.csv index 074a3f69ab3b4..bcd063ff3d1aa 100644 --- a/ports/mimxrt/boards/MIMXRT1064_af.csv +++ b/ports/mimxrt/boards/MIMXRT1064_af.csv @@ -123,3 +123,6 @@ GPIO_SD_B1_08,USDHC2_DATA4,FLEXSPI_A_DATA0,LPUART7_TXD,SAI1_TX_BCLK,LPSPI2_SOUT, GPIO_SD_B1_09,USDHC2_DATA5,FLEXSPI_A_DATA1,LPUART7_RXD,SAI1_TX_SYNC,LPSPI2_SIN,GPIO3_IO09,,,,,,,ALT5 GPIO_SD_B1_10,USDHC2_DATA6,FLEXSPI_A_DATA2,LPUART2_RXD,LPI2C2_SDA,LPSPI2_PCS2,GPIO3_IO10,,,,,,,ALT5 GPIO_SD_B1_11,USDHC2_DATA7,FLEXSPI_A_DATA3,LPUART2_TXD,LPI2C2_SCL,LPSPI2_PCS3,GPIO3_IO11,,,,,,,ALT5 +WAKEUP,,,,,,GPIO5_IO00,,NMI_GLUE_NMI,,,,,ALT5 +PMIC_ON_REQ,SNVS_LP_PMIC_ON_REQ,,,,,GPIO5_IO01,,,,,,,ALT0 +PMIC_STBY_REQ,CCM_PMIC_VSTBY_REQ,,,,,GPIO5_IO02,,,,,,,ALT0 diff --git a/ports/mimxrt/boards/MIMXRT1176_af.csv b/ports/mimxrt/boards/MIMXRT1176_af.csv index 21fd2a24178ba..5e99a49003af7 100644 --- a/ports/mimxrt/boards/MIMXRT1176_af.csv +++ b/ports/mimxrt/boards/MIMXRT1176_af.csv @@ -107,6 +107,8 @@ GPIO_LPSR_13,JTAG_MUX_MOD,MIC_BITSTREAM1,PIT2_TRIGGER1,,,GPIO6_IO13,,SAI4_RX_DAT GPIO_LPSR_14,JTAG_MUX_TCK,MIC_BITSTREAM2,PIT2_TRIGGER2,,,GPIO6_IO14,,SAI4_RX_BCLK,LPSPI5_SOUT,,GPIO12_IO14,,, GPIO_LPSR_15,JTAG_MUX_TMS,MIC_BITSTREAM3,PIT2_TRIGGER3,,,GPIO6_IO15,,SAI4_RX_SYNC,LPSPI5_SIN,,GPIO12_IO15,,, WAKEUP_DIG,,,,,,GPIO13_IO00,,NMI_GLUE_NMI,,,,,, +PMIC_ON_REQ_DIG,SNVS_LP_PMIC_ON_REQ,,,,,GPIO13_IO01,,,,,,,, +PMIC_STBY_REQ_DIG,CCM_PMIC_VSTBY_REQ,,,,,GPIO13_IO02,,,,,,,, GPIO_DISP_B1_00,VIDEO_MUX_LCDIF_CLK,ENET_1G_RX_EN,,TMR1_TIMER0,XBAR1_INOUT26,GPIO4_IO21,,,ENET_QOS_RX_EN,,GPIO10_IO21,,, GPIO_DISP_B1_01,VIDEO_MUX_LCDIF_ENABLE,ENET_1G_RX_CLK,ENET_1G_RX_ER,TMR1_TIMER1,XBAR1_INOUT27,GPIO4_IO22,,,ENET_QOS_RX_CLK,ENET_QOS_RX_ER,GPIO10_IO22,,, GPIO_DISP_B1_02,VIDEO_MUX_LCDIF_HSYNC,ENET_1G_RX_DATA00,LPI2C3_SCL,TMR1_TIMER2,XBAR1_INOUT28,GPIO4_IO23,,,ENET_QOS_RX_DATA00,LPUART1_TXD,GPIO10_IO23,,, diff --git a/ports/mimxrt/boards/make-pins.py b/ports/mimxrt/boards/make-pins.py index 51ae9eb717c8c..5795e2f0421c1 100644 --- a/ports/mimxrt/boards/make-pins.py +++ b/ports/mimxrt/boards/make-pins.py @@ -25,8 +25,8 @@ r"IOMUXC_(?PGPIO_DISP_B\d_\d\d)_(?P\w+) (?P\w+), (?P\w+), (?P\w+), (?P\w+), (?P\w+)", r"IOMUXC_(?PGPIO_LPSR_\d\d)_(?P\w+) (?P\w+), (?P\w+), (?P\w+), (?P\w+), (?P\w+)", r"IOMUXC_[SNVS_]*(?PWAKEUP[_DIG]*)_(?P\w+) (?P\w+), (?P\w+), (?P\w+), (?P\w+), (?P\w+)", - r"IOMUXC_SNVS_(?PPMIC_ON_REQ)_(?P\w+) (?P\w+), (?P\w+), (?P\w+), (?P\w+), (?P\w+)", - r"IOMUXC_SNVS_(?PPMIC_STBY_REQ)_(?P\w+) (?P\w+), (?P\w+), (?P\w+), (?P\w+), (?P\w+)", + r"IOMUXC_[SNVS_]*(?PPMIC_ON_REQ[_DIG]*)_(?P\w+) (?P\w+), (?P\w+), (?P\w+), (?P\w+), (?P\w+)", + r"IOMUXC_[SNVS_]*(?PPMIC_STBY_REQ[_DIG]*)_(?P\w+) (?P\w+), (?P\w+), (?P\w+), (?P\w+), (?P\w+)", r"IOMUXC_(?PGPIO_SNVS_\d\d_DIG)_(?P\w+) (?P\w+), (?P\w+), (?P\w+), (?P\w+), (?P\w+)", ] @@ -152,7 +152,9 @@ def print(self): "WAKEUP": "PIN_SNVS", "WAKEUP_DIG": "PIN_SNVS", "PMIC_ON_REQ": "PIN_SNVS", + "PMIC_ON_REQ_DIG": "PIN_SNVS", "PMIC_STBY_REQ": "PIN_SNVS", + "PMIC_STBY_REQ_DIG": "PIN_SNVS", } print( From 433158076fba1de8dd48494dc35c3c3d1cd251e0 Mon Sep 17 00:00:00 2001 From: "Kwabena W. Agyeman" Date: Thu, 10 Aug 2023 11:16:19 -0700 Subject: [PATCH 2/3] mimxrt/machine_rtc: Add RTC alarm/wakeup functionality. Following the documented Python machine.RTC API. Signed-off-by: "Kwabena W. Agyeman" --- ports/mimxrt/machine_rtc.c | 224 ++++++++++++++++++++++++++++++++++++- ports/mimxrt/main.c | 1 + ports/mimxrt/modmachine.h | 1 + 3 files changed, 225 insertions(+), 1 deletion(-) diff --git a/ports/mimxrt/machine_rtc.c b/ports/mimxrt/machine_rtc.c index 54a19dacb4335..2a2800530128b 100644 --- a/ports/mimxrt/machine_rtc.c +++ b/ports/mimxrt/machine_rtc.c @@ -25,16 +25,117 @@ * THE SOFTWARE. */ +#include "py/mperrno.h" #include "py/runtime.h" +#include "shared/runtime/mpirq.h" #include "shared/timeutils/timeutils.h" #include "modmachine.h" #include "ticks.h" #include "fsl_snvs_lp.h" #include "fsl_snvs_hp.h" +STATIC mp_int_t timeout = 0; + +void machine_rtc_alarm_clear_en(void) { + SNVS_LP_SRTC_DisableInterrupts(SNVS, SNVS_LPCR_LPTA_EN_MASK); + while (SNVS->LPCR & SNVS_LPCR_LPTA_EN_MASK) { + } +} + +void machine_rtc_alarm_set_en() { + SNVS_LP_SRTC_EnableInterrupts(SNVS, SNVS_LPCR_LPTA_EN_MASK); + while (!(SNVS->LPCR & SNVS_LPCR_LPTA_EN_MASK)) { + } +} + +void machine_rtc_alarm_off(bool clear) { + machine_rtc_alarm_clear_en(); + DisableIRQ(SNVS_HP_WRAPPER_IRQn); + + if (clear) { + SNVS->LPTAR = 0; + timeout = 0; + SNVS->LPSR = SNVS_LPSR_LPTA_MASK; + } +} + +void machine_rtc_alarm_on() { + EnableIRQ(SNVS_HP_WRAPPER_IRQn); + machine_rtc_alarm_set_en(); +} + +uint32_t machine_rtc_get_seconds() { + uint32_t seconds = 0; + uint32_t tmp = 0; + + // Do consecutive reads until value is correct + do { + seconds = tmp; + tmp = (SNVS->LPSRTCMR << 17U); + tmp |= (SNVS->LPSRTCLR >> 15U); + } while (tmp != seconds); + + return seconds; +} + +void machine_rtc_alarm_helper(int seconds, bool repeat) { + machine_rtc_alarm_off(true); + + SNVS->LPTAR = machine_rtc_get_seconds() + seconds; + + if (repeat) { + timeout = seconds; + } + + machine_rtc_alarm_on(); +} + +typedef struct _machine_rtc_irq_obj_t { + mp_irq_obj_t base; +} machine_rtc_irq_obj_t; + +STATIC mp_uint_t machine_rtc_irq_trigger(mp_obj_t self_in, mp_uint_t new_trigger) { + new_trigger /= 1000; + if (!new_trigger) { + machine_rtc_alarm_off(true); + } else { + machine_rtc_alarm_helper(new_trigger, true); + } + return 0; +} + +STATIC mp_uint_t machine_rtc_irq_info(mp_obj_t self_in, mp_uint_t info_type) { + return 0; +} + +STATIC const mp_irq_methods_t machine_rtc_irq_methods = { + .trigger = machine_rtc_irq_trigger, + .info = machine_rtc_irq_info, +}; + +void SNVS_HP_WRAPPER_IRQHandler(void) { + if (SNVS->LPSR & SNVS_LPSR_LPTA_MASK) { + SNVS->LPSR = SNVS_LPSR_LPTA_MASK; + machine_rtc_irq_obj_t *irq = MP_STATE_PORT(machine_rtc_irq_object); + if (irq != NULL) { + mp_irq_handler(&irq->base); + } + if (timeout > 0) { + machine_rtc_alarm_clear_en(); + SNVS->LPTAR += timeout; + machine_rtc_alarm_set_en(); + } + } +} + +// Deinit rtc IRQ handler. +void machine_rtc_irq_deinit(void) { + machine_rtc_alarm_off(true); + MP_STATE_PORT(machine_rtc_irq_object) = NULL; +} + typedef struct _machine_rtc_obj_t { mp_obj_base_t base; - mp_obj_t callback; } machine_rtc_obj_t; // Singleton RTC object. @@ -163,11 +264,130 @@ STATIC mp_obj_t machine_rtc_calibration(mp_obj_t self_in, mp_obj_t cal_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_rtc_calibration_obj, machine_rtc_calibration); +STATIC mp_obj_t machine_rtc_alarm(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + STATIC const mp_arg_t allowed_args[] = { + { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} }, + { MP_QSTR_time, MP_ARG_OBJ, {.u_obj = mp_const_none} }, + { MP_QSTR_repeat, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), allowed_args, args); + + // check the alarm id + if (args[0].u_int != 0) { + mp_raise_OSError(MP_ENODEV); + } + + mp_int_t seconds = 0; + snvs_lp_srtc_datetime_t srtc_date; + bool repeat = args[2].u_bool; + if (mp_obj_is_type(args[1].u_obj, &mp_type_tuple)) { // datetime tuple given + // repeat cannot be used with a datetime tuple + if (repeat) { + mp_raise_ValueError(MP_ERROR_TEXT("invalid argument(s) value")); + } + // Set date and time. + mp_obj_t *items; + mp_int_t year; + mp_obj_get_array_fixed_n(args[1].u_obj, 8, &items); + + year = mp_obj_get_int(items[0]); + srtc_date.year = year >= 100 ? year : year + 2000; // allow 21 for 2021 + srtc_date.month = mp_obj_get_int(items[1]); + srtc_date.day = mp_obj_get_int(items[2]); + // Ignore weekday at items[3] + srtc_date.hour = mp_obj_get_int(items[4]); + srtc_date.minute = mp_obj_get_int(items[5]); + srtc_date.second = mp_obj_get_int(items[6]); + machine_rtc_alarm_off(true); + if (SNVS_LP_SRTC_SetAlarm(SNVS, &srtc_date) != kStatus_Success) { + mp_raise_ValueError(NULL); + } + machine_rtc_alarm_on(); + } else { // then it must be an integer + seconds = (args[1].u_obj == mp_const_none) ? 0 : (mp_obj_get_int(args[1].u_obj) / 1000); + machine_rtc_alarm_helper(seconds, repeat); + } + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_rtc_alarm_obj, 1, machine_rtc_alarm); + +STATIC mp_obj_t machine_rtc_alarm_left(size_t n_args, const mp_obj_t *args) { + // only alarm id 0 is available + if (n_args > 1 && mp_obj_get_int(args[1]) != 0) { + mp_raise_OSError(MP_ENODEV); + } + uint32_t seconds = machine_rtc_get_seconds(); + uint32_t alarmSeconds = SNVS->LPTAR; + return mp_obj_new_int((alarmSeconds >= seconds) ? ((alarmSeconds - seconds) * 1000) : 0); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_rtc_alarm_left_obj, 1, 2, machine_rtc_alarm_left); + +STATIC mp_obj_t machine_rtc_alarm_cancel(size_t n_args, const mp_obj_t *args) { + // only alarm id 0 is available + if (n_args > 1 && mp_obj_get_int(args[1]) != 0) { + mp_raise_OSError(MP_ENODEV); + } + machine_rtc_alarm_off(true); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_rtc_alarm_cancel_obj, 1, 2, machine_rtc_alarm_cancel); + +STATIC mp_obj_t machine_rtc_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_trigger, ARG_handler, ARG_wake, ARG_hard }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_trigger, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, + { MP_QSTR_handler, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, + { MP_QSTR_wake, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, + { MP_QSTR_hard, MP_ARG_BOOL, {.u_bool = false} }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + // check we want alarm0 + if (args[ARG_trigger].u_int != 0) { + mp_raise_OSError(MP_ENODEV); + } + + machine_rtc_irq_obj_t *irq = MP_STATE_PORT(machine_rtc_irq_object); + + // Allocate the IRQ object if it doesn't already exist. + if (irq == NULL) { + irq = m_new_obj(machine_rtc_irq_obj_t); + irq->base.base.type = &mp_irq_type; + irq->base.methods = (mp_irq_methods_t *)&machine_rtc_irq_methods; + irq->base.parent = MP_OBJ_FROM_PTR(pos_args[0]); + irq->base.handler = mp_const_none; + irq->base.ishard = args[ARG_hard].u_bool; + MP_STATE_PORT(machine_rtc_irq_object) = irq; + } + + machine_rtc_alarm_off(false); + + irq->base.handler = args[ARG_handler].u_obj; + + if (SNVS->LPTAR) { + machine_rtc_alarm_on(); + } + + return MP_OBJ_FROM_PTR(irq); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_rtc_irq_obj, 1, machine_rtc_irq); + STATIC const mp_rom_map_elem_t machine_rtc_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_rtc_init_obj) }, { MP_ROM_QSTR(MP_QSTR_datetime), MP_ROM_PTR(&machine_rtc_datetime_obj) }, { MP_ROM_QSTR(MP_QSTR_now), MP_ROM_PTR(&machine_rtc_now_obj) }, { MP_ROM_QSTR(MP_QSTR_calibration), MP_ROM_PTR(&machine_rtc_calibration_obj) }, + { MP_ROM_QSTR(MP_QSTR_alarm), MP_ROM_PTR(&machine_rtc_alarm_obj) }, + { MP_ROM_QSTR(MP_QSTR_alarm_left), MP_ROM_PTR(&machine_rtc_alarm_left_obj) }, + { MP_ROM_QSTR(MP_QSTR_alarm_cancel), MP_ROM_PTR(&machine_rtc_alarm_cancel_obj) }, + { MP_ROM_QSTR(MP_QSTR_cancel), MP_ROM_PTR(&machine_rtc_alarm_cancel_obj) }, + { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&machine_rtc_irq_obj) }, + { MP_ROM_QSTR(MP_QSTR_ALARM0), MP_ROM_INT(0) }, }; STATIC MP_DEFINE_CONST_DICT(machine_rtc_locals_dict, machine_rtc_locals_dict_table); @@ -178,3 +398,5 @@ MP_DEFINE_CONST_OBJ_TYPE( make_new, machine_rtc_make_new, locals_dict, &machine_rtc_locals_dict ); + +MP_REGISTER_ROOT_POINTER(void *machine_rtc_irq_object); diff --git a/ports/mimxrt/main.c b/ports/mimxrt/main.c index f5d57d530e173..376d72f197f30 100644 --- a/ports/mimxrt/main.c +++ b/ports/mimxrt/main.c @@ -141,6 +141,7 @@ int main(void) { soft_reset_exit: mp_printf(MP_PYTHON_PRINTER, "MPY: soft reboot\n"); machine_pin_irq_deinit(); + machine_rtc_irq_deinit(); #if MICROPY_PY_MACHINE_I2S machine_i2s_deinit_all(); #endif diff --git a/ports/mimxrt/modmachine.h b/ports/mimxrt/modmachine.h index 904419df2cc8a..d00d2031c4772 100644 --- a/ports/mimxrt/modmachine.h +++ b/ports/mimxrt/modmachine.h @@ -42,6 +42,7 @@ extern const mp_obj_type_t machine_wdt_type; void machine_adc_init(void); void machine_pin_irq_deinit(void); +void machine_rtc_irq_deinit(void); void machine_pwm_deinit_all(void); void machine_uart_deinit_all(void); void machine_timer_init_PIT(void); From e78471416bc77d5355e2181047e57f1e45d3654c Mon Sep 17 00:00:00 2001 From: "Kwabena W. Agyeman" Date: Thu, 10 Aug 2023 11:18:48 -0700 Subject: [PATCH 3/3] mimxrt/modmachine: Add support for machine.deepsleep. Signed-off-by: "Kwabena W. Agyeman" --- ports/mimxrt/Makefile | 1 + ports/mimxrt/machine_rtc.c | 8 +++++++ ports/mimxrt/modmachine.c | 46 ++++++++++++++++++++++++++++++++++++++ ports/mimxrt/modmachine.h | 2 +- 4 files changed, 56 insertions(+), 1 deletion(-) diff --git a/ports/mimxrt/Makefile b/ports/mimxrt/Makefile index f44518a8aa132..3521f922887ff 100644 --- a/ports/mimxrt/Makefile +++ b/ports/mimxrt/Makefile @@ -128,6 +128,7 @@ SRC_HAL_IMX_C += \ $(MCU_DIR)/drivers/fsl_edma.c \ $(MCU_DIR)/drivers/fsl_flexram.c \ $(MCU_DIR)/drivers/fsl_flexspi.c \ + $(MCU_DIR)/drivers/fsl_gpc.c \ $(MCU_DIR)/drivers/fsl_gpio.c \ $(MCU_DIR)/drivers/fsl_gpt.c \ $(MCU_DIR)/drivers/fsl_lpi2c.c \ diff --git a/ports/mimxrt/machine_rtc.c b/ports/mimxrt/machine_rtc.c index 2a2800530128b..169ec6b910eac 100644 --- a/ports/mimxrt/machine_rtc.c +++ b/ports/mimxrt/machine_rtc.c @@ -50,7 +50,11 @@ void machine_rtc_alarm_set_en() { void machine_rtc_alarm_off(bool clear) { machine_rtc_alarm_clear_en(); + #ifdef MIMXRT117x_SERIES + DisableIRQ(SNVS_HP_NON_TZ_IRQn); + #else DisableIRQ(SNVS_HP_WRAPPER_IRQn); + #endif if (clear) { SNVS->LPTAR = 0; @@ -60,7 +64,11 @@ void machine_rtc_alarm_off(bool clear) { } void machine_rtc_alarm_on() { + #ifdef MIMXRT117x_SERIES + EnableIRQ(SNVS_HP_NON_TZ_IRQn); + #else EnableIRQ(SNVS_HP_WRAPPER_IRQn); + #endif machine_rtc_alarm_set_en(); } diff --git a/ports/mimxrt/modmachine.c b/ports/mimxrt/modmachine.c index 423a67d6095f2..16eae22029b58 100644 --- a/ports/mimxrt/modmachine.c +++ b/ports/mimxrt/modmachine.c @@ -37,6 +37,12 @@ #include "led.h" #include "pin.h" #include "modmachine.h" +#include "fsl_gpc.h" +#ifdef MIMXRT117x_SERIES +#include "fsl_soc_src.h" +#else +#include "fsl_src.h" +#endif #include "fsl_wdog.h" #if FSL_FEATURE_BOOT_ROM_HAS_ROMAPI #include "fsl_romapi.h" @@ -74,6 +80,14 @@ STATIC mp_obj_t machine_reset(void) { MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset); STATIC mp_obj_t machine_reset_cause(void) { + #ifdef MIMXRT117x_SERIES + uint32_t user_reset_flag = kSRC_M7CoreIppUserResetFlag; + #else + uint32_t user_reset_flag = kSRC_IppUserResetFlag; + #endif + if (SRC->SRSR & user_reset_flag) { + return MP_OBJ_NEW_SMALL_INT(MP_DEEPSLEEP_RESET); + } uint16_t reset_cause = WDOG_GetStatusFlags(WDOG1) & (kWDOG_PowerOnResetFlag | kWDOG_TimeoutResetFlag | kWDOG_SoftwareResetFlag); if (reset_cause == kWDOG_PowerOnResetFlag) { @@ -98,6 +112,37 @@ STATIC mp_obj_t machine_idle(void) { } STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle); +STATIC mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *args) { + if (n_args != 0) { + mp_int_t seconds = mp_obj_get_int(args[0]) / 1000; + if (seconds > 0) { + machine_rtc_alarm_helper(seconds, false); + #ifdef MIMXRT117x_SERIES + GPC_CM_EnableIrqWakeup(GPC_CPU_MODE_CTRL_0, SNVS_HP_NON_TZ_IRQn, true); + #else + GPC_EnableIRQ(GPC, SNVS_HP_WRAPPER_IRQn); + #endif + } + } + + #ifdef MIMXRT117x_SERIES + machine_pin_config(&pin_WAKEUP_DIG, PIN_MODE_IT_RISING, PIN_PULL_DISABLED, PIN_DRIVE_OFF, 0, PIN_AF_MODE_ALT5); + GPC_CM_EnableIrqWakeup(GPC_CPU_MODE_CTRL_0, GPIO13_Combined_0_31_IRQn, true); + #elif defined IOMUXC_SNVS_WAKEUP_GPIO5_IO00 + machine_pin_config(&pin_WAKEUP, PIN_MODE_IT_RISING, PIN_PULL_DISABLED, PIN_DRIVE_OFF, 0, PIN_AF_MODE_ALT5); + GPC_EnableIRQ(GPC, GPIO5_Combined_0_15_IRQn); + #endif + + SNVS->LPCR |= SNVS_LPCR_TOP_MASK; + + while (true) { + ; + } + + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_deepsleep_obj, 0, 1, machine_deepsleep); + STATIC mp_obj_t machine_disable_irq(void) { uint32_t state = MICROPY_BEGIN_ATOMIC_SECTION(); return mp_obj_new_int(state); @@ -162,6 +207,7 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_WDT), MP_ROM_PTR(&machine_wdt_type) }, { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) }, + { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) }, { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) }, { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) }, diff --git a/ports/mimxrt/modmachine.h b/ports/mimxrt/modmachine.h index d00d2031c4772..478b1c77362a1 100644 --- a/ports/mimxrt/modmachine.h +++ b/ports/mimxrt/modmachine.h @@ -51,7 +51,7 @@ void mimxrt_sdram_init(void); void machine_i2s_init0(); void machine_i2s_deinit_all(void); void machine_rtc_start(void); - +void machine_rtc_alarm_helper(int seconds, bool repeat); void machine_uart_set_baudrate(mp_obj_t uart, uint32_t baudrate); #endif // MICROPY_INCLUDED_MIMXRT_MODMACHINE_H pFad - Phonifier reborn

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