From f0651b89ebc880aea180347579973c321a81a19a Mon Sep 17 00:00:00 2001 From: Yuuki NAGAO Date: Sat, 5 Jul 2025 22:31:47 +0900 Subject: [PATCH 1/4] stm32: Change Flash sector size for STM32H7A3. STM32H7A3 has 2MB internal flash and each sector size is 8KB. Signed-off-by: Yuuki NAGAO --- ports/stm32/flash.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/ports/stm32/flash.c b/ports/stm32/flash.c index 7668b53a43b58..b8a50b45ac4e9 100644 --- a/ports/stm32/flash.c +++ b/ports/stm32/flash.c @@ -157,8 +157,13 @@ static const flash_layout_t flash_layout[] = { #define FLASH_LAYOUT_IS_HOMOGENEOUS (1) #define FLASH_LAYOUT_START_ADDR (FLASH_BASE) +#if defined(STM32H7A3xx) || defined(STM32H7A3xxQ) +#define FLASH_LAYOUT_SECTOR_SIZE (0x2000) +#define FLASH_LAYOUT_NUM_SECTORS (256) +#else #define FLASH_LAYOUT_SECTOR_SIZE (0x20000) #define FLASH_LAYOUT_NUM_SECTORS (16) +#endif #else #error Unsupported processor From 0d20ad6cf123e6dc41ef1c094e43f3bcff11fad1 Mon Sep 17 00:00:00 2001 From: Yuuki NAGAO Date: Sat, 5 Jul 2025 22:32:04 +0900 Subject: [PATCH 2/4] stm32: Use macros defined by HAL in adc.c. For STM32H7, the following macro's value are different by ADC's version. * ADC_CAL_ADDRESS * ADC_CAL1 * TEMPSENSOR_CAL2_ADDR Using macros defined by HAL become less dependent on ADC's version. Signed-off-by: Yuuki NAGAO --- ports/stm32/adc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/ports/stm32/adc.c b/ports/stm32/adc.c index 3549fc29a98b8..0f5f5bfe6ce93 100644 --- a/ports/stm32/adc.c +++ b/ports/stm32/adc.c @@ -117,10 +117,10 @@ #elif defined(STM32H7) -#define ADC_SCALE_V (3.3f) -#define ADC_CAL_ADDRESS (0x1FF1E860) -#define ADC_CAL1 ((uint16_t *)(0x1FF1E820)) -#define ADC_CAL2 ((uint16_t *)(0x1FF1E840)) +#define ADC_SCALE_V (VREFINT_CAL_VREF / 1000.0f) +#define ADC_CAL_ADDRESS (VREFINT_CAL_ADDR) +#define ADC_CAL1 (TEMPSENSOR_CAL1_ADDR) +#define ADC_CAL2 (TEMPSENSOR_CAL2_ADDR) #define ADC_CAL_BITS (16) #elif defined(STM32L1) From 36f172ff4b887836831d709dcb507c88fb5112d6 Mon Sep 17 00:00:00 2001 From: Yuuki NAGAO Date: Sat, 5 Jul 2025 22:32:26 +0900 Subject: [PATCH 3/4] stm32: Change USB port for STM32H7A3. STM32H7A3 uses PA11, PA12 to enable USB function via built-in USB OTG port on NUCLEO board. Signed-off-by: Yuuki NAGAO --- ports/stm32/usbd_conf.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/ports/stm32/usbd_conf.c b/ports/stm32/usbd_conf.c index 829037ba935f6..49a4b981a5c93 100644 --- a/ports/stm32/usbd_conf.c +++ b/ports/stm32/usbd_conf.c @@ -177,7 +177,7 @@ void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd) { // Configure USB GPIO's. - #if defined(STM32H723xx) + #if defined(STM32H723xx) || (STM32H7A3xx) || defined(STM32H7A3xxQ) // These MCUs don't have an alternate function for USB but rather require // the pins to be disconnected from all peripherals, ie put in analog mode. @@ -195,7 +195,7 @@ void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd) { // Other MCUs have an alternate function for GPIO's to be in USB mode. - #if defined(STM32H7A3xx) || defined(STM32H7A3xxQ) || defined(STM32H7B3xx) || defined(STM32H7B3xxQ) + #if defined(STM32H7B3xx) || defined(STM32H7B3xxQ) const uint32_t otg_alt = GPIO_AF10_OTG1_FS; #elif defined(STM32H7) const uint32_t otg_alt = GPIO_AF12_OTG2_FS; From 81bdccf56697622a558677564e1425408e0ca3ff Mon Sep 17 00:00:00 2001 From: Yuuki NAGAO Date: Sat, 5 Jul 2025 22:33:21 +0900 Subject: [PATCH 4/4] stm32/boards: Add NUCLEO_H7A3ZI_Q board support. This change adds NUCLEO_H7A3ZI_Q Core Board support to the STM32 port. NUCLEO_H7A3ZI_Q: https://www.st.com/en/evaluation-tools/nucleo-h7a3zi-q.html This board uses STM32H7A3ZI: https://www.st.com/en/microcontrollers-microprocessors/stm32h7a3zi.html Signed-off-by: Yuuki NAGAO --- ports/stm32/boards/NUCLEO_H7A3ZI_Q/board.json | 15 +++ .../stm32/boards/NUCLEO_H7A3ZI_Q/board_init.c | 7 + .../boards/NUCLEO_H7A3ZI_Q/mpconfigboard.h | 116 +++++++++++++++++ .../boards/NUCLEO_H7A3ZI_Q/mpconfigboard.mk | 17 +++ ports/stm32/boards/NUCLEO_H7A3ZI_Q/pins.csv | 123 ++++++++++++++++++ .../NUCLEO_H7A3ZI_Q/stm32h7xx_hal_conf.h | 19 +++ ports/stm32/boards/stm32h7a3.ld | 39 ++++++ 7 files changed, 336 insertions(+) create mode 100644 ports/stm32/boards/NUCLEO_H7A3ZI_Q/board.json create mode 100644 ports/stm32/boards/NUCLEO_H7A3ZI_Q/board_init.c create mode 100644 ports/stm32/boards/NUCLEO_H7A3ZI_Q/mpconfigboard.h create mode 100644 ports/stm32/boards/NUCLEO_H7A3ZI_Q/mpconfigboard.mk create mode 100644 ports/stm32/boards/NUCLEO_H7A3ZI_Q/pins.csv create mode 100644 ports/stm32/boards/NUCLEO_H7A3ZI_Q/stm32h7xx_hal_conf.h create mode 100644 ports/stm32/boards/stm32h7a3.ld diff --git a/ports/stm32/boards/NUCLEO_H7A3ZI_Q/board.json b/ports/stm32/boards/NUCLEO_H7A3ZI_Q/board.json new file mode 100644 index 0000000000000..7ecc10a3e003f --- /dev/null +++ b/ports/stm32/boards/NUCLEO_H7A3ZI_Q/board.json @@ -0,0 +1,15 @@ +{ + "deploy": [ + "../deploy.md" + ], + "docs": "", + "features": [], + "images": [ + "nucleo_h7a3zi_q.jpg" + ], + "mcu": "stm32h7", + "product": "Nucleo H7A3ZI-Q", + "thumbnail": "", + "url": "https://www.st.com/ja/evaluation-tools/nucleo-h7a3zi-q.html", + "vendor": "ST Microelectronics" +} diff --git a/ports/stm32/boards/NUCLEO_H7A3ZI_Q/board_init.c b/ports/stm32/boards/NUCLEO_H7A3ZI_Q/board_init.c new file mode 100644 index 0000000000000..d2cadf2733d45 --- /dev/null +++ b/ports/stm32/boards/NUCLEO_H7A3ZI_Q/board_init.c @@ -0,0 +1,7 @@ +#include "py/mphal.h" + +void NUCLEO_H7A3ZIQ_board_early_init(void) { + // Turn off the USB switch. + mp_hal_pin_output(pyb_pin_OTG_FS_POWER); + mp_hal_pin_low(pyb_pin_OTG_FS_POWER); +} diff --git a/ports/stm32/boards/NUCLEO_H7A3ZI_Q/mpconfigboard.h b/ports/stm32/boards/NUCLEO_H7A3ZI_Q/mpconfigboard.h new file mode 100644 index 0000000000000..6505d51f79079 --- /dev/null +++ b/ports/stm32/boards/NUCLEO_H7A3ZI_Q/mpconfigboard.h @@ -0,0 +1,116 @@ +#define MICROPY_HW_BOARD_NAME "NUCLEO_H7A3ZI_Q" +#define MICROPY_HW_MCU_NAME "STM32H7A3ZIT6Q" + +#define MICROPY_HW_ENABLE_RTC (1) +#define MICROPY_HW_ENABLE_SERVO (1) +#define MICROPY_HW_ENABLE_RNG (0) // RNG needs proper configuration +#define MICROPY_HW_ENABLE_ADC (1) +#define MICROPY_HW_ENABLE_DAC (1) +#define MICROPY_HW_ENABLE_USB (1) +#define MICROPY_HW_ENABLE_SDCARD (0) +#define MICROPY_HW_HAS_SWITCH (1) +#define MICROPY_HW_HAS_FLASH (1) + +#define MICROPY_BOARD_EARLY_INIT NUCLEO_H7A3ZIQ_board_early_init + +#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (1) + +// There is no external HS crystal, instead it comes from ST-LINK MCO output which is 8MHz. +// The following gives a 280Hz CPU speed. +#define MICROPY_HW_CLK_USE_BYPASS (1) +#define MICROPY_HW_CLK_PLLM (2) +#define MICROPY_HW_CLK_PLLN (140) +#define MICROPY_HW_CLK_PLLP (2) +#define MICROPY_HW_CLK_PLLQ (4) +#define MICROPY_HW_CLK_PLLR (2) +#define MICROPY_HW_CLK_PLLVCI (RCC_PLL1VCIRANGE_2) +#define MICROPY_HW_CLK_PLLVCO (RCC_PLL1VCOWIDE) +#define MICROPY_HW_CLK_PLLFRAC (0) + +// The USB clock is set using PLL3 +#define MICROPY_HW_CLK_PLL3M (1) +#define MICROPY_HW_CLK_PLL3N (24) +#define MICROPY_HW_CLK_PLL3P (2) +#define MICROPY_HW_CLK_PLL3Q (4) +#define MICROPY_HW_CLK_PLL3R (2) +#define MICROPY_HW_CLK_PLL3VCI (RCC_PLL3VCIRANGE_3) +#define MICROPY_HW_CLK_PLL3VCO (RCC_PLL3VCOWIDE) +#define MICROPY_HW_CLK_PLL3FRAC (0) + +// 6 wait states when running at 280MHz (VOS0 range) +#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_6 + +// The board has an external 32kHz crystal attached +#define MICROPY_HW_RTC_USE_LSE (1) + +// SMPS configuration +#define MICROPY_HW_PWR_SMPS_CONFIG (PWR_DIRECT_SMPS_SUPPLY) + +// UART config +#define MICROPY_HW_UART1_TX (pin_B14) // Arduino D1, pin14 on CN10 +#define MICROPY_HW_UART1_RX (pin_B15) // Arduino D0, pin16 on CN10 +#define MICROPY_HW_UART2_TX (pin_D5) // pin 6 on CN9 +#define MICROPY_HW_UART2_RX (pin_D6) // pin 4 on CN9 +#define MICROPY_HW_UART2_RTS (pin_D4) // pin 8 on CN9 +#define MICROPY_HW_UART2_CTS (pin_D3) // pin10 on CN9 +#define MICROPY_HW_UART3_TX (pin_D8) +#define MICROPY_HW_UART3_RX (pin_D9) +#define MICROPY_HW_UART5_TX (pin_B6) +#define MICROPY_HW_UART5_RX (pin_B12) +#define MICROPY_HW_UART6_TX (pin_C6) +#define MICROPY_HW_UART6_RX (pin_C7) +#define MICROPY_HW_UART7_TX (pin_F7) +#define MICROPY_HW_UART7_RX (pin_F6) +#define MICROPY_HW_UART8_TX (pin_E1) +#define MICROPY_HW_UART8_RX (pin_E0) + +// UART3 connects to the STLINK-V3 on the Nucleo board +// and this is exposed as a USB Serial port. +#define MICROPY_HW_UART_REPL PYB_UART_3 +#define MICROPY_HW_UART_REPL_BAUD 115200 + +// I2C buses +#define MICROPY_HW_I2C1_SCL (pin_B8) // Arduino D15, pin 2 on CN7 +#define MICROPY_HW_I2C1_SDA (pin_B9) // Arduino D14, pin 4 on CN7 +#define MICROPY_HW_I2C4_SCL (pin_F14) // pin19 on CN9 +#define MICROPY_HW_I2C4_SDA (pin_F15) // pin12 on CN9 + +// SPI buses +#define MICROPY_HW_SPI1_NSS (pin_A4) // pin17 on CN7 +#define MICROPY_HW_SPI1_SCK (pin_A5) // Arduino D13, pin10 on CN7 +#define MICROPY_HW_SPI1_MISO (pin_A6) // Arduino D12, pin12 on CN7 +#define MICROPY_HW_SPI1_MOSI (pin_A7) // Arduino D11, pin14 on CN7 +#define MICROPY_HW_SPI2_NSS (pin_B12) +#define MICROPY_HW_SPI2_SCK (pin_B10) +#define MICROPY_HW_SPI2_MISO (pin_C2) +#define MICROPY_HW_SPI2_MOSI (pin_C1) +#define MICROPY_HW_SPI3_NSS (pin_A15) +#define MICROPY_HW_SPI3_SCK (pin_B2) +#define MICROPY_HW_SPI3_MISO (pin_C10) +#define MICROPY_HW_SPI3_MOSI (pin_C11) + +// USRSW is pulled low. Pressing the button makes the input go high. +#define MICROPY_HW_USRSW_PIN (pin_C13) +#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) +#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) +#define MICROPY_HW_USRSW_PRESSED (1) + +// LEDs +#define MICROPY_HW_LED1 (pin_B0) // green +#define MICROPY_HW_LED2 (pin_E1) // yellow +#define MICROPY_HW_LED3 (pin_B14) // red +#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) +#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) + +// USB config +#define MICROPY_HW_USB_HS (1) +#define MICROPY_HW_USB_HS_IN_FS (1) +#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) +#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) + +// FDCAN bus +#define MICROPY_HW_CAN1_NAME "FDCAN1" +#define MICROPY_HW_CAN1_TX (pin_D1) +#define MICROPY_HW_CAN1_RX (pin_D0) + +void NUCLEO_H7A3ZIQ_board_early_init(void); diff --git a/ports/stm32/boards/NUCLEO_H7A3ZI_Q/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_H7A3ZI_Q/mpconfigboard.mk new file mode 100644 index 0000000000000..aa6125d0d80c5 --- /dev/null +++ b/ports/stm32/boards/NUCLEO_H7A3ZI_Q/mpconfigboard.mk @@ -0,0 +1,17 @@ +USE_MBOOT ?= 0 + +# MCU settings +MCU_SERIES = h7 +CMSIS_MCU = STM32H7A3xxQ +MICROPY_FLOAT_IMPL = double +AF_FILE = boards/stm32h7b3_af.csv + +ifeq ($(USE_MBOOT),1) +# When using Mboot all the text goes together after the filesystem +LD_FILES = boards/stm32h743.ld boards/common_blifs.ld +TEXT0_ADDR = 0x08040000 +else +# When not using Mboot the ISR text goes first, then the rest after the filesystem +LD_FILES = boards/stm32h7a3.ld boards/common_basic.ld +TEXT0_ADDR = 0x08000000 +endif diff --git a/ports/stm32/boards/NUCLEO_H7A3ZI_Q/pins.csv b/ports/stm32/boards/NUCLEO_H7A3ZI_Q/pins.csv new file mode 100644 index 0000000000000..1b38fc4ba65d9 --- /dev/null +++ b/ports/stm32/boards/NUCLEO_H7A3ZI_Q/pins.csv @@ -0,0 +1,123 @@ +A0,PA3 +A1,PC0 +A2,PC3 +A3,PB1 +A4,PC2 +A5,PF11 +A6,PC1 +A7,PC5 +A8,PA2 +D0,PB7 +D1,PB6 +D2,PG14 +D3,PE13 +D4,PE14 +D5,PE11 +D6,PA8 +D7,PG12 +D8,PG9 +D9,PD15 +D10,PD14 +D11,PA7 +D12,PA6 +D13,PA5 +D14,PB9 +D15,PB8 +D16,PC6 +D17,PB15 +D18,PB13 +D19,PB12 +D20,PA15 +D21,PC7 +D22,PB5 +D23,PB3 +D24,PA4 +D25,PB4 +D26,PG6 +D27,PB2 +D28,PD13 +D29,PD12 +D30,PD11 +D31,PE2 +D32,PA0 +D33,PB0 +D34,PE0 +D35,PB11 +D36,PB10 +D37,PE15 +D38,PE6 +D39,PE12 +D40,PE10 +D41,PE7 +D42,PE8 +D43,PC8 +D44,PC9 +D45,PC10 +D46,PC11 +D47,PC12 +D48,PD2 +D49,PG10 +D50,PG8 +D51,PD7 +D52,PD6 +D53,PD5 +D54,PD4 +D55,PD3 +D56,PE2 +D57,PE4 +D58,PE5 +D59,PE6 +D60,PE3 +D61,PF8 +D62,PF7 +D63,PF9 +D64,PD10 +D65,PB14 +D66,PD1 +D67,PD0 +D68,PF15 +D69,PF14 +D70,PB5 +D71,PE9 +D72,PB2 +DAC1,PA4 +DAC2,PA5 +LED1,PB0 +LED2,PE1 +LED3,PB14 +SW,PC13 +I2C1_SDA,PB9 +I2C1_SCL,PB8 +I2C4_SCL,PF14 +I2C4_SDA,PF15 +OTG_FS_POWER,PD10 +OTG_FS_OVER_CURRENT,PG7 +USB_VBUS,PA9 +USB_ID,PA10 +USB_DM,PA11 +USB_DP,PA12 +UART1_TX,PB14 +UART1_RX,PB15 +UART2_TX,PD5 +UART2_RX,PD6 +UART2_RTS,PD4 +UART2_CTS,PD3 +UART3_TX,PD8 +UART3_RX,PD9 +UART5_TX,PB6 +UART5_RX,PB12 +UART6_TX,PC6 +UART6_RX,PC7 +UART7_TX,PF7 +UART7_RX,PF6 +UART8_TX,PE1 +UART8_RX,PE0 +,PC1 +,PA2 +,PA1 +,PA7 +,PC4 +,PC5 +,PG11 +,PG13 +,PB13 diff --git a/ports/stm32/boards/NUCLEO_H7A3ZI_Q/stm32h7xx_hal_conf.h b/ports/stm32/boards/NUCLEO_H7A3ZI_Q/stm32h7xx_hal_conf.h new file mode 100644 index 0000000000000..311c1ff8015a9 --- /dev/null +++ b/ports/stm32/boards/NUCLEO_H7A3ZI_Q/stm32h7xx_hal_conf.h @@ -0,0 +1,19 @@ +/* This file is part of the MicroPython project, http://micropython.org/ + * The MIT License (MIT) + * Copyright (c) 2019 Damien P. George + */ +#ifndef MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H +#define MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H + +// Oscillator values in Hz +#define HSE_VALUE (8000000) +#define LSE_VALUE (32768) +#define EXTERNAL_CLOCK_VALUE (12288000) + +// Oscillator timeouts in ms +#define HSE_STARTUP_TIMEOUT (5000) +#define LSE_STARTUP_TIMEOUT (5000) + +#include "boards/stm32h7xx_hal_conf_base.h" + +#endif // MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H diff --git a/ports/stm32/boards/stm32h7a3.ld b/ports/stm32/boards/stm32h7a3.ld new file mode 100644 index 0000000000000..3cb03b908fa40 --- /dev/null +++ b/ports/stm32/boards/stm32h7a3.ld @@ -0,0 +1,39 @@ +/* + GNU linker script for STM32H7A3 +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K /* sectors 0- 15, 128K */ + FLASH_APP (rx) : ORIGIN = 0x08020000, LENGTH = 1664K /* sectors 16-223, 1664K */ + FLASH_FS (r) : ORIGIN = 0x081c0000, LENGTH = 256K /* sectors 224-255, 256K */ + DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 120K /* Used for storage cache */ + FS_CACHE (xrw) : ORIGIN = 0x2001e000, LENGTH = 8K /* Used for storage cache */ + RAM (xrw) : ORIGIN = 0x24000000, LENGTH = 1024K + RAM_CD (xrw) : ORIGIN = 0x30000000, LENGTH = 128K + RAM_SRD (xrw) : ORIGIN = 0x38000000, LENGTH = 32K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define the stack. The stack is full descending so begins just above last byte + of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve; +_sstack = _estack - 16K; /* tunable */ + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); +_heap_start = _ebss; /* heap starts just after statically allocated memory */ +_heap_end = _sstack; + +/* Location of filesystem RAM cache */ +_micropy_hw_internal_flash_storage_ram_cache_start = ORIGIN(FS_CACHE); +_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(FS_CACHE) + LENGTH(FS_CACHE); + +/* Location of filesystem flash storage */ +_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS); +_micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS); pFad - Phonifier reborn

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