July 26, 2025 – August 2, 2025

Overview

1 Active pull request

3 Active issues
- 1 Merged pull request
- 0 Open pull requests
- 3 Closed issues
- 0 New issues

There hasn’t been any commit activity on pConst/basic_verilog in the last week.

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1 Pull request merged by 1 person

Fix undefined clk_div in freq_meter.sv
#7 merged Aug 2, 2025

3 Issues closed by 2 people

Clarify non-reset behavior of Gray counter in `cdc_strobe` for ASIC compatibility
#3 closed Aug 2, 2025
Clarify ASIC compatibility or add reset logic for register initialization in `fast_counter`
#2 closed Aug 2, 2025
`readout_valid` Signal Always Stuck at Zero in `freq_meter`
#6 closed Jul 30, 2025

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