Fix crash when pin ISR handler fires (i.e. LoRa TX done) during flash operation (i.e. ota_write() call)

martijnthe · martijnthe · commit 1d0e2648c06a · 2019-03-08T10:28:32.000+01:00
I was seeing crashes with "Cache disabled but cached memory region accessed" as reason.
The coredump showed one of the threads being inside spi_flash_op_block_func(), while the thread that caused the crash was an ISR (with LoRa's OnRadioTxDone handler somewhere in the stacktrace).
The comment above spi_flash_op_block_func(), suggests that if an interrupt handler accesses PSRAM, it must not be part of the "IRAM" ISR handlers, so it will be disabld during flash ops.
This change will flag all ISR handlers for the Pin module as non-IRAM and thereby preventing the crashes.
diff --git a/esp32/mods/machpin.c b/esp32/mods/machpin.c
@@ -108,7 +108,13 @@ DECLARE PRIVATE DATA
  DEFINE PUBLIC FUNCTIONS
  ******************************************************************************/
 void pin_preinit(void) {
-    gpio_isr_register(machpin_intr_process, NULL, ESP_INTR_FLAG_IRAM, NULL);
+    intr_handle_t isr_handle;
+    if (ESP_OK == gpio_isr_register(machpin_intr_process, NULL, ESP_INTR_FLAG_IRAM, &isr_handle)) {
+        // Probably non-optimal, but assume the ISR handler will access PSRAM (which is the case with the LoRa TX done
+        // handler) and thus the interrupt will have to be disabled during a flash operation to prevent crashes.
+        // See comment with spi_flash_op_block_func().
+        esp_intr_set_in_iram(isr_handle, false);
+    }
 }
 
 void pin_init0(void) {
