diff --git a/devices/common_patches/fdcan/fdcan_ccu.yaml b/devices/common_patches/fdcan/fdcan_ccu.yaml new file mode 100644 index 000000000..0ab6e629e --- /dev/null +++ b/devices/common_patches/fdcan/fdcan_ccu.yaml @@ -0,0 +1,153 @@ +# Calibration Configuration Unit (CCU) registers for devices with FDCAN + +# This was created to fix CCU registers on h7b3 (total mess in SVD) and is +# based on the SVD for h735 with some minor corrections. + +# TODO: Maybe use this on all CCUs now that it exists? It appears to match +# all h7xx and mp1xx devices. + +_modify: + CAN_CCU: + description: CAN clock calibration unit + groupName: CAN_CCU + +# Delete and re-add all registers for the CCU peripheral +CAN_CCU: + _delete: + _registers: + - ?* + + _add: + CREL: + displayName: CREL + description: Clock calibration unit core release register + addressOffset: 0x0 + size: 0x20 + access: read-only + resetValue: 0x11141218 + fields: + DAY: + description: Timestamp day + bitOffset: 0 + bitWidth: 8 + MON: + description: Timestamp month + bitOffset: 8 + bitWidth: 8 + YEAR: + description: Timestamp year + bitOffset: 16 + bitWidth: 4 + SUBSTEP: + description: Sub-step of core release + bitOffset: 20 + bitWidth: 4 + STEP: + description: Step of core release + bitOffset: 24 + bitWidth: 4 + REL: + description: Core release + bitOffset: 28 + bitWidth: 4 + CCFG: + displayName: CCFG + description: Calibration configuration register + addressOffset: 0x04 + size: 0x20 + access: read-write + resetValue: 0x00000004 + fields: + TQBT: + description: Time quanta per bit time + bitOffset: 0 + bitWidth: 5 + BCC: + description: Bypass clock calibration + bitOffset: 6 + bitWidth: 1 + CFL: + description: Calibration field length + bitOffset: 7 + bitWidth: 1 + OCPM: + description: Oscillator clock periods minimum + bitOffset: 8 + bitWidth: 8 + CDIV: + description: Clock divider + bitOffset: 16 + bitWidth: 4 + SWR: + description: Software reset + bitOffset: 31 + bitWidth: 1 + CSTAT: + displayName: CSTAT + description: Calibration status register + addressOffset: 0x08 + size: 0x20 + access: read-only + resetValue: 0x0203FFFF + fields: + OCPC: + description: Oscillator clock period counter + bitOffset: 0 + bitWidth: 18 + TQC: + description: Time quanta counter + bitOffset: 18 + bitWidth: 11 + CALS: + description: Calibration state + bitOffset: 30 + bitWidth: 2 + CWD: + displayName: CWD + description: Calibration watchdog register + addressOffset: 0x0C + size: 0x20 + resetValue: 0x00000000 + fields: + WDC: + description: Watchdog configuration + bitOffset: 0 + bitWidth: 16 + access: read-write + WDV: + description: Watchdog value + bitOffset: 16 + bitWidth: 16 + access: read-only + IR: + displayName: IR + description: Clock calibration unit interrupt register + addressOffset: 0x10 + size: 0x20 + access: read-write + resetValue: 0x00000000 + fields: + CWE: + description: Calibration watchdog event + bitOffset: 0 + bitWidth: 1 + CSC: + description: Calibration state changed + bitOffset: 1 + bitWidth: 1 + IE: + displayName: IE + description: Clock calibration unit interrupt enable register + addressOffset: 0x14 + size: 0x20 + access: read-write + resetValue: 0x00000000 + fields: + CWEE: + description: Calibration watchdog event enable + bitOffset: 0 + bitWidth: 1 + CSCE: + description: Calibration state changed enable + bitOffset: 1 + bitWidth: 1 diff --git a/devices/common_patches/fdcan/fdcan_common.yaml b/devices/common_patches/fdcan/fdcan_common.yaml index eaecb2131..5a5b4c425 100644 --- a/devices/common_patches/fdcan/fdcan_common.yaml +++ b/devices/common_patches/fdcan/fdcan_common.yaml @@ -1,6 +1,8 @@ # Patches for the Flexible Data Rate CAN (FDCAN) on at least H7, G4 "FDCAN,FDCAN?": + _strip: + - FDCAN_ _modify: "DBTP,TDCR,TSCV,TOCV,IR,IE,ILS,NDAT1,NDAT2": access: read-write diff --git a/devices/common_patches/fdcan/fdcan_h7.yaml b/devices/common_patches/fdcan/fdcan_h7_common.yaml similarity index 87% rename from devices/common_patches/fdcan/fdcan_h7.yaml rename to devices/common_patches/fdcan/fdcan_h7_common.yaml index 70ce0f11a..3562a84fc 100644 --- a/devices/common_patches/fdcan/fdcan_h7.yaml +++ b/devices/common_patches/fdcan/fdcan_h7_common.yaml @@ -1,8 +1,5 @@ # Patches for the Flexible Data Rate CAN (FDCAN) on H7 -_include: - - ./fdcan_common.yaml - "FDCAN,FDCAN?": RXF0C: _modify: @@ -49,3 +46,13 @@ _include: access: read-write CAN_TTGTP: name: TTGTP + +FDCAN1: + TTOST: + _modify: + GTP: + name: QGTP + TTCPT: + _modify: + CT: + name: CCV diff --git a/devices/common_patches/fdcan/fdcan_h7_highmemory.yaml b/devices/common_patches/fdcan/fdcan_h7_highmemory.yaml new file mode 100644 index 000000000..a835ea661 --- /dev/null +++ b/devices/common_patches/fdcan/fdcan_h7_highmemory.yaml @@ -0,0 +1,16 @@ +# FDCAN modifications for high memory density parts h7a3/h7b3/h7b0 + +_copy: + FDCAN2: + from: TT_FDCAN # see: ./fdcan_ttcan_reg_tidyup.yaml + +_modify: + TT_FDCAN: + name: FDCAN1 # see: ./fdcan_ttcan_reg_tidyup.yaml + FDCAN2: + baseAddress: "0x4000A400" # see: ./fdcan_ttcan_reg_tidyup.yaml + +_include: + - ./fdcan_common.yaml + - ./fdcan_h7_common.yaml + - ./fdcan_ttcan_reg_tidyup.yaml diff --git a/devices/common_patches/fdcan/fdcan_h7_stdmemory.yaml b/devices/common_patches/fdcan/fdcan_h7_stdmemory.yaml new file mode 100644 index 000000000..d42f946a6 --- /dev/null +++ b/devices/common_patches/fdcan/fdcan_h7_stdmemory.yaml @@ -0,0 +1,14 @@ +# FDCAN modifications for standard memory density parts (h72xx/h73xx/h74xx/h75xx) + +_copy: + FDCAN2: + from: FDCAN1 # see: ./fdcan_ttcan_reg_tidyup.yaml + +_modify: + FDCAN2: + baseAddress: "0x4000A400" # see: ./fdcan_ttcan_reg_tidyup.yaml + +_include: + - ./fdcan_common.yaml + - ./fdcan_h7_common.yaml + - ./fdcan_ttcan_reg_tidyup.yaml diff --git a/devices/common_patches/fdcan/fdcan_mp1.yaml b/devices/common_patches/fdcan/fdcan_mp1.yaml new file mode 100644 index 000000000..509a96233 --- /dev/null +++ b/devices/common_patches/fdcan/fdcan_mp1.yaml @@ -0,0 +1,16 @@ +# Patches for the Flexible Data Rate CAN (FDCAN) on mp153/mp157 + +_delete: + - FDCAN2 # see: ./fdcan_ttcan_reg_tidyup.yaml + +_copy: + FDCAN2: + from: FDCAN1 # see: ./fdcan_ttcan_reg_tidyup.yaml + +_modify: + FDCAN2: + baseAddress: "0x4400F000" # see: ./fdcan_ttcan_reg_tidyup.yaml + +_include: + - ./fdcan_common.yaml + - ./fdcan_ttcan_reg_tidyup.yaml diff --git a/devices/common_patches/fdcan/fdcan_ttcan_reg_tidyup.yaml b/devices/common_patches/fdcan/fdcan_ttcan_reg_tidyup.yaml new file mode 100644 index 000000000..caf241f62 --- /dev/null +++ b/devices/common_patches/fdcan/fdcan_ttcan_reg_tidyup.yaml @@ -0,0 +1,57 @@ +# Removes redundant TTCAN (Time Triggered CAN) registers on FDCAN peripherals +# that don't support TTCAN, also fixes bad interrupt definitions on H7Ax/H7B0 + +# This patch deletes the derived FDCAN peripheral and updates a copy of the +# primary one, deleting the TTCAN registers. +# This can then be used to derive further non-TTCAN FDCAN peripherals where +# present, e.g. H72x/H73x. + +# When including this patch ensure that: +# - the TTCAN peripheral is (re)named FDCAN1 +# - FDCAN1 is copied to FDCAN2 +# - FDCAN2 base-address is correctly updated + +_delete: + - FDCAN + - FDCAN2 + +# Logically, the copy of FDCAN1 -> FDCAN2 happens here, but must be placed +# in device specific files due to FDCAN peripheral naming differences (namely +# H7Ax/H7Bx) + +_modify: + FDCAN1: + description: FDCAN1 + FDCAN2: + description: FDCAN2 + +# SVD files are missing interrupts for FDCAN1 on H7Ax/H7Bx, other SVDs have +# bad descriptions, delete and re-add interrupts to handle all cases here +FDCAN1: + _delete: + _interrupts: + - FDCAN?_IT? + _add: + _interrupts: + FDCAN1_IT0: + description: FDCAN1 Interrupt 0 + value: 19 + FDCAN1_IT1: + description: FDCAN1 Interrupt 1 + value: 21 + +FDCAN2: + _delete: + # Delete redundant TTCAN registers copied from FDCAN1 + _registers: + - TT* + - TUR* + _add: + # Add correct interrupts for FDCAN2 + _interrupts: + FDCAN2_IT0: + description: FDCAN2 Interrupt 0 + value: 20 + FDCAN2_IT1: + description: FDCAN2 Interrupt 1 + value: 22 diff --git a/devices/common_patches/h7_common_dualcore.yaml b/devices/common_patches/h7_common_dualcore.yaml index c9ecf73a1..66a412880 100644 --- a/devices/common_patches/h7_common_dualcore.yaml +++ b/devices/common_patches/h7_common_dualcore.yaml @@ -710,10 +710,6 @@ SAI4: _strip: - OTG_HS_ -"FDCAN?": - _strip: - - FDCAN_ - WWDG1,WWDG2: _strip: - WWDG_ diff --git a/devices/common_patches/h7_common_highmemory.yaml b/devices/common_patches/h7_common_highmemory.yaml index c3fe2ae6a..ff3407168 100644 --- a/devices/common_patches/h7_common_highmemory.yaml +++ b/devices/common_patches/h7_common_highmemory.yaml @@ -6,10 +6,6 @@ _modify: Flash: name: FLASH - TT_FDCAN: - name: FDCAN1 - FDCAN: - name: FDCAN2 DAC: name: DAC1 @@ -721,10 +717,6 @@ VREFBUF: _strip: - OTG_HS_ -"FDCAN?": - _strip: - - FDCAN_ - WWDG: _strip: - WWDG_ diff --git a/devices/common_patches/h7_common_singlecore.yaml b/devices/common_patches/h7_common_singlecore.yaml index ffebd5c1b..0a5505cc0 100644 --- a/devices/common_patches/h7_common_singlecore.yaml +++ b/devices/common_patches/h7_common_singlecore.yaml @@ -502,10 +502,6 @@ AXI: _strip: - OTG_HS_ -"FDCAN?": - _strip: - - FDCAN_ - # TIM3, TIM4, TIM12, TIM13, TIM14 are 16-bit, whilst TIM2 is 32-bit _copy: TIM3: diff --git a/devices/stm32h735.yaml b/devices/stm32h735.yaml index 2b89aeb36..71de77796 100644 --- a/devices/stm32h735.yaml +++ b/devices/stm32h735.yaml @@ -366,6 +366,19 @@ _add: value: 153 description: FMAC interrupt + # FDCAN3 peripheral is missing from the SVD + FDCAN3: + derivedFrom: FDCAN2 + description: FDCAN3 + baseAddress: "0x4000D400" + interrupts: + FDCAN3_IT0: + value: 159 + description: FDCAN3 Interrupt 0 + FDCAN3_IT1: + value: 160 + description: FDCAN3 Interrupt 1 + # PWR block PWR: CR3: @@ -900,17 +913,6 @@ RAMECC1: # value: 158 # description: I2C5 error interrupt -# FDCAN3 peripheral is missing from the SVD. -#FDCAN3: -# _add: -# _interrupts: -# FDCAN3_IT0: -# value: 159 -# description: FDCAN3 interrupt line 0 -# FDCAN3_IT1: -# value: 160 -# description: FDCAN3 interrupt line 1 - # Modify the DBGMCU.CR register fields names to be consistent with RM0468. # TODO: Interesting aside: the svd lists these controls additionally for D2 and # D3, while the RM0468 specifies those as reserved bits, while still having @@ -934,7 +936,7 @@ _include: - common_patches/rcc/h7_hsicfgr_csicfgr_rev_v.yaml - common_patches/rcc/h7_hsicfgr_csicfgr_735.yaml - common_patches/h7_common_singlecore.yaml - - common_patches/fdcan/fdcan_h7.yaml + - common_patches/fdcan/fdcan_h7_stdmemory.yaml - collect/fsmc/sdram.yaml - common_patches/rcc/h7_src_sel_common.yaml - common_patches/ethernet/h7_combined_desc.yaml diff --git a/devices/stm32h743.yaml b/devices/stm32h743.yaml index 91ac60366..8d4591e53 100644 --- a/devices/stm32h743.yaml +++ b/devices/stm32h743.yaml @@ -32,7 +32,7 @@ QUADSPI: _include: - ../peripherals/hdmi_cec.yaml - common_patches/h7_common_singlecore.yaml - - common_patches/fdcan/fdcan_h7.yaml + - common_patches/fdcan/fdcan_h7_stdmemory.yaml - collect/fsmc/sdram.yaml - common_patches/rcc/h7_src_sel.yaml - common_patches/ethernet/h7_desc.yaml diff --git a/devices/stm32h743v.yaml b/devices/stm32h743v.yaml index 1a4b59e76..249a4125f 100644 --- a/devices/stm32h743v.yaml +++ b/devices/stm32h743v.yaml @@ -33,7 +33,7 @@ _include: - ../peripherals/hdmi_cec.yaml - common_patches/h7_common_singlecore.yaml - common_patches/ethernet/h7_dma_mr.yaml - - common_patches/fdcan/fdcan_h7.yaml + - common_patches/fdcan/fdcan_h7_stdmemory.yaml - collect/fsmc/sdram.yaml - common_patches/rcc/h7_src_sel.yaml - common_patches/ethernet/h7_desc.yaml diff --git a/devices/stm32h747cm4.yaml b/devices/stm32h747cm4.yaml index 0efd12298..5f1fed9b0 100644 --- a/devices/stm32h747cm4.yaml +++ b/devices/stm32h747cm4.yaml @@ -32,7 +32,7 @@ _include: - common_patches/rcc/h7_hsicfgr_csicfgr_rev_v.yaml - common_patches/h7_common_dualcore.yaml - common_patches/nvic/4_prio_bits.yaml # Specifically for CM4 core - - common_patches/fdcan/fdcan_h7.yaml + - common_patches/fdcan/fdcan_h7_stdmemory.yaml - collect/fsmc/sdram.yaml - common_patches/rcc/h7_src_sel.yaml - common_patches/ethernet/h7_combined_desc.yaml diff --git a/devices/stm32h747cm7.yaml b/devices/stm32h747cm7.yaml index 8364d3344..89cfc5b0f 100644 --- a/devices/stm32h747cm7.yaml +++ b/devices/stm32h747cm7.yaml @@ -31,7 +31,7 @@ _include: - ../peripherals/hdmi_cec.yaml - common_patches/rcc/h7_hsicfgr_csicfgr_rev_v.yaml - common_patches/h7_common_dualcore.yaml - - common_patches/fdcan/fdcan_h7.yaml + - common_patches/fdcan/fdcan_h7_stdmemory.yaml - collect/fsmc/sdram.yaml - common_patches/rcc/h7_src_sel.yaml - common_patches/ethernet/h7_combined_desc.yaml diff --git a/devices/stm32h753.yaml b/devices/stm32h753.yaml index 3a1104604..289193ffb 100644 --- a/devices/stm32h753.yaml +++ b/devices/stm32h753.yaml @@ -43,7 +43,7 @@ _include: - ../peripherals/hdmi_cec.yaml - common_patches/h7_common_singlecore.yaml - common_patches/ethernet/h7_dma_mr.yaml - - common_patches/fdcan/fdcan_h7.yaml + - common_patches/fdcan/fdcan_h7_stdmemory.yaml - collect/fsmc/sdram.yaml - common_patches/rcc/h7_src_sel.yaml - common_patches/ethernet/h7_desc.yaml diff --git a/devices/stm32h753v.yaml b/devices/stm32h753v.yaml index ffe60613a..83b1a06a8 100644 --- a/devices/stm32h753v.yaml +++ b/devices/stm32h753v.yaml @@ -43,7 +43,7 @@ _include: - ../peripherals/hdmi_cec.yaml - common_patches/h7_common_singlecore.yaml - common_patches/ethernet/h7_dma_mr.yaml - - common_patches/fdcan/fdcan_h7.yaml + - common_patches/fdcan/fdcan_h7_stdmemory.yaml - collect/fsmc/sdram.yaml - common_patches/rcc/h7_src_sel.yaml - common_patches/ethernet/h7_desc.yaml diff --git a/devices/stm32h7b3.yaml b/devices/stm32h7b3.yaml index b86c02e5f..1171b76e1 100644 --- a/devices/stm32h7b3.yaml +++ b/devices/stm32h7b3.yaml @@ -87,7 +87,8 @@ DFSDM*: _include: - common_patches/h7_common_highmemory.yaml - ../peripherals/hdmi_cec.yaml - - common_patches/fdcan/fdcan_h7.yaml + - common_patches/fdcan/fdcan_h7_highmemory.yaml + - common_patches/fdcan/fdcan_ccu.yaml - collect/fsmc/sdram.yaml - common_patches/exti/h7_singlecore.yaml - common_patches/dbgmcu/h7.yaml diff --git a/devices/stm32mp153.yaml b/devices/stm32mp153.yaml index 6bb10a3b8..9e4623b6a 100644 --- a/devices/stm32mp153.yaml +++ b/devices/stm32mp153.yaml @@ -23,3 +23,4 @@ _include: - common_patches/rtc/alarm.yaml - collect/rtc/tamp_bkpr.yaml - collect/rtc/alarm.yaml + - common_patches/fdcan/fdcan_mp1.yaml diff --git a/devices/stm32mp157.yaml b/devices/stm32mp157.yaml index 932a39604..de691783b 100644 --- a/devices/stm32mp157.yaml +++ b/devices/stm32mp157.yaml @@ -30,3 +30,4 @@ _include: - common_patches/rtc/alarm.yaml - collect/rtc/tamp_bkpr.yaml - collect/rtc/alarm.yaml + - common_patches/fdcan/fdcan_mp1.yaml diff --git a/stm32_part_table.yaml b/stm32_part_table.yaml index d8179aec1..dceff0d37 100644 --- a/stm32_part_table.yaml +++ b/stm32_part_table.yaml @@ -764,14 +764,14 @@ stm32mp1: url: https://www.st.com/en/microcontrollers-microprocessors/stm32mp157.html rm: RM0436 rm_title: STM32MP157 - rm_url: https://www.st.com/resource/en/reference_manual/dm00366355-stm32mp157-advanced-armbased-32bit-mpus-stmicroelectronics.pdf + rm_url: https://www.st.com/resource/en/reference_manual/DM00327659.pdf members: - STM32MP157 stm32mp153: url: https://www.st.com/en/microcontrollers-microprocessors/stm32mp153.html rm: RM0442 rm_title: STM32MP153 - rm_url: https://www.st.com/resource/en/reference_manual/rm0442-stm32mp153-advanced-armbased-32bit-mpus-stmicroelectronics.pdf + rm_url: https://www.st.com/resource/en/reference_manual/DM00366355.pdf members: - STM32MP153 pFad - Phonifier reborn

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