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fpistmfpistm
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variant(WL): update with SUBGHZSPI debug pins
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
1 parent 6c7e66c commit 0978f6b

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8 files changed

+78
-52
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8 files changed

+78
-52
lines changed

‎variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/PeripheralPins.c

Lines changed: 26 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -155,43 +155,47 @@ WEAK const PinMap PinMap_UART_CTS[] = {
155155

156156
#ifdef HAL_SPI_MODULE_ENABLED
157157
WEAK const PinMap PinMap_SPI_MOSI[] = {
158-
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
159-
{PA_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
160-
{PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
161-
{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
162-
{NC, NP, 0}
158+
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
159+
{PA_7_ALT1, SUBGHZSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_DEBUG_SUBGHZSPI)},
160+
{PA_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
161+
{PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
162+
{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
163+
{NC, NP, 0}
163164
};
164165
#endif
165166

166167
#ifdef HAL_SPI_MODULE_ENABLED
167168
WEAK const PinMap PinMap_SPI_MISO[] = {
168-
{PA_5, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)},
169-
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
170-
{PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
171-
{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
172-
{NC, NP, 0}
169+
{PA_5, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)},
170+
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
171+
{PA_6_ALT1, SUBGHZSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_DEBUG_SUBGHZSPI)},
172+
{PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
173+
{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
174+
{NC, NP, 0}
173175
};
174176
#endif
175177

176178
#ifdef HAL_SPI_MODULE_ENABLED
177179
WEAK const PinMap PinMap_SPI_SCLK[] = {
178-
{PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
179-
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
180-
{PA_8, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
181-
{PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
182-
{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
183-
{NC, NP, 0}
180+
{PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
181+
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
182+
{PA_5_ALT1, SUBGHZSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_DEBUG_SUBGHZSPI)},
183+
{PA_8, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
184+
{PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
185+
{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
186+
{NC, NP, 0}
184187
};
185188
#endif
186189

187190
#ifdef HAL_SPI_MODULE_ENABLED
188191
WEAK const PinMap PinMap_SPI_SSEL[] = {
189-
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
190-
{PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)},
191-
{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
192-
{PB_2, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
193-
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
194-
{NC, NP, 0}
192+
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
193+
{PA_4_ALT1, SUBGHZSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_DEBUG_SUBGHZSPI)},
194+
{PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)},
195+
{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
196+
{PB_2, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
197+
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
198+
{NC, NP, 0}
195199
};
196200
#endif
197201

‎variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/PinNamesVar.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,9 @@
22
PA_1_ALT1 = PA_1 | ALT1,
33
PA_2_ALT1 = PA_2 | ALT1,
44
PA_3_ALT1 = PA_3 | ALT1,
5+
PA_4_ALT1 = PA_4 | ALT1,
6+
PA_5_ALT1 = PA_5 | ALT1,
7+
PA_6_ALT1 = PA_6 | ALT1,
58
PA_7_ALT1 = PA_7 | ALT1,
69
PB_8_ALT1 = PB_8 | ALT1,
710

‎variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/variant_GENERIC_NODE_SE_TTI.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -49,6 +49,9 @@
4949
#define PA1_ALT1 (PA1 | ALT1)
5050
#define PA2_ALT1 (PA2 | ALT1)
5151
#define PA3_ALT1 (PA3 | ALT1)
52+
#define PA4_ALT1 (PA4 | ALT1)
53+
#define PA5_ALT1 (PA5 | ALT1)
54+
#define PA6_ALT1 (PA6 | ALT1)
5255
#define PA7_ALT1 (PA7 | ALT1)
5356
#define PB8_ALT1 (PB8 | ALT1)
5457

‎variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/variant_generic.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -49,6 +49,9 @@
4949
#define PA1_ALT1 (PA1 | ALT1)
5050
#define PA2_ALT1 (PA2 | ALT1)
5151
#define PA3_ALT1 (PA3 | ALT1)
52+
#define PA4_ALT1 (PA4 | ALT1)
53+
#define PA5_ALT1 (PA5 | ALT1)
54+
#define PA6_ALT1 (PA6 | ALT1)
5255
#define PA7_ALT1 (PA7 | ALT1)
5356
#define PB8_ALT1 (PB8 | ALT1)
5457

‎variants/STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I/PeripheralPins.c

Lines changed: 34 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -179,51 +179,55 @@ WEAK const PinMap PinMap_UART_CTS[] = {
179179

180180
#ifdef HAL_SPI_MODULE_ENABLED
181181
WEAK const PinMap PinMap_SPI_MOSI[] = {
182-
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
183-
{PA_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
184-
{PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
185-
{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
186-
{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
187-
{PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)},
188-
{PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
189-
{NC, NP, 0}
182+
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
183+
{PA_7_ALT1, SUBGHZSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_DEBUG_SUBGHZSPI)},
184+
{PA_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
185+
{PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
186+
{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
187+
{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
188+
{PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)},
189+
{PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
190+
{NC, NP, 0}
190191
};
191192
#endif
192193

193194
#ifdef HAL_SPI_MODULE_ENABLED
194195
WEAK const PinMap PinMap_SPI_MISO[] = {
195-
{PA_5, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)},
196-
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
197-
{PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
198-
{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
199-
{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
200-
{PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
201-
{NC, NP, 0}
196+
{PA_5, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)},
197+
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
198+
{PA_6_ALT1, SUBGHZSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_DEBUG_SUBGHZSPI)},
199+
{PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
200+
{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
201+
{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
202+
{PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
203+
{NC, NP, 0}
202204
};
203205
#endif
204206

205207
#ifdef HAL_SPI_MODULE_ENABLED
206208
WEAK const PinMap PinMap_SPI_SCLK[] = {
207-
{PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
208-
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
209-
{PA_8, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
210-
{PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
211-
{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
212-
{PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
213-
{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
214-
{NC, NP, 0}
209+
{PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
210+
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
211+
{PA_5_ALT1, SUBGHZSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_DEBUG_SUBGHZSPI)},
212+
{PA_8, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
213+
{PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
214+
{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
215+
{PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
216+
{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
217+
{NC, NP, 0}
215218
};
216219
#endif
217220

218221
#ifdef HAL_SPI_MODULE_ENABLED
219222
WEAK const PinMap PinMap_SPI_SSEL[] = {
220-
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
221-
{PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)},
222-
{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
223-
{PB_2, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
224-
{PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
225-
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
226-
{NC, NP, 0}
223+
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
224+
{PA_4_ALT1, SUBGHZSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_DEBUG_SUBGHZSPI)},
225+
{PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)},
226+
{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
227+
{PB_2, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
228+
{PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
229+
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
230+
{NC, NP, 0}
227231
};
228232
#endif
229233

‎variants/STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I/PinNamesVar.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,9 @@
22
PA_1_ALT1 = PA_1 | ALT1,
33
PA_2_ALT1 = PA_2 | ALT1,
44
PA_3_ALT1 = PA_3 | ALT1,
5+
PA_4_ALT1 = PA_4 | ALT1,
6+
PA_5_ALT1 = PA_5 | ALT1,
7+
PA_6_ALT1 = PA_6 | ALT1,
58
PA_7_ALT1 = PA_7 | ALT1,
69
PB_8_ALT1 = PB_8 | ALT1,
710
PB_9_ALT1 = PB_9 | ALT1,

‎variants/STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I/variant_NUCLEO_WL55JC1.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -72,6 +72,9 @@
7272
#define PA1_ALT1 (PA1 | ALT1)
7373
#define PA2_ALT1 (PA2 | ALT1)
7474
#define PA3_ALT1 (PA3 | ALT1)
75+
#define PA4_ALT1 (PA4 | ALT1)
76+
#define PA5_ALT1 (PA5 | ALT1)
77+
#define PA6_ALT1 (PA6 | ALT1)
7578
#define PA7_ALT1 (PA7 | ALT1)
7679
#define PB8_ALT1 (PB8 | ALT1)
7780
#define PB9_ALT1 (PB9 | ALT1)

‎variants/STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I/variant_generic.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -63,6 +63,9 @@
6363
#define PA1_ALT1 (PA1 | ALT1)
6464
#define PA2_ALT1 (PA2 | ALT1)
6565
#define PA3_ALT1 (PA3 | ALT1)
66+
#define PA4_ALT1 (PA4 | ALT1)
67+
#define PA5_ALT1 (PA5 | ALT1)
68+
#define PA6_ALT1 (PA6 | ALT1)
6669
#define PA7_ALT1 (PA7 | ALT1)
6770
#define PB8_ALT1 (PB8 | ALT1)
6871
#define PB9_ALT1 (PB9 | ALT1)

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