fix: variant WB55R(C-E-G)V linker script update SRAM2a SRAM2b

ABOSTM · ABOSTM · commit 61b889ec6534 · 2022-10-04T13:53:29.000+02:00
Reduce SRAM2a size depending on BLE secure contraint
imposed by Firmware Stack Full Extended
Add SRAM2b, as not enough place in SRAM2a

Signed-off-by: Alexandre Bourdiol &lt;alexandre.bourdiol@st.com&gt;
diff --git a/variants/STM32WBxx/WB55R(C-E-G)V/ldscript.ld b/variants/STM32WBxx/WB55R(C-E-G)V/ldscript.ld
@@ -47,7 +47,8 @@ MEMORY
 {
 FLASH (rx)                 : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
 RAM1 (xrw)                 : ORIGIN = 0x20000004, LENGTH = LD_MAX_DATA_SIZE - 4
-RAM_SHARED (xrw)           : ORIGIN = 0x20030000, LENGTH = 10K
+RAM_SHARED_SRAM2a (xrw)    : ORIGIN = 0x20030000, LENGTH = 2K  /* Limited by OptionByte SBRSA when loading fimware Full stack extended */
+RAM_SHARED_SRAM2b (xrw)    : ORIGIN = 0x20038000, LENGTH = 10K  /* Limited by OptionByte SNBRSA when loading fimware Full stack extended */
 }
 
 /* Define output sections */
@@ -168,7 +169,7 @@ SECTIONS
   }
 
   .ARM.attributes 0       : { *(.ARM.attributes) }
-   MAPPING_TABLE (NOLOAD) : { *(MAPPING_TABLE) } >RAM_SHARED
-   MB_MEM1 (NOLOAD)       : { *(MB_MEM1) } >RAM_SHARED
-   MB_MEM2 (NOLOAD)       : { _sMB_MEM2 = . ; *(MB_MEM2) ; _eMB_MEM2 = . ; } >RAM_SHARED
+   MAPPING_TABLE (NOLOAD) : { *(MAPPING_TABLE) } >RAM_SHARED_SRAM2a
+   MB_MEM1 (NOLOAD)       : { *(MB_MEM1) } >RAM_SHARED_SRAM2a
+   MB_MEM2 (NOLOAD)       : { _sMB_MEM2 = . ; *(MB_MEM2) ; _eMB_MEM2 = . ; } >RAM_SHARED_SRAM2b
 }

Original file line number	Diff line number	Diff line change
`@@ -47,7 +47,8 @@ MEMORY`
`47`	`47`	`{`
`48`	`48`	`FLASH (rx) : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET`
`49`	`49`	`RAM1 (xrw) : ORIGIN = 0x20000004, LENGTH = LD_MAX_DATA_SIZE - 4`
`50`		`-RAM_SHARED (xrw) : ORIGIN = 0x20030000, LENGTH = 10K`
	`50`	`+RAM_SHARED_SRAM2a (xrw) : ORIGIN = 0x20030000, LENGTH = 2K /* Limited by OptionByte SBRSA when loading fimware Full stack extended */`
	`51`	`+RAM_SHARED_SRAM2b (xrw) : ORIGIN = 0x20038000, LENGTH = 10K /* Limited by OptionByte SNBRSA when loading fimware Full stack extended */`
`51`	`52`	`}`
`52`	`53`
`53`	`54`	`/* Define output sections */`
`@@ -168,7 +169,7 @@ SECTIONS`
`168`	`169`	`}`
`169`	`170`
`170`	`171`	`.ARM.attributes 0 : { *(.ARM.attributes) }`
`171`		`- MAPPING_TABLE (NOLOAD) : { *(MAPPING_TABLE) } >RAM_SHARED`
`172`		`- MB_MEM1 (NOLOAD) : { *(MB_MEM1) } >RAM_SHARED`
`173`		`- MB_MEM2 (NOLOAD) : { _sMB_MEM2 = . ; *(MB_MEM2) ; _eMB_MEM2 = . ; } >RAM_SHARED`
	`172`	`+ MAPPING_TABLE (NOLOAD) : { *(MAPPING_TABLE) } >RAM_SHARED_SRAM2a`
	`173`	`+ MB_MEM1 (NOLOAD) : { *(MB_MEM1) } >RAM_SHARED_SRAM2a`
	`174`	`+ MB_MEM2 (NOLOAD) : { _sMB_MEM2 = . ; *(MB_MEM2) ; _eMB_MEM2 = . ; } >RAM_SHARED_SRAM2b`
`174`	`175`	`}`