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system(WB) update STM32WBxx HAL Drivers to v1.14.2
Included in STM32CubeWB FW v1.19.0 Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
1 parent 4782f07 commit b51bf2e

21 files changed

+354
-195
lines changed

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h

Lines changed: 36 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -548,6 +548,16 @@ extern "C" {
548548
#define OB_SRAM134_RST_ERASE OB_SRAM_RST_ERASE
549549
#define OB_SRAM134_RST_NOT_ERASE OB_SRAM_RST_NOT_ERASE
550550
#endif /* STM32U5 */
551+
#if defined(STM32U0)
552+
#define OB_USER_nRST_STOP OB_USER_NRST_STOP
553+
#define OB_USER_nRST_STDBY OB_USER_NRST_STDBY
554+
#define OB_USER_nRST_SHDW OB_USER_NRST_SHDW
555+
#define OB_USER_nBOOT_SEL OB_USER_NBOOT_SEL
556+
#define OB_USER_nBOOT0 OB_USER_NBOOT0
557+
#define OB_USER_nBOOT1 OB_USER_NBOOT1
558+
#define OB_nBOOT0_RESET OB_NBOOT0_RESET
559+
#define OB_nBOOT0_SET OB_NBOOT0_SET
560+
#endif /* STM32U0 */
551561

552562
/**
553563
* @}
@@ -1239,10 +1249,10 @@ extern "C" {
12391249
#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
12401250
#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
12411251

1242-
#if defined(STM32H5)
1252+
#if defined(STM32H5) || defined(STM32H7RS)
12431253
#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
12441254
#define TAMP_SECRETDEVICE_ERASE_BKP_SRAM TAMP_DEVICESECRETS_ERASE_BKPSRAM
1245-
#endif /* STM32H5 */
1255+
#endif /* STM32H5 || STM32H7RS */
12461256

12471257
#if defined(STM32WBA)
12481258
#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
@@ -1254,10 +1264,10 @@ extern "C" {
12541264
#define TAMP_SECRETDEVICE_ERASE_ALL TAMP_DEVICESECRETS_ERASE_ALL
12551265
#endif /* STM32WBA */
12561266

1257-
#if defined(STM32H5) || defined(STM32WBA)
1267+
#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)
12581268
#define TAMP_SECRETDEVICE_ERASE_DISABLE TAMP_DEVICESECRETS_ERASE_NONE
12591269
#define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL
1260-
#endif /* STM32H5 || STM32WBA */
1270+
#endif /* STM32H5 || STM32WBA || STM32H7RS */
12611271

12621272
#if defined(STM32F7)
12631273
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK
@@ -1595,6 +1605,8 @@ extern "C" {
15951605
#define ETH_MAC_SMALL_FIFO_RW_ACTIVE 0x00000006U /* MAC small FIFO read / write controllers active */
15961606
#define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE 0x00000001U /* MAC MII receive protocol engine active */
15971607

1608+
#define ETH_TxPacketConfig ETH_TxPacketConfigTypeDef /* Transmit Packet Configuration structure definition */
1609+
15981610
/**
15991611
* @}
16001612
*/
@@ -1987,12 +1999,12 @@ extern "C" {
19871999
/** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose
19882000
* @{
19892001
*/
1990-
#if defined(STM32H5) || defined(STM32WBA)
2002+
#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)
19912003
#define HAL_RTCEx_SetBoothardwareKey HAL_RTCEx_LockBootHardwareKey
19922004
#define HAL_RTCEx_BKUPBlock_Enable HAL_RTCEx_BKUPBlock
19932005
#define HAL_RTCEx_BKUPBlock_Disable HAL_RTCEx_BKUPUnblock
19942006
#define HAL_RTCEx_Erase_SecretDev_Conf HAL_RTCEx_ConfigEraseDeviceSecrets
1995-
#endif /* STM32H5 || STM32WBA */
2007+
#endif /* STM32H5 || STM32WBA || STM32H7RS */
19962008

19972009
/**
19982010
* @}
@@ -2307,8 +2319,8 @@ extern "C" {
23072319
#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
23082320
((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
23092321
__HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
2310-
# endif
2311-
# if defined(STM32F302xE) || defined(STM32F302xC)
2322+
#endif
2323+
#if defined(STM32F302xE) || defined(STM32F302xC)
23122324
#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
23132325
((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
23142326
((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
@@ -2341,8 +2353,8 @@ extern "C" {
23412353
((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
23422354
((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
23432355
__HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
2344-
# endif
2345-
# if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx)
2356+
#endif
2357+
#if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx)
23462358
#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
23472359
((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
23482360
((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() : \
@@ -2399,8 +2411,8 @@ extern "C" {
23992411
((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() : \
24002412
((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : \
24012413
__HAL_COMP_COMP7_EXTI_CLEAR_FLAG())
2402-
# endif
2403-
# if defined(STM32F373xC) ||defined(STM32F378xx)
2414+
#endif
2415+
#if defined(STM32F373xC) ||defined(STM32F378xx)
24042416
#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
24052417
__HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
24062418
#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
@@ -2417,7 +2429,7 @@ extern "C" {
24172429
__HAL_COMP_COMP2_EXTI_GET_FLAG())
24182430
#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
24192431
__HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
2420-
# endif
2432+
#endif
24212433
#else
24222434
#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
24232435
__HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
@@ -3642,9 +3654,12 @@ extern "C" {
36423654
#define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK
36433655
#define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2
36443656

3645-
#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \
3646-
defined(STM32WL) || defined(STM32C0)
3657+
#if defined(STM32U0)
3658+
#define RCC_SYSCLKSOURCE_STATUS_PLLR RCC_SYSCLKSOURCE_STATUS_PLLCLK
3659+
#endif
36473660

3661+
#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \
3662+
defined(STM32WL) || defined(STM32C0) || defined(STM32H7RS) || defined(STM32U0)
36483663
#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
36493664
#else
36503665
#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
@@ -3746,8 +3761,10 @@ extern "C" {
37463761
#define __HAL_RCC_GET_DFSDM_SOURCE __HAL_RCC_GET_DFSDM1_SOURCE
37473762
#define RCC_DFSDM1CLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2
37483763
#define RCC_SWPMI1CLKSOURCE_PCLK RCC_SWPMI1CLKSOURCE_PCLK1
3764+
#if !defined(STM32U0)
37493765
#define RCC_LPTIM1CLKSOURCE_PCLK RCC_LPTIM1CLKSOURCE_PCLK1
37503766
#define RCC_LPTIM2CLKSOURCE_PCLK RCC_LPTIM2CLKSOURCE_PCLK1
3767+
#endif
37513768

37523769
#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM1AUDIOCLKSOURCE_I2S1
37533770
#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM1AUDIOCLKSOURCE_I2S2
@@ -3893,8 +3910,7 @@ extern "C" {
38933910
*/
38943911
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \
38953912
defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \
3896-
defined (STM32WBA) || defined (STM32H5) || \
3897-
defined (STM32C0)
3913+
defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32H7RS) || defined (STM32U0)
38983914
#else
38993915
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
39003916
#endif
@@ -4217,6 +4233,9 @@ extern "C" {
42174233
#define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE
42184234

42194235
#define TIM_BREAKINPUTSOURCE_DFSDM TIM_BREAKINPUTSOURCE_DFSDM1
4236+
4237+
#define TIM_OCMODE_ASSYMETRIC_PWM1 TIM_OCMODE_ASYMMETRIC_PWM1
4238+
#define TIM_OCMODE_ASSYMETRIC_PWM2 TIM_OCMODE_ASYMMETRIC_PWM2
42204239
/**
42214240
* @}
42224241
*/

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_cortex.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -293,6 +293,8 @@ void HAL_SYSTICK_Callback(void);
293293
#if (__MPU_PRESENT == 1U)
294294
void HAL_MPU_Enable(uint32_t MPU_Control);
295295
void HAL_MPU_Disable(void);
296+
void HAL_MPU_EnableRegion(uint32_t RegionNumber);
297+
void HAL_MPU_DisableRegion(uint32_t RegionNumber);
296298
void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
297299
#endif /* __MPU_PRESENT */
298300
/**

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_cryp.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,8 @@ typedef struct
5353
uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string.
5454
This parameter can be a value of @ref CRYP_Data_Type */
5555
uint32_t KeySize; /*!< Used only in AES mode : 128, 192 or 256 bit key length in CRYP1.
56-
128 or 256 bit key length in TinyAES This parameter can be a value of @ref CRYP_Key_Size */
56+
128 or 256 bit key length in TinyAES
57+
This parameter can be a value of @ref CRYP_Key_Size */
5758
uint32_t *pKey; /*!< The key used for encryption/decryption */
5859
uint32_t *pInitVect; /*!< The initialization vector used also as initialization
5960
counter in CTR mode */

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_qspi.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -589,13 +589,13 @@ HAL_StatusTypeDef HAL_QSPI_UnRegisterCallback (QSPI_HandleTypeDef *hqspi,
589589
* @{
590590
*/
591591
/* Peripheral Control and State functions ************************************/
592-
HAL_QSPI_StateTypeDef HAL_QSPI_GetState (QSPI_HandleTypeDef *hqspi);
593-
uint32_t HAL_QSPI_GetError (QSPI_HandleTypeDef *hqspi);
592+
HAL_QSPI_StateTypeDef HAL_QSPI_GetState (const QSPI_HandleTypeDef *hqspi);
593+
uint32_t HAL_QSPI_GetError (const QSPI_HandleTypeDef *hqspi);
594594
HAL_StatusTypeDef HAL_QSPI_Abort (QSPI_HandleTypeDef *hqspi);
595595
HAL_StatusTypeDef HAL_QSPI_Abort_IT (QSPI_HandleTypeDef *hqspi);
596596
void HAL_QSPI_SetTimeout (QSPI_HandleTypeDef *hqspi, uint32_t Timeout);
597597
HAL_StatusTypeDef HAL_QSPI_SetFifoThreshold(QSPI_HandleTypeDef *hqspi, uint32_t Threshold);
598-
uint32_t HAL_QSPI_GetFifoThreshold(QSPI_HandleTypeDef *hqspi);
598+
uint32_t HAL_QSPI_GetFifoThreshold(const QSPI_HandleTypeDef *hqspi);
599599
/**
600600
* @}
601601
*/

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_spi_ex.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -48,7 +48,7 @@ extern "C" {
4848
/** @addtogroup SPIEx_Exported_Functions_Group1
4949
* @{
5050
*/
51-
HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi);
51+
HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi);
5252
/**
5353
* @}
5454
*/

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_tim.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1023,8 +1023,8 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to
10231023
#define TIM_OCMODE_RETRIGERRABLE_OPM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0) /*!< Retrigerrable OPM mode 2 */
10241024
#define TIM_OCMODE_COMBINED_PWM1 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2) /*!< Combined PWM mode 1 */
10251025
#define TIM_OCMODE_COMBINED_PWM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2) /*!< Combined PWM mode 2 */
1026-
#define TIM_OCMODE_ASSYMETRIC_PWM1 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2) /*!< Asymmetric PWM mode 1 */
1027-
#define TIM_OCMODE_ASSYMETRIC_PWM2 TIM_CCMR1_OC1M /*!< Asymmetric PWM mode 2 */
1026+
#define TIM_OCMODE_ASYMMETRIC_PWM1 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2) /*!< Asymmetric PWM mode 1 */
1027+
#define TIM_OCMODE_ASYMMETRIC_PWM2 TIM_CCMR1_OC1M /*!< Asymmetric PWM mode 2 */
10281028
/**
10291029
* @}
10301030
*/
@@ -1986,8 +1986,8 @@ mode.
19861986
((__MODE__) == TIM_OCMODE_PWM2) || \
19871987
((__MODE__) == TIM_OCMODE_COMBINED_PWM1) || \
19881988
((__MODE__) == TIM_OCMODE_COMBINED_PWM2) || \
1989-
((__MODE__) == TIM_OCMODE_ASSYMETRIC_PWM1) || \
1990-
((__MODE__) == TIM_OCMODE_ASSYMETRIC_PWM2))
1989+
((__MODE__) == TIM_OCMODE_ASYMMETRIC_PWM1) || \
1990+
((__MODE__) == TIM_OCMODE_ASYMMETRIC_PWM2))
19911991

19921992
#define IS_TIM_OC_MODE(__MODE__) (((__MODE__) == TIM_OCMODE_TIMING) || \
19931993
((__MODE__) == TIM_OCMODE_ACTIVE) || \

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_rtc.h

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1093,7 +1093,7 @@ __STATIC_INLINE void LL_RTC_TIME_SetFormat(RTC_TypeDef *RTCx, uint32_t TimeForma
10931093

10941094
/**
10951095
* @brief Get time format (AM or PM notation)
1096-
* @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
1096+
* @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set
10971097
* before reading this bit
10981098
* @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar
10991099
* shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)).
@@ -1127,7 +1127,7 @@ __STATIC_INLINE void LL_RTC_TIME_SetHour(RTC_TypeDef *RTCx, uint32_t Hours)
11271127

11281128
/**
11291129
* @brief Get Hours in BCD format
1130-
* @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
1130+
* @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set
11311131
* before reading this bit
11321132
* @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar
11331133
* shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)).
@@ -1165,7 +1165,7 @@ __STATIC_INLINE void LL_RTC_TIME_SetMinute(RTC_TypeDef *RTCx, uint32_t Minutes)
11651165

11661166
/**
11671167
* @brief Get Minutes in BCD format
1168-
* @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
1168+
* @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set
11691169
* before reading this bit
11701170
* @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar
11711171
* shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)).
@@ -1203,7 +1203,7 @@ __STATIC_INLINE void LL_RTC_TIME_SetSecond(RTC_TypeDef *RTCx, uint32_t Seconds)
12031203

12041204
/**
12051205
* @brief Get Seconds in BCD format
1206-
* @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
1206+
* @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set
12071207
* before reading this bit
12081208
* @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar
12091209
* shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)).
@@ -1257,7 +1257,7 @@ __STATIC_INLINE void LL_RTC_TIME_Config(RTC_TypeDef *RTCx, uint32_t Format12_24,
12571257

12581258
/**
12591259
* @brief Get time (hour, minute and second) in BCD format
1260-
* @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
1260+
* @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set
12611261
* before reading this bit
12621262
* @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar
12631263
* shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)).
@@ -1403,7 +1403,7 @@ __STATIC_INLINE void LL_RTC_DATE_SetYear(RTC_TypeDef *RTCx, uint32_t Year)
14031403

14041404
/**
14051405
* @brief Get Year in BCD format
1406-
* @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
1406+
* @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set
14071407
* before reading this bit
14081408
* @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Year from BCD to Binary format
14091409
* @rmtoll DR YT LL_RTC_DATE_GetYear\n
@@ -1440,7 +1440,7 @@ __STATIC_INLINE void LL_RTC_DATE_SetWeekDay(RTC_TypeDef *RTCx, uint32_t WeekDay)
14401440

14411441
/**
14421442
* @brief Get Week day
1443-
* @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
1443+
* @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set
14441444
* before reading this bit
14451445
* @rmtoll DR WDU LL_RTC_DATE_GetWeekDay
14461446
* @param RTCx RTC Instance
@@ -1487,7 +1487,7 @@ __STATIC_INLINE void LL_RTC_DATE_SetMonth(RTC_TypeDef *RTCx, uint32_t Month)
14871487

14881488
/**
14891489
* @brief Get Month in BCD format
1490-
* @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
1490+
* @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set
14911491
* before reading this bit
14921492
* @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Month from BCD to Binary format
14931493
* @rmtoll DR MT LL_RTC_DATE_GetMonth\n
@@ -1532,7 +1532,7 @@ __STATIC_INLINE void LL_RTC_DATE_SetDay(RTC_TypeDef *RTCx, uint32_t Day)
15321532

15331533
/**
15341534
* @brief Get Day in BCD format
1535-
* @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
1535+
* @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set
15361536
* before reading this bit
15371537
* @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Day from BCD to Binary format
15381538
* @rmtoll DR DT LL_RTC_DATE_GetDay\n
@@ -1598,7 +1598,7 @@ __STATIC_INLINE void LL_RTC_DATE_Config(RTC_TypeDef *RTCx, uint32_t WeekDay, uin
15981598

15991599
/**
16001600
* @brief Get date (WeekDay, Day, Month and Year) in BCD format
1601-
* @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
1601+
* @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set
16021602
* before reading this bit
16031603
* @note helper macros __LL_RTC_GET_WEEKDAY, __LL_RTC_GET_YEAR, __LL_RTC_GET_MONTH,
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* and __LL_RTC_GET_DAY are available to get independently each parameter.

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