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variant: add Generic F2xx Boards (#1794)
 | 💛 | STM32F205RB<br>STM32F205RC<br>STM32F205RE<br>STM32F205RF | Generic Board | **2.4.0** | | | 💛 | STM32F205VB<br>STM32F205VC<br>STM32F205VE<br>STM32F205VF<br>STM32F205VG | Generic Board | **2.4.0** | | | 💛 | STM32F205ZC<br>STM32F205ZE<br>STM32F205ZF<br>STM32F205ZG | Generic Board | **2.4.0** | | | 💛 | STM32F207IC<br>STM32F207IE<br>STM32F207IF<br>STM32F207IG | Generic Board | **2.4.0** | | | 💛 | STM32F207VC<br>STM32F207VE<br>STM32F207VF<br>STM32F207VG | Generic Board | **2.4.0** | | | 💛 | STM32F215RE<br>STM32F215RG | Generic Board | **2.4.0** | | | 💛 | STM32F215VE<br>STM32F215VG | Generic Board | **2.4.0** | | | 💛 | STM32F215ZE<br>STM32F215ZG | Generic Board | **2.4.0** | | | 💛 | STM32F217IE<br>STM32F217IG | Generic Board | **2.4.0** | | | 💛 | STM32F217VE<br>STM32F217VG | Generic Board | **2.4.0** | |
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‎README.md

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@@ -221,7 +221,17 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| Status | Device(s) | Name | Release | Notes |
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| :----: | :-------: | ---- | :-----: | :---- |
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| :yellow_heart: | STM32F205RB<br>STM32F205RC<br>STM32F205RE<br>STM32F205RF | Generic Board | **2.4.0** | |
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| :yellow_heart: | STM32F205VB<br>STM32F205VC<br>STM32F205VE<br>STM32F205VF<br>STM32F205VG | Generic Board | **2.4.0** | |
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| :yellow_heart: | STM32F205ZC<br>STM32F205ZE<br>STM32F205ZF<br>STM32F205ZG | Generic Board | **2.4.0** | |
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| :yellow_heart: | STM32F207IC<br>STM32F207IE<br>STM32F207IF<br>STM32F207IG | Generic Board | **2.4.0** | |
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| :yellow_heart: | STM32F207VC<br>STM32F207VE<br>STM32F207VF<br>STM32F207VG | Generic Board | **2.4.0** | |
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| :green_heart: | STM32F207ZC<br>STM32F207ZE<br>STM32F207ZF<br>STM32F207ZG | Generic Board | *2.0.0* | |
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| :yellow_heart: | STM32F215RE<br>STM32F215RG | Generic Board | **2.4.0** | |
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| :yellow_heart: | STM32F215VE<br>STM32F215VG | Generic Board | **2.4.0** | |
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| :yellow_heart: | STM32F215ZE<br>STM32F215ZG | Generic Board | **2.4.0** | |
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| :yellow_heart: | STM32F217IE<br>STM32F217IG | Generic Board | **2.4.0** | |
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| :yellow_heart: | STM32F217VE<br>STM32F217VG | Generic Board | **2.4.0** | |
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| :green_heart: | STM32F217ZE<br>STM32F217ZG | Generic Board | *2.0.0* | |
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### Generic STM32F3 boards

‎boards.txt

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‎variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T/generic_clock.c

Lines changed: 31 additions & 2 deletions
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*/
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WEAK void SystemClock_Config(void)
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{
27-
/* SystemClock_Config can be generated by STM32CubeMX */
28-
#warning "SystemClock_Config() is empty. Default clock at reset is used."
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RCC_OscInitTypeDef RCC_OscInitStruct = {};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
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/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
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RCC_OscInitStruct.PLL.PLLM = 13;
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RCC_OscInitStruct.PLL.PLLN = 195;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
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RCC_OscInitStruct.PLL.PLLQ = 5;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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Error_Handler();
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}
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
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Error_Handler();
57+
}
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}
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3160
#endif /* ARDUINO_GENERIC_* */

‎variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T/ldscript.ld

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/*
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******************************************************************************
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**
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** @file : LinkerScript.ld
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**
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** @author : Auto-generated by STM32CubeIDE
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**
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** @brief : Linker script for STM32F205RBTx Device from STM32F2 series
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** 128Kbytes FLASH
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** 48Kbytes RAM
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** 16Kbytes RAM2
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**
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** Set heap size, stack size and stack location according
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** to application requirements.
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**
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** Set memory bank area and size if external memory is used
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**
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** Target : STMicroelectronics STM32
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**
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** Distribution: The file is distributed as is, without any warranty
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** of any kind.
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**
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******************************************************************************
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** @attention
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**
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** Copyright (c) 2022 STMicroelectronics.
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** All rights reserved.
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**
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** This software is licensed under terms that can be found in the LICENSE file
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** in the root directory of this software component.
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** If no LICENSE file comes with this software, it is provided AS-IS.
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**
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******************************************************************************
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*/
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36+
/* Entry Point */
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ENTRY(Reset_Handler)
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/* Highest address of the user mode stack */
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_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
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_Min_Heap_Size = 0x200 ; /* required amount of heap */
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_Min_Stack_Size = 0x400 ; /* required amount of stack */
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/* Memories definition */
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MEMORY
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{
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
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RAM2 (xrw) : ORIGIN = 0x2001C000, LENGTH = 16K
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FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
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}
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/* Sections */
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SECTIONS
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{
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/* The startup code into "FLASH" Rom type memory */
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.isr_vector :
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{
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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} >FLASH
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/* The program code and other data into "FLASH" Rom type memory */
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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KEEP (*(.init))
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KEEP (*(.fini))
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. = ALIGN(4);
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_etext = .; /* define a global symbols at end of code */
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} >FLASH
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/* Constant data into "FLASH" Rom type memory */
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.rodata :
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{
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. = ALIGN(4);
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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. = ALIGN(4);
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} >FLASH
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90+
.ARM.extab : {
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. = ALIGN(4);
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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. = ALIGN(4);
94+
} >FLASH
95+
96+
.ARM : {
97+
. = ALIGN(4);
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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. = ALIGN(4);
102+
} >FLASH
103+
104+
.preinit_array :
105+
{
106+
. = ALIGN(4);
107+
PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(4);
111+
} >FLASH
112+
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.init_array :
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{
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. = ALIGN(4);
116+
PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array*))
119+
PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(4);
121+
} >FLASH
122+
123+
.fini_array :
124+
{
125+
. = ALIGN(4);
126+
PROVIDE_HIDDEN (__fini_array_start = .);
127+
KEEP (*(SORT(.fini_array.*)))
128+
KEEP (*(.fini_array*))
129+
PROVIDE_HIDDEN (__fini_array_end = .);
130+
. = ALIGN(4);
131+
} >FLASH
132+
133+
/* Used by the startup to initialize data */
134+
_sidata = LOADADDR(.data);
135+
136+
/* Initialized data sections into "RAM" Ram type memory */
137+
.data :
138+
{
139+
. = ALIGN(4);
140+
_sdata = .; /* create a global symbol at data start */
141+
*(.data) /* .data sections */
142+
*(.data*) /* .data* sections */
143+
*(.RamFunc) /* .RamFunc sections */
144+
*(.RamFunc*) /* .RamFunc* sections */
145+
146+
. = ALIGN(4);
147+
_edata = .; /* define a global symbol at data end */
148+
149+
} >RAM AT> FLASH
150+
151+
/* Uninitialized data section into "RAM" Ram type memory */
152+
. = ALIGN(4);
153+
.bss :
154+
{
155+
/* This is used by the startup in order to initialize the .bss section */
156+
_sbss = .; /* define a global symbol at bss start */
157+
__bss_start__ = _sbss;
158+
*(.bss)
159+
*(.bss*)
160+
*(COMMON)
161+
162+
. = ALIGN(4);
163+
_ebss = .; /* define a global symbol at bss end */
164+
__bss_end__ = _ebss;
165+
} >RAM
166+
167+
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
168+
._user_heap_stack :
169+
{
170+
. = ALIGN(8);
171+
PROVIDE ( end = . );
172+
PROVIDE ( _end = . );
173+
. = . + _Min_Heap_Size;
174+
. = . + _Min_Stack_Size;
175+
. = ALIGN(8);
176+
} >RAM
177+
178+
/* Remove information from the compiler libraries */
179+
/DISCARD/ :
180+
{
181+
libc.a ( * )
182+
libm.a ( * )
183+
libgcc.a ( * )
184+
}
185+
186+
.ARM.attributes 0 : { *(.ARM.attributes) }
187+
}

‎variants/STM32F2xx/F205V(B-C-E-F-G)T_F215V(E-G)T/generic_clock.c

Lines changed: 31 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -23,8 +23,37 @@
2323
*/
2424
WEAK void SystemClock_Config(void)
2525
{
26-
/* SystemClock_Config can be generated by STM32CubeMX */
27-
#warning "SystemClock_Config() is empty. Default clock at reset is used."
26+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
27+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
28+
29+
/** Initializes the RCC Oscillators according to the specified parameters
30+
* in the RCC_OscInitTypeDef structure.
31+
*/
32+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
33+
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
34+
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
35+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
36+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
37+
RCC_OscInitStruct.PLL.PLLM = 13;
38+
RCC_OscInitStruct.PLL.PLLN = 195;
39+
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
40+
RCC_OscInitStruct.PLL.PLLQ = 5;
41+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
42+
Error_Handler();
43+
}
44+
45+
/** Initializes the CPU, AHB and APB buses clocks
46+
*/
47+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
48+
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
49+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
50+
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
51+
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
52+
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
53+
54+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
55+
Error_Handler();
56+
}
2857
}
2958

3059
#endif /* ARDUINO_GENERIC_* */

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