Skip to content

Commit f65dc12

Browse files
fpistmfpistm
committed
system(C0) update STM32C0xx HAL Drivers to v1.4.0
Included in STM32CubeC0 FW v1.4.0 Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
1 parent 2801e70 commit f65dc12

File tree

10 files changed

+211
-120
lines changed

10 files changed

+211
-120
lines changed

‎system/Drivers/STM32C0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h

Lines changed: 12 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -472,9 +472,9 @@ extern "C" {
472472
#define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE
473473
#define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD
474474
#define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD
475-
#if !defined(STM32F2) && !defined(STM32F4) && !defined(STM32F7) && !defined(STM32H7)
475+
#if !defined(STM32F2) && !defined(STM32F4) && !defined(STM32F7) && !defined(STM32H7) && !defined(STM32H5)
476476
#define PAGESIZE FLASH_PAGE_SIZE
477-
#endif /* STM32F2 && STM32F4 && STM32F7 && STM32H7 */
477+
#endif /* STM32F2 && STM32F4 && STM32F7 && STM32H7 && STM32H5 */
478478
#define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE
479479
#define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD
480480
#define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD
@@ -538,6 +538,10 @@ extern "C" {
538538
#define FLASH_FLAG_WDW FLASH_FLAG_WBNE
539539
#define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL
540540
#endif /* STM32H7 */
541+
#if defined(STM32H7RS)
542+
#define FLASH_OPTKEY1 FLASH_OPT_KEY1
543+
#define FLASH_OPTKEY2 FLASH_OPT_KEY2
544+
#endif /* STM32H7RS */
541545
#if defined(STM32U5)
542546
#define OB_USER_nRST_STOP OB_USER_NRST_STOP
543547
#define OB_USER_nRST_STDBY OB_USER_NRST_STDBY
@@ -1299,22 +1303,22 @@ extern "C" {
12991303
#define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL
13001304
#endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */
13011305

1302-
#if defined(STM32F7)
1306+
#if defined(STM32F7) || defined(STM32WB)
13031307
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK
13041308
#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_IT_ENABLE_BITS_MASK
1305-
#endif /* STM32F7 */
1309+
#endif /* STM32F7 || STM32WB */
13061310

13071311
#if defined(STM32H7)
13081312
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_X
13091313
#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_X_INTERRUPT
13101314
#endif /* STM32H7 */
13111315

1312-
#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0)
1316+
#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0) || defined(STM32WB)
13131317
#define RTC_TAMPER1_INTERRUPT RTC_IT_TAMP1
13141318
#define RTC_TAMPER2_INTERRUPT RTC_IT_TAMP2
13151319
#define RTC_TAMPER3_INTERRUPT RTC_IT_TAMP3
13161320
#define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMP
1317-
#endif /* STM32F7 || STM32H7 || STM32L0 */
1321+
#endif /* STM32F7 || STM32H7 || STM32L0 || STM32WB */
13181322

13191323
/**
13201324
* @}
@@ -3946,8 +3950,8 @@ extern "C" {
39463950
*/
39473951
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \
39483952
defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \
3949-
defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32N6) || \
3950-
defined (STM32H7RS) || defined (STM32U0) || defined (STM32U3)
3953+
defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32N6) || defined (STM32H7RS) || \
3954+
defined (STM32U0) || defined (STM32U3)
39513955
#else
39523956
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
39533957
#endif

‎system/Drivers/STM32C0xx_HAL_Driver/Inc/stm32c0xx_ll_usart.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -56,6 +56,10 @@ static const uint32_t USART_PRESCALER_TAB[] =
5656
32UL,
5757
64UL,
5858
128UL,
59+
256UL,
60+
256UL,
61+
256UL,
62+
256UL,
5963
256UL
6064
};
6165
/**

‎system/Drivers/STM32C0xx_HAL_Driver/Release_Notes.html

Lines changed: 75 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -69,19 +69,75 @@ <h1 id="purpose">Purpose</h1>
6969
<section id="update-history" class="col-sm-12 col-lg-8">
7070
<h1>Update History</h1>
7171
<div class="collapse">
72-
<input type="checkbox" id="collapse-section5" checked aria-hidden="true">
73-
<label for="collapse-section5" checked aria-hidden="true">V1.3.0 /
74-
30-October-2024</label>
72+
<input type="checkbox" id="collapse-section6" checked aria-hidden="true">
73+
<label for="collapse-section6" checked aria-hidden="true">V1.4.0 /
74+
05-February-2025</label>
7575
<div>
7676
<h2 id="main-changes">Main Changes</h2>
7777
<ul>
78+
<li>Maintenance Release of STM32CubeC0 HAL/LL Drivers supporting
79+
<strong>STM32C011xx/C031xx/C051xx/C071xx/C091xx/C092xx</strong>
80+
devices</li>
81+
<li>General updates to fix known defects and implementation
82+
enhancements</li>
83+
</ul>
84+
<h3 id="hal-drivers-updates"><strong>HAL Drivers updates</strong></h3>
85+
<ul>
86+
<li>HAL ADC driver:
87+
<ul>
88+
<li>Change ADC calibration procedure</li>
89+
</ul></li>
90+
<li>HAL RCC driver:
91+
<ul>
92+
<li>Add notes to highlight HSI48 clock division factor update limitation
93+
when HSI48 oscillator is selected as system clock</li>
94+
</ul></li>
95+
<li>HAL TIM driver:
96+
<ul>
97+
<li>Fix update flag (UIF) clearing in TIM_Base_SetConfig</li>
98+
</ul></li>
99+
<li>HAL UART driver:
100+
<ul>
101+
<li>Correct references to HAL_UARTEx_WakeupCallback and to
102+
HAL_UART_WAKEUP_CB_ID define, according to serie capabilities</li>
103+
<li>Provide accurate position in RxEventCallback when ReceptionToIdle
104+
mode is used with DMA, when UART and DMA interrupts process is
105+
delayed</li>
106+
</ul></li>
107+
</ul>
108+
<h3 id="ll-drivers-updates"><strong>LL Drivers updates</strong></h3>
109+
<ul>
110+
<li>LL USART driver:
111+
<ul>
112+
<li>Solve Coverity out-of-bound memory access warning in use of
113+
USART_PRESCALER_TAB array</li>
114+
</ul></li>
115+
</ul>
116+
<p>Note: HAL/LL Backward compatibility ensured by legacy defines.</p>
117+
<h2 id="known-limitations">Known Limitations</h2>
118+
<ul>
119+
<li>None</li>
120+
</ul>
121+
<h2 id="backward-compatibility">Backward Compatibility</h2>
122+
<ul>
123+
<li>Not applicable</li>
124+
</ul>
125+
</div>
126+
</div>
127+
<div class="collapse">
128+
<input type="checkbox" id="collapse-section5" aria-hidden="true">
129+
<label for="collapse-section5" aria-hidden="true">V1.3.0 /
130+
30-October-2024</label>
131+
<div>
132+
<h2 id="main-changes-1">Main Changes</h2>
133+
<ul>
78134
<li>Official Release of STM32CubeC0 Firmware package supporting
79135
<strong>STM32C051xx</strong> and <strong>STM32C091/92xx</strong>
80136
devices</li>
81137
<li>General updates to fix known defects and implementation
82138
enhancements</li>
83139
</ul>
84-
<h3 id="hal-drivers-updates"><strong>HAL Drivers updates</strong></h3>
140+
<h3 id="hal-drivers-updates-1"><strong>HAL Drivers updates</strong></h3>
85141
<ul>
86142
<li>HAL generic driver:
87143
<ul>
@@ -125,7 +181,7 @@ <h3 id="hal-drivers-updates"><strong>HAL Drivers updates</strong></h3>
125181
polling mode</li>
126182
</ul></li>
127183
</ul>
128-
<h3 id="ll-drivers-updates"><strong>LL Drivers updates</strong></h3>
184+
<h3 id="ll-drivers-updates-1"><strong>LL Drivers updates</strong></h3>
129185
<ul>
130186
<li>LL ADC driver:
131187
<ul>
@@ -141,11 +197,11 @@ <h3 id="ll-drivers-updates"><strong>LL Drivers updates</strong></h3>
141197
</ul></li>
142198
</ul>
143199
<p>Note: HAL/LL Backward compatibility ensured by legacy defines.</p>
144-
<h2 id="known-limitations">Known Limitations</h2>
200+
<h2 id="known-limitations-1">Known Limitations</h2>
145201
<ul>
146202
<li>None</li>
147203
</ul>
148-
<h2 id="backward-compatibility">Backward Compatibility</h2>
204+
<h2 id="backward-compatibility-1">Backward Compatibility</h2>
149205
<ul>
150206
<li>Not applicable</li>
151207
</ul>
@@ -156,14 +212,14 @@ <h2 id="backward-compatibility">Backward Compatibility</h2>
156212
<label for="collapse-section4" aria-hidden="true">V1.2.0 /
157213
05-June-2024</label>
158214
<div>
159-
<h2 id="main-changes-1">Main Changes</h2>
215+
<h2 id="main-changes-2">Main Changes</h2>
160216
<ul>
161217
<li>Official Release of STM32CubeC0 Firmware package supporting
162218
<strong>STM32C071xx</strong> devices</li>
163219
<li>General updates to fix known defects and implementation
164220
enhancements</li>
165221
</ul>
166-
<h3 id="hal-drivers-updates-1"><strong>HAL Drivers updates</strong></h3>
222+
<h3 id="hal-drivers-updates-2"><strong>HAL Drivers updates</strong></h3>
167223
<ul>
168224
<li>HAL generic driver:
169225
<ul>
@@ -282,7 +338,7 @@ <h3 id="hal-drivers-updates-1"><strong>HAL Drivers updates</strong></h3>
282338
FIFO reception in Interrupt mode</li>
283339
</ul></li>
284340
</ul>
285-
<h3 id="ll-drivers-updates-1"><strong>LL Drivers updates</strong></h3>
341+
<h3 id="ll-drivers-updates-2"><strong>LL Drivers updates</strong></h3>
286342
<ul>
287343
<li>LL ADC driver:
288344
<ul>
@@ -336,11 +392,11 @@ <h3 id="ll-drivers-updates-1"><strong>LL Drivers updates</strong></h3>
336392
</ul></li>
337393
</ul>
338394
<p>Note: HAL/LL Backward compatibility ensured by legacy defines.</p>
339-
<h2 id="known-limitations-1">Known Limitations</h2>
395+
<h2 id="known-limitations-2">Known Limitations</h2>
340396
<ul>
341397
<li>None</li>
342398
</ul>
343-
<h2 id="backward-compatibility-1">Backward Compatibility</h2>
399+
<h2 id="backward-compatibility-2">Backward Compatibility</h2>
344400
<ul>
345401
<li>Not applicable</li>
346402
</ul>
@@ -351,7 +407,7 @@ <h2 id="backward-compatibility-1">Backward Compatibility</h2>
351407
<label for="collapse-section3" aria-hidden="true">V1.1.0 /
352408
07-June-2023</label>
353409
<div>
354-
<h2 id="main-changes-2">Main Changes</h2>
410+
<h2 id="main-changes-3">Main Changes</h2>
355411
<ul>
356412
<li>Maintenance Release of STM32CubeC0 Firmware Package</li>
357413
</ul>
@@ -422,9 +478,9 @@ <h2 id="main-changes-2">Main Changes</h2>
422478
setting.</li>
423479
</ul></li>
424480
</ul>
425-
<h2 id="known-limitations-2">Known Limitations</h2>
481+
<h2 id="known-limitations-3">Known Limitations</h2>
426482
<p>N/A</p>
427-
<h2 id="backward-compatibility-2">Backward Compatibility</h2>
483+
<h2 id="backward-compatibility-3">Backward Compatibility</h2>
428484
<ul>
429485
<li>HAL_SYSCFG_GetPinBinding() and LL_SYSCFG_GetConfigPinMux() are
430486
updated.</li>
@@ -436,7 +492,7 @@ <h2 id="backward-compatibility-2">Backward Compatibility</h2>
436492
<label for="collapse-section2" checked aria-hidden="true">V1.0.1 /
437493
12-January-2023</label>
438494
<div>
439-
<h2 id="main-changes-3">Main Changes</h2>
495+
<h2 id="main-changes-4">Main Changes</h2>
440496
<ul>
441497
<li><p>Patch Release of STM32CubeC0 Firmware Package</p></li>
442498
<li><p>Update ADC HAL driver with proper internal sensor calibration
@@ -447,7 +503,7 @@ <h2 id="main-changes-3">Main Changes</h2>
447503
</ul></li>
448504
<li><p>Update RCC LL driver by adding missing AHB Prescaler.</p></li>
449505
</ul>
450-
<h2 id="known-limitations-3">Known Limitations</h2>
506+
<h2 id="known-limitations-4">Known Limitations</h2>
451507
<p>N/A</p>
452508
</div>
453509
</div>
@@ -456,10 +512,10 @@ <h2 id="known-limitations-3">Known Limitations</h2>
456512
<label for="collapse-section1" checked aria-hidden="true">V1.0.0 /
457513
09-February-2022</label>
458514
<div>
459-
<h2 id="main-changes-4">Main Changes</h2>
515+
<h2 id="main-changes-5">Main Changes</h2>
460516
<p>First official release of HAL and LL drivers for STM32C031xx /
461517
STM32C011xx devices</p>
462-
<h2 id="known-limitations-4">Known Limitations</h2>
518+
<h2 id="known-limitations-5">Known Limitations</h2>
463519
<p>N/A</p>
464520
</div>
465521
</div>

‎system/Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -56,7 +56,7 @@
5656
* @brief STM32C0xx HAL Driver version number
5757
*/
5858
#define __STM32C0xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
59-
#define __STM32C0xx_HAL_VERSION_SUB1 (0x03U) /*!< [23:16] sub1 version */
59+
#define __STM32C0xx_HAL_VERSION_SUB1 (0x04U) /*!< [23:16] sub1 version */
6060
#define __STM32C0xx_HAL_VERSION_SUB2 (0x00U) /*!< [15:8] sub2 version */
6161
#define __STM32C0xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
6262
#define __STM32C0xx_HAL_VERSION ((__STM32C0xx_HAL_VERSION_MAIN << 24U)\

‎system/Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_adc_ex.c

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -166,11 +166,13 @@ HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef *hadc)
166166
return HAL_ERROR;
167167
}
168168
}
169-
170-
calibration_factor_accumulated += LL_ADC_GetCalibrationFactor(hadc->Instance);
169+
/* Read the calibration factor and increment by one */
170+
calibration_factor_accumulated += (LL_ADC_GetCalibrationFactor(hadc->Instance) + 1UL);
171171
}
172-
/* Compute average */
172+
/* Compute average (rounded up to the nearest integer) */
173+
calibration_factor_accumulated += (calibration_index / 2UL);
173174
calibration_factor_accumulated /= calibration_index;
175+
174176
/* Apply calibration factor (requires ADC enable and disable process) */
175177
LL_ADC_Enable(hadc->Instance);
176178

‎system/Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_rcc.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -164,6 +164,9 @@
164164
165165
(+) The maximum frequency of the SYSCLK, HCLK, PCLK is 48 MHz.
166166
167+
(+) When the HSI48 oscillator is selected as the System clock (SYSCLK), the number of CPU wait states must
168+
be adjusted before any eventual update on the HSI48 clock division factor.
169+
167170
@endverbatim
168171
169172
(++) Table 1. HCLK clock frequency.
@@ -282,6 +285,9 @@ HAL_StatusTypeDef HAL_RCC_DeInit(void)
282285
* @note Transition LSE Bypass to LSE On and LSE On to LSE Bypass are not
283286
* supported by this function. User should request a transition to LSE Off
284287
* first and then to LSE On or LSE Bypass.
288+
* @note When the HSI48 oscillator is selected as the System clock (SYSCLK), the user
289+
must adjust the number of CPU wait states in their application (SystemClock_Config() API)
290+
before calling the HAL_RCC_OscConfig() API to update the HSI48 clock division factor.
285291
* @retval HAL status
286292
*/
287293
HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *RCC_OscInitStruct)

‎system/Drivers/STM32C0xx_HAL_Driver/Src/stm32c0xx_hal_tim.c

Lines changed: 5 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -6956,8 +6956,6 @@ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure
69566956
/* Set the auto-reload preload */
69576957
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
69586958

6959-
TIMx->CR1 = tmpcr1;
6960-
69616959
/* Set the Autoreload value */
69626960
TIMx->ARR = (uint32_t)Structure->Period ;
69636961

@@ -6970,16 +6968,15 @@ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure
69706968
TIMx->RCR = Structure->RepetitionCounter;
69716969
}
69726970

6971+
/* Disable Update Event (UEV) with Update Generation (UG)
6972+
by changing Update Request Source (URS) to avoid Update flag (UIF) */
6973+
SET_BIT(TIMx->CR1, TIM_CR1_URS);
6974+
69736975
/* Generate an update event to reload the Prescaler
69746976
and the repetition counter (only for advanced timer) value immediately */
69756977
TIMx->EGR = TIM_EGR_UG;
69766978

6977-
/* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
6978-
if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
6979-
{
6980-
/* Clear the update flag */
6981-
CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
6982-
}
6979+
TIMx->CR1 = tmpcr1;
69836980
}
69846981

69856982
/**

0 commit comments

Comments
 (0)
pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy