/${ELFTGT_WE}.hex")
endfunction()
function(gv2svg GVFILE ENGINE)
diff --git a/cmake/scripts/update_boarddb.py b/cmake/scripts/update_boarddb.py
index 4ef63711de..e0dd6fa469 100644
--- a/cmake/scripts/update_boarddb.py
+++ b/cmake/scripts/update_boarddb.py
@@ -55,6 +55,8 @@ def platformtxt_filter(key):
if key[0] == "build" and key[1] != "info":
return False
+ if key[0] == "vid" or key[0] == "pid":
+ return False
return True
@@ -104,7 +106,12 @@ def regenerate_template(config, infile, outfile):
shargs = parser.parse_args()
platformtxt_cfg = parse_file(shargs.platform, reject=platformtxt_filter)
- platformtxt_cfg = {"build": platformtxt_cfg["build"]} # whitelist what we need
+ # whitelist what we need
+ platformtxt_cfg = {
+ "build": platformtxt_cfg["build"],
+ "vid": platformtxt_cfg["vid"],
+ "pid": platformtxt_cfg["pid"],
+ }
boardstxt_cfg = parse_file(shargs.boards, reject=boardstxt_filter)
del boardstxt_cfg["menu"] # blacklist what we don't need
diff --git a/libraries/EEPROM/library.properties b/libraries/EEPROM/library.properties
index 2d8a7685ad..a3f7698ee4 100644
--- a/libraries/EEPROM/library.properties
+++ b/libraries/EEPROM/library.properties
@@ -5,5 +5,5 @@ maintainer=stm32duino
sentence=Enables reading and writing to the permanent board storage.
paragraph=This library allows to read and write data in a memory type, the EEPROM, that keeps its content also when the board is powered off. The amount of EEPROM available depends on the microcontroller type.
category=Data Storage
-url=http://www.arduino.cc/en/Reference/EEPROM
+url=https://github.com/stm32duino/Arduino_Core_STM32/tree/main/libraries/EEPROM
architectures=stm32
diff --git a/libraries/Keyboard/library.properties b/libraries/Keyboard/library.properties
index 1533d990c3..a9460f7eed 100644
--- a/libraries/Keyboard/library.properties
+++ b/libraries/Keyboard/library.properties
@@ -5,5 +5,5 @@ maintainer=stm32duino
sentence=Allows a STM32 based board with USB capabilities to act as a Keyboard.
paragraph=This library plugs on the HID implementation provided by the core.
category=Device Control
-url=http://www.arduino.cc/en/Reference/Keyboard
+url=https://github.com/stm32duino/Arduino_Core_STM32/tree/main/libraries/Keyboard
architectures=stm32
diff --git a/libraries/Mouse/library.properties b/libraries/Mouse/library.properties
index eff500cead..da59d05041 100644
--- a/libraries/Mouse/library.properties
+++ b/libraries/Mouse/library.properties
@@ -5,5 +5,5 @@ maintainer=stm32duino
sentence=Allows a STM32 based board with USB capabilities to act as a Mouse.
paragraph=This library plugs on the HID implementation provided by the core.
category=Device Control
-url=http://www.arduino.cc/en/Reference/Mouse
+url=https://github.com/stm32duino/Arduino_Core_STM32/tree/main/libraries/Mouse
architectures=stm32
diff --git a/libraries/SPI/library.properties b/libraries/SPI/library.properties
index a4bdcbd0e0..d6c92ff136 100644
--- a/libraries/SPI/library.properties
+++ b/libraries/SPI/library.properties
@@ -5,5 +5,5 @@ maintainer=stm32duino
sentence=Enables the communication with devices that use the Serial Peripheral Interface (SPI) Bus.
paragraph=This library is based on the official Arduino SPI library and adapted to STM32 boards.
category=Communication
-url=http://www.arduino.cc/en/Reference/SPI
+url=https://github.com/stm32duino/Arduino_Core_STM32/tree/main/libraries/SPI
architectures=stm32
diff --git a/libraries/Servo/library.properties b/libraries/Servo/library.properties
index 1d3cd276d0..a27f44e04b 100644
--- a/libraries/Servo/library.properties
+++ b/libraries/Servo/library.properties
@@ -5,5 +5,5 @@ maintainer=stm32duino
sentence=Allows Arduino/Genuino and STM32 based boards to control a variety of servo motors.
paragraph=This library can control a great number of servos.
It makes careful use of timers: the library can control 12 servos using only 1 timer.
On the Arduino Due you can control up to 60 servos.
category=Device Control
-url=http://www.arduino.cc/en/Reference/Servo
+url=https://github.com/stm32duino/Arduino_Core_STM32/tree/main/libraries/Servo
architectures=avr,sam,samd,nrf52,stm32f4,stm32
diff --git a/libraries/SoftwareSerial/library.properties b/libraries/SoftwareSerial/library.properties
index 4bf36a6600..8045030cd5 100644
--- a/libraries/SoftwareSerial/library.properties
+++ b/libraries/SoftwareSerial/library.properties
@@ -5,6 +5,6 @@ maintainer=stm32duino
sentence=Enables serial communication on any digital pin.
paragraph=The SoftwareSerial library has been developed to allow serial communication on any digital pin of the board, using software to replicate the functionality of the hardware UART. It is possible to have multiple software serial ports.
category=Communication
-url=http://www.arduino.cc/en/Reference/SoftwareSerial
+url=https://github.com/stm32duino/Arduino_Core_STM32/tree/main/libraries/SoftwareSerial
architectures=stm32
diff --git a/libraries/SrcWrapper/inc/stm32_def.h b/libraries/SrcWrapper/inc/stm32_def.h
index 00c4c3762c..a307d748aa 100644
--- a/libraries/SrcWrapper/inc/stm32_def.h
+++ b/libraries/SrcWrapper/inc/stm32_def.h
@@ -7,7 +7,7 @@
*/
#define STM32_CORE_VERSION_MAJOR (0x02U) /*!< [31:24] major version */
#define STM32_CORE_VERSION_MINOR (0x08U) /*!< [23:16] minor version */
-#define STM32_CORE_VERSION_PATCH (0x00U) /*!< [15:8] patch version */
+#define STM32_CORE_VERSION_PATCH (0x01U) /*!< [15:8] patch version */
/*
* Extra label for development:
* 0: official release
diff --git a/libraries/USBDevice/src/usbd_ep_conf.c b/libraries/USBDevice/src/usbd_ep_conf.c
index 455afe5ecd..d872acca5f 100644
--- a/libraries/USBDevice/src/usbd_ep_conf.c
+++ b/libraries/USBDevice/src/usbd_ep_conf.c
@@ -37,7 +37,11 @@ const ep_desc_t ep_def[] = {
#else
{0x00, PMA_EP0_OUT_ADDR, PCD_SNG_BUF},
{0x80, PMA_EP0_IN_ADDR, PCD_SNG_BUF},
+#ifndef USBD_CDC_USE_SINGLE_BUFFER
{CDC_OUT_EP, PMA_CDC_OUT_ADDR, PCD_DBL_BUF},
+#else
+ {CDC_OUT_EP, PMA_CDC_OUT_ADDR, PCD_SNG_BUF},
+#endif
{CDC_IN_EP, PMA_CDC_IN_ADDR, PCD_SNG_BUF},
{CDC_CMD_EP, PMA_CDC_CMD_ADDR, PCD_SNG_BUF}
#endif
diff --git a/libraries/Wire/library.properties b/libraries/Wire/library.properties
index 2419e4dcc6..3816da1a85 100644
--- a/libraries/Wire/library.properties
+++ b/libraries/Wire/library.properties
@@ -5,5 +5,5 @@ maintainer=stm32duino
sentence=Allows the communication between devices or sensors connected via Two Wire (I2C) Interface Bus.
paragraph=
category=Communication
-url=http://www.arduino.cc/en/Reference/Wire
+url=https://github.com/stm32duino/Arduino_Core_STM32/tree/main/libraries/Wire
architectures=stm32
diff --git a/libraries/Wire/src/Wire.cpp b/libraries/Wire/src/Wire.cpp
index 055bdec262..c25a915a8b 100644
--- a/libraries/Wire/src/Wire.cpp
+++ b/libraries/Wire/src/Wire.cpp
@@ -38,6 +38,11 @@ TwoWire::TwoWire()
memset((void *)&_i2c, 0, sizeof(_i2c));
_i2c.sda = digitalPinToPinName(SDA);
_i2c.scl = digitalPinToPinName(SCL);
+
+ txBuffer = nullptr;
+ txBufferAllocated = 0;
+ rxBuffer = nullptr;
+ rxBufferAllocated = 0;
}
TwoWire::TwoWire(uint32_t sda, uint32_t scl)
@@ -45,6 +50,11 @@ TwoWire::TwoWire(uint32_t sda, uint32_t scl)
memset((void *)&_i2c, 0, sizeof(_i2c));
_i2c.sda = digitalPinToPinName(sda);
_i2c.scl = digitalPinToPinName(scl);
+
+ txBuffer = nullptr;
+ txBufferAllocated = 0;
+ rxBuffer = nullptr;
+ rxBufferAllocated = 0;
}
/**
@@ -74,14 +84,10 @@ void TwoWire::begin(uint8_t address, bool generalCall, bool NoStretchMode)
{
rxBufferIndex = 0;
rxBufferLength = 0;
- rxBuffer = nullptr;
- rxBufferAllocated = 0;
resetRxBuffer();
txDataSize = 0;
txAddress = 0;
- txBuffer = nullptr;
- txBufferAllocated = 0;
resetTxBuffer();
_i2c.__this = (void *)this;
diff --git a/platform.txt b/platform.txt
index 3b60a337cf..f171d5b19a 100644
--- a/platform.txt
+++ b/platform.txt
@@ -5,7 +5,7 @@
# https://arduino.github.io/arduino-cli/latest/platform-specification/
name=STM32 boards groups (Board to be selected from Tools submenu 'Board part number')
-version=2.8.0
+version=2.8.1
# Define variables used multiple times in platform file
@@ -28,9 +28,10 @@ hal_dir={build.system.path}/Drivers/{build.series}_HAL_Driver
cmsis_dir={runtime.tools.CMSIS-5.9.0.path}/CMSIS
cmsis_dev_dir={build.system.path}/Drivers/CMSIS/Device/ST/{build.series}
usbd_core_dir={build.system.path}/Middlewares/ST/STM32_USB_Device_Library/Core
-SrcWrapper_include_dir={runtime.platform.path}/libraries/SrcWrapper/inc
-VirtIO_include_dir={runtime.platform.path}/libraries/VirtIO/inc
-USBDevice_include_dir={runtime.platform.path}/libraries/USBDevice/inc
+builtin_library_dir={build.core.path}/../../libraries
+SrcWrapper_include_dir={builtin_library_dir}/SrcWrapper/inc
+VirtIO_include_dir={builtin_library_dir}/VirtIO/inc
+USBDevice_include_dir={builtin_library_dir}/USBDevice/inc
# STM compile variables
@@ -108,10 +109,14 @@ build.usb_flags=-DUSBCON {build.usb_speed} -DUSBD_VID={build.vid} -DUSBD_PID={bu
# Specify defaults for vid/pid
# Boards should specify either both, or neither of these.
+vid.0=0x0483
+pid.0=0x5740
build.vid={vid.0}
build.pid={pid.0}
-upload.vid=0x0483
-upload.pid=0xdf11
+upload.vid.0=0x0483
+upload.pid.0=0xdf11
+upload.vid={upload.vid.0}
+upload.pid={upload.pid.0}
# To customize the USB manufacturer or product string, must add defines
# for them, e.g.:
@@ -245,5 +250,5 @@ debug.server=openocd
debug.server.openocd.path={openocd_dir}/bin/openocd
debug.server.openocd.scripts_dir={openocd_dir}/openocd/scripts
# Common config
-debug.server.openocd.scripts.0=interface/{programmer.protocol}.cfg
-debug.server.openocd.scripts.1={programmer.transport_script}
+debug.server.openocd.scripts.0=interface/stlink.cfg
+debug.server.openocd.scripts.1={runtime.platform.path}/debugger/select_hla.cfg
diff --git a/programmers.txt b/programmers.txt
index 405cf37cdd..e69de29bb2 100644
--- a/programmers.txt
+++ b/programmers.txt
@@ -1,9 +0,0 @@
-stlink.name=STMicroelectronics ST-LINK
-stlink.communication=USB
-stlink.protocol=
-stlink.program.protocol=
-stlink.program.tool=openocd
-stlink.program.tool.default=openocd
-stlink.program.extra_params=
-stlink.programmer.protocol=stlink
-stlink.programmer.transport_script={runtime.platform.path}/debugger/select_hla.cfg
diff --git a/variants/STM32F0xx/openocd.cfg b/variants/STM32F0xx/openocd.cfg
deleted file mode 100644
index d826582f1e..0000000000
--- a/variants/STM32F0xx/openocd.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Copyright (c) 2023, STMicroelectronics
-# All rights reserved.
-#
-# This software component is licensed by ST under BSD 3-Clause license,
-# the "License"; You may not use this file except in compliance with the
-# License. You may obtain a copy of the License at:
-# opensource.org/licenses/BSD-3-Clause
-#
-
-source [find interface/stlink.cfg]
-
-transport select hla_swd
-
-source [find target/stm32f0x.cfg]
-
-reset_config srst_only
diff --git a/variants/STM32F1xx/openocd.cfg b/variants/STM32F1xx/openocd.cfg
deleted file mode 100644
index 5687d45953..0000000000
--- a/variants/STM32F1xx/openocd.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Copyright (c) 2023, STMicroelectronics
-# All rights reserved.
-#
-# This software component is licensed by ST under BSD 3-Clause license,
-# the "License"; You may not use this file except in compliance with the
-# License. You may obtain a copy of the License at:
-# opensource.org/licenses/BSD-3-Clause
-#
-
-source [find interface/stlink.cfg]
-
-transport select hla_swd
-
-source [find target/stm32f1x.cfg]
-
-reset_config srst_only
diff --git a/variants/STM32F2xx/openocd.cfg b/variants/STM32F2xx/openocd.cfg
deleted file mode 100644
index daa416cb2a..0000000000
--- a/variants/STM32F2xx/openocd.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Copyright (c) 2023, STMicroelectronics
-# All rights reserved.
-#
-# This software component is licensed by ST under BSD 3-Clause license,
-# the "License"; You may not use this file except in compliance with the
-# License. You may obtain a copy of the License at:
-# opensource.org/licenses/BSD-3-Clause
-#
-
-source [find interface/stlink.cfg]
-
-transport select hla_swd
-
-source [find target/stm32f2x.cfg]
-
-reset_config srst_only
diff --git a/variants/STM32F3xx/openocd.cfg b/variants/STM32F3xx/openocd.cfg
deleted file mode 100644
index 95e3d0eab0..0000000000
--- a/variants/STM32F3xx/openocd.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Copyright (c) 2023, STMicroelectronics
-# All rights reserved.
-#
-# This software component is licensed by ST under BSD 3-Clause license,
-# the "License"; You may not use this file except in compliance with the
-# License. You may obtain a copy of the License at:
-# opensource.org/licenses/BSD-3-Clause
-#
-
-source [find interface/stlink.cfg]
-
-transport select hla_swd
-
-source [find target/stm32f3x.cfg]
-
-reset_config srst_only
diff --git a/variants/STM32F4xx/openocd.cfg b/variants/STM32F4xx/openocd.cfg
deleted file mode 100644
index f4754d9143..0000000000
--- a/variants/STM32F4xx/openocd.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Copyright (c) 2023, STMicroelectronics
-# All rights reserved.
-#
-# This software component is licensed by ST under BSD 3-Clause license,
-# the "License"; You may not use this file except in compliance with the
-# License. You may obtain a copy of the License at:
-# opensource.org/licenses/BSD-3-Clause
-#
-
-source [find interface/stlink.cfg]
-
-transport select hla_swd
-
-source [find target/stm32f4x.cfg]
-
-reset_config srst_only
diff --git a/variants/STM32F7xx/openocd.cfg b/variants/STM32F7xx/openocd.cfg
deleted file mode 100644
index 9f1f9665e1..0000000000
--- a/variants/STM32F7xx/openocd.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Copyright (c) 2023, STMicroelectronics
-# All rights reserved.
-#
-# This software component is licensed by ST under BSD 3-Clause license,
-# the "License"; You may not use this file except in compliance with the
-# License. You may obtain a copy of the License at:
-# opensource.org/licenses/BSD-3-Clause
-#
-
-source [find interface/stlink.cfg]
-
-transport select hla_swd
-
-source [find target/stm32f7x.cfg]
-
-reset_config srst_only
diff --git a/variants/STM32G0xx/openocd.cfg b/variants/STM32G0xx/openocd.cfg
deleted file mode 100644
index fbb7eb4ad6..0000000000
--- a/variants/STM32G0xx/openocd.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Copyright (c) 2023, STMicroelectronics
-# All rights reserved.
-#
-# This software component is licensed by ST under BSD 3-Clause license,
-# the "License"; You may not use this file except in compliance with the
-# License. You may obtain a copy of the License at:
-# opensource.org/licenses/BSD-3-Clause
-#
-
-source [find interface/stlink.cfg]
-
-transport select hla_swd
-
-source [find target/stm32g0x.cfg]
-
-reset_config srst_only
diff --git a/variants/STM32G4xx/openocd.cfg b/variants/STM32G4xx/openocd.cfg
deleted file mode 100644
index 8ff69bca04..0000000000
--- a/variants/STM32G4xx/openocd.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Copyright (c) 2023, STMicroelectronics
-# All rights reserved.
-#
-# This software component is licensed by ST under BSD 3-Clause license,
-# the "License"; You may not use this file except in compliance with the
-# License. You may obtain a copy of the License at:
-# opensource.org/licenses/BSD-3-Clause
-#
-
-source [find interface/stlink.cfg]
-
-transport select hla_swd
-
-source [find target/stm32g4x.cfg]
-
-reset_config srst_only
diff --git a/variants/STM32H5xx/H503KBU/generic_clock.c b/variants/STM32H5xx/H503KBU/generic_clock.c
index fa6451b904..8fdcb187f2 100644
--- a/variants/STM32H5xx/H503KBU/generic_clock.c
+++ b/variants/STM32H5xx/H503KBU/generic_clock.c
@@ -20,8 +20,50 @@
*/
WEAK void SystemClock_Config(void)
{
- /* SystemClock_Config can be generated by STM32CubeMX */
-#warning "SystemClock_Config() is empty. Default clock at reset is used."
+ RCC_OscInitTypeDef RCC_OscInitStruct = {};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+
+ /** Configure the main internal regulator output voltage
+ */
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
+
+ while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_CSI;
+ RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+ RCC_OscInitStruct.CSIState = RCC_CSI_ON;
+ RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI;
+ RCC_OscInitStruct.PLL.PLLM = 1;
+ RCC_OscInitStruct.PLL.PLLN = 125;
+ RCC_OscInitStruct.PLL.PLLP = 2;
+ RCC_OscInitStruct.PLL.PLLQ = 2;
+ RCC_OscInitStruct.PLL.PLLR = 2;
+ RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
+ RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
+ RCC_OscInitStruct.PLL.PLLFRACN = 0;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+ | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
+ | RCC_CLOCKTYPE_PCLK3;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
+ Error_Handler();
+ }
}
#endif /* ARDUINO_GENERIC_* */
diff --git a/variants/STM32H5xx/H503KBU/ldscript.ld b/variants/STM32H5xx/H503KBU/ldscript.ld
new file mode 100644
index 0000000000..8ffe9f3ea7
--- /dev/null
+++ b/variants/STM32H5xx/H503KBU/ldscript.ld
@@ -0,0 +1,187 @@
+/*
+******************************************************************************
+**
+** @file : LinkerScript.ld
+**
+** @author : Auto-generated by STM32CubeIDE
+**
+** @brief : Linker script for STM32H503KBUx Device from STM32H5 series
+** 128KBytes FLASH
+** 32KBytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is, without any warranty
+** of any kind.
+**
+******************************************************************************
+** @attention
+**
+** Copyright (c) 2024 STMicroelectronics.
+** All rights reserved.
+**
+** This software is licensed under terms that can be found in the LICENSE file
+** in the root directory of this software component.
+** If no LICENSE file comes with this software, it is provided AS-IS.
+**
+******************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
+ FLASH (rx) : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+ *(.RamFunc) /* .RamFunc sections */
+ *(.RamFunc*) /* .RamFunc* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/variants/STM32H5xx/H563R(G-I)T_H573RIT/generic_clock.c b/variants/STM32H5xx/H563R(G-I)T_H573RIT/generic_clock.c
index f68f7375d1..30841dd668 100644
--- a/variants/STM32H5xx/H563R(G-I)T_H573RIT/generic_clock.c
+++ b/variants/STM32H5xx/H563R(G-I)T_H573RIT/generic_clock.c
@@ -21,8 +21,50 @@
*/
WEAK void SystemClock_Config(void)
{
- /* SystemClock_Config can be generated by STM32CubeMX */
-#warning "SystemClock_Config() is empty. Default clock at reset is used."
+ RCC_OscInitTypeDef RCC_OscInitStruct = {};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+
+ /** Configure the main internal regulator output voltage
+ */
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
+
+ while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_CSI;
+ RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+ RCC_OscInitStruct.CSIState = RCC_CSI_ON;
+ RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI;
+ RCC_OscInitStruct.PLL.PLLM = 1;
+ RCC_OscInitStruct.PLL.PLLN = 125;
+ RCC_OscInitStruct.PLL.PLLP = 2;
+ RCC_OscInitStruct.PLL.PLLQ = 2;
+ RCC_OscInitStruct.PLL.PLLR = 2;
+ RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
+ RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
+ RCC_OscInitStruct.PLL.PLLFRACN = 0;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+ | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
+ | RCC_CLOCKTYPE_PCLK3;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
+ Error_Handler();
+ }
}
#endif /* ARDUINO_GENERIC_* */
diff --git a/variants/STM32H5xx/H563R(G-I)T_H573RIT/ldscript.ld b/variants/STM32H5xx/H563R(G-I)T_H573RIT/ldscript.ld
new file mode 100644
index 0000000000..df0b0863c9
--- /dev/null
+++ b/variants/STM32H5xx/H563R(G-I)T_H573RIT/ldscript.ld
@@ -0,0 +1,187 @@
+/*
+******************************************************************************
+**
+** @file : LinkerScript.ld
+**
+** @author : Auto-generated by STM32CubeIDE
+**
+** @brief : Linker script for STM32H573RITx Device from STM32H5 series
+** 2048KBytes FLASH
+** 640KBytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is, without any warranty
+** of any kind.
+**
+******************************************************************************
+** @attention
+**
+** Copyright (c) 2024 STMicroelectronics.
+** All rights reserved.
+**
+** This software is licensed under terms that can be found in the LICENSE file
+** in the root directory of this software component.
+** If no LICENSE file comes with this software, it is provided AS-IS.
+**
+******************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
+ FLASH (rx) : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+ *(.RamFunc) /* .RamFunc sections */
+ *(.RamFunc*) /* .RamFunc* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/variants/STM32H7xx/openocd.cfg b/variants/STM32H7xx/openocd.cfg
deleted file mode 100644
index 9bfdded39c..0000000000
--- a/variants/STM32H7xx/openocd.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Copyright (c) 2023, STMicroelectronics
-# All rights reserved.
-#
-# This software component is licensed by ST under BSD 3-Clause license,
-# the "License"; You may not use this file except in compliance with the
-# License. You may obtain a copy of the License at:
-# opensource.org/licenses/BSD-3-Clause
-#
-
-source [find interface/stlink.cfg]
-
-transport select hla_swd
-
-source [find target/stm32h7x.cfg]
-
-reset_config srst_only
diff --git a/variants/STM32L0xx/openocd.cfg b/variants/STM32L0xx/openocd.cfg
deleted file mode 100644
index def6a13b35..0000000000
--- a/variants/STM32L0xx/openocd.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Copyright (c) 2023, STMicroelectronics
-# All rights reserved.
-#
-# This software component is licensed by ST under BSD 3-Clause license,
-# the "License"; You may not use this file except in compliance with the
-# License. You may obtain a copy of the License at:
-# opensource.org/licenses/BSD-3-Clause
-#
-
-source [find interface/stlink.cfg]
-
-transport select hla_swd
-
-source [find target/stm32l0.cfg]
-
-reset_config srst_only
diff --git a/variants/STM32L1xx/openocd.cfg b/variants/STM32L1xx/openocd.cfg
deleted file mode 100644
index 19c15f2b26..0000000000
--- a/variants/STM32L1xx/openocd.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Copyright (c) 2023, STMicroelectronics
-# All rights reserved.
-#
-# This software component is licensed by ST under BSD 3-Clause license,
-# the "License"; You may not use this file except in compliance with the
-# License. You may obtain a copy of the License at:
-# opensource.org/licenses/BSD-3-Clause
-#
-
-source [find interface/stlink.cfg]
-
-transport select hla_swd
-
-source [find target/stm32l1.cfg]
-
-reset_config srst_only
diff --git a/variants/STM32L4xx/L431C(B-C)(T-U)/generic_clock.c b/variants/STM32L4xx/L431C(B-C)(T-U)/generic_clock.c
index b788073f0f..d954a503fb 100644
--- a/variants/STM32L4xx/L431C(B-C)(T-U)/generic_clock.c
+++ b/variants/STM32L4xx/L431C(B-C)(T-U)/generic_clock.c
@@ -21,8 +21,44 @@
*/
WEAK void SystemClock_Config(void)
{
- /* SystemClock_Config can be generated by STM32CubeMX */
-#warning "SystemClock_Config() is empty. Default clock at reset is used."
+ RCC_OscInitTypeDef RCC_OscInitStruct = {};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+
+ /** Configure the main internal regulator output voltage
+ */
+ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) {
+ Error_Handler();
+ }
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = 1;
+ RCC_OscInitStruct.PLL.PLLN = 10;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+ | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
+ Error_Handler();
+ }
}
#endif /* ARDUINO_GENERIC_* */
diff --git a/variants/STM32L4xx/L431C(B-C)(T-U)/ldscript.ld b/variants/STM32L4xx/L431C(B-C)(T-U)/ldscript.ld
new file mode 100644
index 0000000000..b05d53b4bd
--- /dev/null
+++ b/variants/STM32L4xx/L431C(B-C)(T-U)/ldscript.ld
@@ -0,0 +1,189 @@
+/*
+******************************************************************************
+**
+** @file : LinkerScript.ld
+**
+** @author : Auto-generated by STM32CubeIDE
+**
+** @brief : Linker script for STM32L431CCUx Device from STM32L4 series
+** 256KBytes FLASH
+** 64KBytes RAM
+** 16KBytes RAM2
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is, without any warranty
+** of any kind.
+**
+******************************************************************************
+** @attention
+**
+** Copyright (c) 2024 STMicroelectronics.
+** All rights reserved.
+**
+** This software is licensed under terms that can be found in the LICENSE file
+** in the root directory of this software component.
+** If no LICENSE file comes with this software, it is provided AS-IS.
+**
+******************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
+ RAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 16K
+ FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+ *(.RamFunc) /* .RamFunc sections */
+ *(.RamFunc*) /* .RamFunc* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/variants/STM32L4xx/openocd.cfg b/variants/STM32L4xx/openocd.cfg
deleted file mode 100644
index 94127ecb98..0000000000
--- a/variants/STM32L4xx/openocd.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Copyright (c) 2023, STMicroelectronics
-# All rights reserved.
-#
-# This software component is licensed by ST under BSD 3-Clause license,
-# the "License"; You may not use this file except in compliance with the
-# License. You may obtain a copy of the License at:
-# opensource.org/licenses/BSD-3-Clause
-#
-
-source [find interface/stlink.cfg]
-
-transport select hla_swd
-
-source [find target/stm32l4x.cfg]
-
-reset_config srst_only
diff --git a/variants/STM32L5xx/openocd.cfg b/variants/STM32L5xx/openocd.cfg
deleted file mode 100644
index 20a24ac69c..0000000000
--- a/variants/STM32L5xx/openocd.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Copyright (c) 2023, STMicroelectronics
-# All rights reserved.
-#
-# This software component is licensed by ST under BSD 3-Clause license,
-# the "License"; You may not use this file except in compliance with the
-# License. You may obtain a copy of the License at:
-# opensource.org/licenses/BSD-3-Clause
-#
-
-source [find interface/stlink.cfg]
-
-transport select hla_swd
-
-source [find target/stm32l5x.cfg]
-
-reset_config srst_only
diff --git a/variants/STM32MP1xx/openocd.cfg b/variants/STM32MP1xx/openocd.cfg
deleted file mode 100644
index 60c4c7db50..0000000000
--- a/variants/STM32MP1xx/openocd.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Copyright (c) 2023, STMicroelectronics
-# All rights reserved.
-#
-# This software component is licensed by ST under BSD 3-Clause license,
-# the "License"; You may not use this file except in compliance with the
-# License. You may obtain a copy of the License at:
-# opensource.org/licenses/BSD-3-Clause
-#
-
-source [find interface/stlink.cfg]
-
-transport select hla_swd
-
-source [find target/stm32mp15x.cfg]
-
-reset_config srst_only
diff --git a/variants/STM32U5xx/openocd.cfg b/variants/STM32U5xx/openocd.cfg
deleted file mode 100644
index 587f7aa8d3..0000000000
--- a/variants/STM32U5xx/openocd.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Copyright (c) 2023, STMicroelectronics
-# All rights reserved.
-#
-# This software component is licensed by ST under BSD 3-Clause license,
-# the "License"; You may not use this file except in compliance with the
-# License. You may obtain a copy of the License at:
-# opensource.org/licenses/BSD-3-Clause
-#
-
-source [find interface/stlink.cfg]
-
-transport select hla_swd
-
-source [find target/stm32u5x.cfg]
-
-reset_config srst_only
diff --git a/variants/STM32WBxx/openocd.cfg b/variants/STM32WBxx/openocd.cfg
deleted file mode 100644
index f835c16689..0000000000
--- a/variants/STM32WBxx/openocd.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Copyright (c) 2023, STMicroelectronics
-# All rights reserved.
-#
-# This software component is licensed by ST under BSD 3-Clause license,
-# the "License"; You may not use this file except in compliance with the
-# License. You may obtain a copy of the License at:
-# opensource.org/licenses/BSD-3-Clause
-#
-
-source [find interface/stlink.cfg]
-
-transport select hla_swd
-
-source [find target/stm32wbx.cfg]
-
-reset_config srst_only
diff --git a/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/variant_RAK3172_MODULE.cpp b/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/variant_RAK3172_MODULE.cpp
index 7dc9c86355..4b621dd744 100644
--- a/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/variant_RAK3172_MODULE.cpp
+++ b/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/variant_RAK3172_MODULE.cpp
@@ -10,7 +10,7 @@
*
*******************************************************************************
*/
-#if defined(ARDUINO_RAK3172_MODULE)
+#if defined(ARDUINO_RAK3172_MODULE) || defined(ARDUINO_RAK3172T_MODULE)
#include "pins_arduino.h"
// Digital PinName array
@@ -104,4 +104,4 @@ WEAK void SystemClock_Config(void)
}
#endif
-#endif /* ARDUINO_RAK3172_MODULE */
+#endif /* ARDUINO_RAK3172_MODULE || ARDUINO_RAK3172T_MODULE */
diff --git a/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/variant_RAK3172_MODULE.h b/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/variant_RAK3172_MODULE.h
index 3ea5fdb7c1..37ef928ffb 100644
--- a/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/variant_RAK3172_MODULE.h
+++ b/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/variant_RAK3172_MODULE.h
@@ -144,7 +144,12 @@
#endif
// LoRaWAN definitions
-#define LORAWAN_BOARD_HAS_TCXO 0U
+
+#if defined(ARDUINO_RAK3172T_MODULE)
+ #define LORAWAN_BOARD_HAS_TCXO 1U
+#else
+ #define LORAWAN_BOARD_HAS_TCXO 0U
+#endif
#define LORAWAN_BOARD_HAS_DCDC 1U
#define LORAWAN_TX_CONFIG RBI_CONF_RFO_HP
diff --git a/variants/STM32WLxx/openocd.cfg b/variants/STM32WLxx/openocd.cfg
deleted file mode 100644
index 4ccd7efa18..0000000000
--- a/variants/STM32WLxx/openocd.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Copyright (c) 2023, STMicroelectronics
-# All rights reserved.
-#
-# This software component is licensed by ST under BSD 3-Clause license,
-# the "License"; You may not use this file except in compliance with the
-# License. You may obtain a copy of the License at:
-# opensource.org/licenses/BSD-3-Clause
-#
-
-source [find interface/stlink.cfg]
-
-transport select hla_swd
-
-source [find target/stm32wlx.cfg]
-
-reset_config srst_only
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