-
Main Changes
+
Main Changes
First Official Release of STM32CubeWBA Firmware package supporting STM32WBA52xx devices
-
Contents
+
Contents
First Official Release of HAL/LL Drivers for STM32WBAxx serie
- HAL/LL Drivers are available for all peripherals:
@@ -334,24 +414,24 @@
First Offi
-
Supported Devices and boards
+
Supported Devices and boards
- STM32WBA52xx devices
- NUCLEO-WBA52CG board
-
Backward compatibility
+
Backward compatibility
-
Known Limitations
+
Known Limitations
-
Dependencies
+
Dependencies
-
Notes
+
Notes
diff --git a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal.c b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal.c
index 7f4fb9582c..1d5b8c19c7 100644
--- a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal.c
+++ b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal.c
@@ -25,8 +25,8 @@
used by the PPP peripheral drivers and the user to start using the HAL.
[..]
The HAL contains two APIs' categories:
- (+) Common HAL APIs
- (+) Services HAL APIs
+ (+) Common HAL APIs (Version, Init, Tick)
+ (+) Services HAL APIs (DBGMCU, SYSCFG)
@endverbatim
******************************************************************************
@@ -50,19 +50,20 @@
/* Private define ------------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+
/* Exported variables --------------------------------------------------------*/
/** @defgroup HAL_Exported_Variables HAL Exported Variables
* @{
*/
__IO uint32_t uwTick;
-uint32_t uwTickPrio = (1UL << __NVIC_PRIO_BITS); /* Invalid PRIO */
+uint32_t uwTickPrio = (1UL << __NVIC_PRIO_BITS); /* Invalid priority */
HAL_TickFreqTypeDef uwTickFreq = HAL_TICK_FREQ_DEFAULT; /* 1KHz */
/**
* @}
*/
-/* Private function prototypes -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup HAL_Exported_Functions HAL Exported Functions
@@ -77,11 +78,10 @@ HAL_TickFreqTypeDef uwTickFreq = HAL_TICK_FREQ_DEFAULT; /* 1KHz */
##### Initialization and de-initialization functions #####
===============================================================================
[..] This section provides functions allowing to:
- (+) Initializes the Flash interface the NVIC allocation and initial clock
- configuration. It initializes the systick also when timeout is needed
- and the backup domain when enabled.
- (+) De-Initializes common part of the HAL.
- (+) Configure The time base source to have 1ms time base with a dedicated
+ (+) Initialize the Flash interface the NVIC allocation and initial time base
+ clock configuration.
+ (+) De-initialize common part of the HAL.
+ (+) Configure the time base source to have 1ms time base with a dedicated
Tick interrupt priority.
(++) SysTick timer is used by default as source of time base, but user
can eventually implement his proper time base source (a general purpose
@@ -148,8 +148,8 @@ HAL_StatusTypeDef HAL_Init(void)
}
/**
- * @brief This function de-Initializes common part of the HAL and stops the systick.
- * This function is optional.
+ * @brief De-initialize common part of the HAL and stop the source of time base.
+ * @note This function is optional.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DeInit(void)
@@ -184,29 +184,29 @@ HAL_StatusTypeDef HAL_DeInit(void)
}
/**
- * @brief Initializes the MSP.
+ * @brief Initialize the MSP.
* @retval None
*/
__weak void HAL_MspInit(void)
{
- /* NOTE : This function Should not be modified, when the callback is needed,
+ /* NOTE : This function should not be modified, when the callback is needed,
the HAL_MspInit could be implemented in the user file
*/
}
/**
- * @brief DeInitializes the MSP.
+ * @brief DeInitialize the MSP.
* @retval None
*/
__weak void HAL_MspDeInit(void)
{
- /* NOTE : This function Should not be modified, when the callback is needed,
+ /* NOTE : This function should not be modified, when the callback is needed,
the HAL_MspDeInit could be implemented in the user file
*/
}
/**
- * @brief This function configures the source of the time base.
+ * @brief This function configures the source of the time base:
* The time source is configured to have 1ms time base with a dedicated
* Tick interrupt priority.
* @note This function is called automatically at the beginning of program after
@@ -218,7 +218,7 @@ __weak void HAL_MspDeInit(void)
* than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
* The function is declared as __weak to be overwritten in case of other
* implementation in user file.
- * @param TickPriority: Tick interrupt priority.
+ * @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
@@ -285,7 +285,7 @@ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
* @}
*/
-/** @defgroup HAL_Group2 HAL Control functions
+/** @defgroup HAL_Exported_Functions_Group2 HAL Control functions
* @brief HAL Control functions
*
@verbatim
@@ -300,9 +300,6 @@ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
(+) Get the HAL API driver version
(+) Get the device identifier
(+) Get the device revision identifier
- (+) Enable/Disable Debug module during SLEEP mode
- (+) Enable/Disable Debug module during STOP mode
- (+) Enable/Disable Debug module during STANDBY mode
@endverbatim
* @{
@@ -323,7 +320,7 @@ __weak void HAL_IncTick(void)
}
/**
- * @brief Provides a tick value in millisecond.
+ * @brief Provide a tick value in millisecond.
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
@@ -343,22 +340,29 @@ uint32_t HAL_GetTickPrio(void)
}
/**
- * @brief Set new tick Freq.
- * @retval Status
+ * @brief Set new tick frequency.
+ * @param Freq tick frequency
+ * @retval HAL status
*/
HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq)
{
HAL_StatusTypeDef status = HAL_OK;
- assert_param(IS_TICKFREQ(Freq));
+ HAL_TickFreqTypeDef prevTickFreq;
if (uwTickFreq != Freq)
{
+ /* Back up uwTickFreq frequency */
+ prevTickFreq = uwTickFreq;
+
+ /* Update uwTickFreq global variable used by HAL_InitTick() */
+ uwTickFreq = Freq;
+
/* Apply the new tick Freq */
status = HAL_InitTick(uwTickPrio);
-
- if (status == HAL_OK)
+ if (status != HAL_OK)
{
- uwTickFreq = Freq;
+ /* Restore previous tick frequency */
+ uwTickFreq = prevTickFreq;
}
}
@@ -435,7 +439,7 @@ __weak void HAL_ResumeTick(void)
}
/**
- * @brief Returns the HAL revision
+ * @brief Return the HAL revision.
* @retval version : 0xXYZR (8bits for each decimal, R for RC)
*/
uint32_t HAL_GetHalVersion(void)
@@ -444,16 +448,16 @@ uint32_t HAL_GetHalVersion(void)
}
/**
- * @brief Returns the device revision identifier.
+ * @brief Return the device revision identifier.
* @retval Device revision identifier
*/
uint32_t HAL_GetREVID(void)
{
- return ((DBGMCU->IDCODE & DBGMCU_IDCODE_REV_ID) >> 16);
+ return ((DBGMCU->IDCODE & DBGMCU_IDCODE_REV_ID) >> DBGMCU_IDCODE_REV_ID_Pos);
}
/**
- * @brief Returns the device identifier.
+ * @brief Return the device identifier.
* @retval Device identifier
*/
uint32_t HAL_GetDEVID(void)
@@ -491,7 +495,6 @@ uint32_t HAL_GetUIDw2(void)
* @}
*/
-
/** @defgroup HAL_Exported_Functions_Group3 HAL Debug functions
* @brief HAL Debug functions
*
@@ -747,6 +750,7 @@ HAL_StatusTypeDef HAL_SYSCFG_GetConfigAttributes(uint32_t Item, uint32_t *pAttri
*/
#endif /* HAL_MODULE_ENABLED */
+
/**
* @}
*/
diff --git a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_adc.c b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_adc.c
index 233cc3ffc7..efe59189a7 100644
--- a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_adc.c
+++ b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_adc.c
@@ -825,17 +825,17 @@ HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc)
/* Reset register SMPR */
hadc->Instance->SMPR &= ~ADC_SMPR_SMP1;
- /* Reset registers AWDxTR */
- hadc->Instance->AWD1TR &= ~(ADC_AWD1TR_HT1 | ADC_AWD1TR_LT1);
- hadc->Instance->AWD2TR &= ~(ADC_AWD2TR_HT2 | ADC_AWD2TR_LT2);
- hadc->Instance->AWD3TR &= ~(ADC_AWD3TR_HT3 | ADC_AWD3TR_LT3);
-
/* Reset register CHSELR */
hadc->Instance->CHSELR &= ~(ADC_CHSELR_SQ_ALL);
/* Reset register DR */
/* bits in access mode read only, no direct reset applicable */
+ /* Reset registers AWDxTR */
+ hadc->Instance->AWD1TR &= ~(ADC_AWD1TR_HT1 | ADC_AWD1TR_LT1);
+ hadc->Instance->AWD2TR &= ~(ADC_AWD2TR_HT2 | ADC_AWD2TR_LT2);
+ hadc->Instance->AWD3TR &= ~(ADC_AWD3TR_HT3 | ADC_AWD3TR_LT3);
+
/* Reset register PWRR */
/* Note: Bit of deep power down mode already updated previously */
hadc->Instance->PWRR &= ~(ADC_PWRR_AUTOFF);
diff --git a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_cortex.c b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_cortex.c
index d0b3a681e4..cfad3c53ee 100644
--- a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_cortex.c
+++ b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_cortex.c
@@ -505,6 +505,22 @@ void HAL_MPU_Enable(uint32_t MPU_Control)
__ISB(); /* Flush and refill pipeline with updated MPU configuration settings */
}
+/**
+ * @brief Enable the MPU Region.
+ * @retval None
+ */
+void HAL_MPU_EnableRegion(uint32_t RegionNumber)
+{
+ /* Check the parameters */
+ assert_param(IS_MPU_REGION_NUMBER(RegionNumber));
+
+ /* Set the Region number */
+ MPU->RNR = RegionNumber;
+
+ /* Enable the Region */
+ SET_BIT(MPU->RLAR, MPU_RLAR_EN_Msk);
+}
+
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
/**
* @brief Enable the non-secure MPU.
@@ -532,6 +548,21 @@ void HAL_MPU_Enable_NS(uint32_t MPU_Control)
__DSB(); /* Ensure that the subsequent instruction is executed only after the write to memory */
__ISB(); /* Flush and refill pipeline with updated MPU configuration settings */
}
+
+/**
+ * @brief Enable the non-secure MPU Region.
+ * @retval None
+ */
+void HAL_MPU_EnableRegion_NS(uint32_t RegionNumber)
+{
+ assert_param(IS_MPU_REGION_NUMBER(RegionNumber));
+
+ /* Set the Region number */
+ MPU_NS->RNR = RegionNumber;
+
+ /* Enable the Region */
+ SET_BIT(MPU_NS->RLAR, MPU_RLAR_EN_Msk);
+}
#endif /* __ARM_FEATURE_CMSE */
/**
@@ -554,6 +585,22 @@ void HAL_MPU_Disable(void)
__ISB(); /* Flush and refill pipeline with updated MPU configuration settings */
}
+/**
+ * @brief Disable the MPU Region.
+ * @retval None
+ */
+void HAL_MPU_DisableRegion(uint32_t RegionNumber)
+{
+ /* Check the parameters */
+ assert_param(IS_MPU_REGION_NUMBER(RegionNumber));
+
+ /* Set the Region number */
+ MPU->RNR = RegionNumber;
+
+ /* Disable the Region */
+ CLEAR_BIT(MPU->RLAR, MPU_RLAR_EN_Msk);
+}
+
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
void HAL_MPU_Disable_NS(void)
{
@@ -570,7 +617,24 @@ void HAL_MPU_Disable_NS(void)
__DSB(); /* Ensure that the subsequent instruction is executed only after the write to memory */
__ISB(); /* Flush and refill pipeline with updated MPU configuration settings */
}
+
+/**
+ * @brief Disable the non-secure MPU Region.
+ * @retval None
+ */
+void HAL_MPU_DisableRegion_NS(uint32_t RegionNumber)
+{
+ /* Check the parameters */
+ assert_param(IS_MPU_REGION_NUMBER(RegionNumber));
+
+ /* Set the Region number */
+ MPU_NS->RNR = RegionNumber;
+
+ /* Disable the Region */
+ CLEAR_BIT(MPU_NS->RLAR, MPU_RLAR_EN_Msk);
+}
#endif /* __ARM_FEATURE_CMSE */
+
/**
* @brief Initialize and configure the Region and the memory to be protected.
* @param MPU_RegionInit: Pointer to a MPU_Region_InitTypeDef structure that contains
@@ -600,6 +664,10 @@ static void MPU_ConfigRegion(MPU_Type *MPUx, MPU_Region_InitTypeDef *MPU_RegionI
/* Check the parameters */
assert_param(IS_MPU_REGION_NUMBER(MPU_RegionInit->Number));
assert_param(IS_MPU_REGION_ENABLE(MPU_RegionInit->Enable));
+ assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_RegionInit->DisableExec));
+ assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_RegionInit->AccessPermission));
+ assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_RegionInit->IsShareable));
+ assert_param(IS_MPU_ATTRIBUTES_NUMBER(MPU_RegionInit->AttributesIndex));
/* Follow ARM recommendation with Data Memory Barrier prior to MPU configuration */
__DMB();
@@ -607,27 +675,17 @@ static void MPU_ConfigRegion(MPU_Type *MPUx, MPU_Region_InitTypeDef *MPU_RegionI
/* Set the Region number */
MPUx->RNR = MPU_RegionInit->Number;
- if (MPU_RegionInit->Enable != MPU_REGION_DISABLE)
- {
- /* Check the parameters */
- assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_RegionInit->DisableExec));
- assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_RegionInit->AccessPermission));
- assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_RegionInit->IsShareable));
-
- MPUx->RBAR = (((uint32_t)MPU_RegionInit->BaseAddress & 0xFFFFFFE0U) |
- ((uint32_t)MPU_RegionInit->IsShareable << MPU_RBAR_SH_Pos) |
- ((uint32_t)MPU_RegionInit->AccessPermission << MPU_RBAR_AP_Pos) |
- ((uint32_t)MPU_RegionInit->DisableExec << MPU_RBAR_XN_Pos));
-
- MPUx->RLAR = (((uint32_t)MPU_RegionInit->LimitAddress & 0xFFFFFFE0U) |
- ((uint32_t)MPU_RegionInit->AttributesIndex << MPU_RLAR_AttrIndx_Pos) |
- ((uint32_t)MPU_RegionInit->Enable << MPU_RLAR_EN_Pos));
- }
- else
- {
- MPUx->RBAR = 0U;
- MPUx->RLAR = 0U;
- }
+ /* Disable the Region */
+ CLEAR_BIT(MPUx->RLAR, MPU_RLAR_EN_Msk);
+
+ MPUx->RBAR = (((uint32_t)MPU_RegionInit->BaseAddress & 0xFFFFFFE0U) |
+ ((uint32_t)MPU_RegionInit->IsShareable << MPU_RBAR_SH_Pos) |
+ ((uint32_t)MPU_RegionInit->AccessPermission << MPU_RBAR_AP_Pos) |
+ ((uint32_t)MPU_RegionInit->DisableExec << MPU_RBAR_XN_Pos));
+
+ MPUx->RLAR = (((uint32_t)MPU_RegionInit->LimitAddress & 0xFFFFFFE0U) |
+ ((uint32_t)MPU_RegionInit->AttributesIndex << MPU_RLAR_AttrIndx_Pos) |
+ ((uint32_t)MPU_RegionInit->Enable << MPU_RLAR_EN_Pos));
}
/**
* @brief Initialize and configure the memory attributes.
diff --git a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_flash_ex.c b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_flash_ex.c
index b08994a33c..9f95483992 100644
--- a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_flash_ex.c
+++ b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_flash_ex.c
@@ -1336,7 +1336,7 @@ static void FLASH_OB_WMSECConfig(uint32_t WMSecConfig, uint32_t WMSecStartPage,
/* Check the parameters */
assert_param(IS_OB_WMSEC_CONFIG(WMSecConfig));
- assert_param(IS_OB_WMSEC_AREA_EXCLUSIVE(WMSecConfig & 0x3U));
+ assert_param(IS_OB_WMSEC_AREA_EXCLUSIVE(WMSecConfig & FLASH_BANK_1));
assert_param(IS_FLASH_PAGE(WMSecStartPage));
assert_param(IS_FLASH_PAGE(WMSecEndPage));
assert_param(IS_FLASH_PAGE(WMHDPEndPage));
@@ -1558,7 +1558,7 @@ static void FLASH_OB_GetWMSEC(uint32_t *WMSecConfig, uint32_t *WMSecStartPage, u
/* Check the parameters */
assert_param(IS_OB_WMSEC_CONFIG(*WMSecConfig));
- assert_param(IS_FLASH_BANK_EXCLUSIVE((*WMSecConfig) & 0x3U));
+ assert_param(IS_FLASH_BANK_EXCLUSIVE((*WMSecConfig) & FLASH_BANK_1));
/* Read SECWM registers */
if (((*WMSecConfig) & OB_WMSEC_AREA1) != 0U)
diff --git a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_i2c.c b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_i2c.c
index 0befd7d3cb..1f67b9d949 100644
--- a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_i2c.c
+++ b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_i2c.c
@@ -90,7 +90,7 @@
add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can
add their own code by customization of function pointer HAL_I2C_ErrorCallback()
- (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
+ (+) Abort a master or memory I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
(+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can
add their own code by customization of function pointer HAL_I2C_AbortCpltCallback()
(+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro.
@@ -156,7 +156,7 @@
HAL_I2C_Master_Seq_Receive_IT() or using HAL_I2C_Master_Seq_Receive_DMA()
(+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and users can
add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
- (++) Abort a master IT or DMA I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
+ (++) Abort a master or memory IT or DMA I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
(+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can
add their own code by customization of function pointer HAL_I2C_AbortCpltCallback()
(++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT()
@@ -214,7 +214,7 @@
add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can
add their own code by customization of function pointer HAL_I2C_ErrorCallback()
- (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
+ (+) Abort a master or memory I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
(+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can
add their own code by customization of function pointer HAL_I2C_AbortCpltCallback()
(+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro.
@@ -1363,6 +1363,8 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData
uint32_t Timeout)
{
uint32_t tickstart;
+ uint16_t tmpXferCount;
+ HAL_StatusTypeDef error;
if (hi2c->State == HAL_I2C_STATE_READY)
{
@@ -1389,14 +1391,6 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData
/* Enable Address Acknowledge */
hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
- /* Wait until ADDR flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
- {
- /* Disable Address Acknowledge */
- hi2c->Instance->CR2 |= I2C_CR2_NACK;
- return HAL_ERROR;
- }
-
/* Preload TX data if no stretch enable */
if (hi2c->Init.NoStretchMode == I2C_NOSTRETCH_ENABLE)
{
@@ -1410,6 +1404,18 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData
hi2c->XferCount--;
}
+ /* Wait until ADDR flag is set */
+ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
+ {
+ /* Disable Address Acknowledge */
+ hi2c->Instance->CR2 |= I2C_CR2_NACK;
+
+ /* Flush TX register */
+ I2C_Flush_TXDR(hi2c);
+
+ return HAL_ERROR;
+ }
+
/* Clear ADDR flag */
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
@@ -1421,6 +1427,10 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData
{
/* Disable Address Acknowledge */
hi2c->Instance->CR2 |= I2C_CR2_NACK;
+
+ /* Flush TX register */
+ I2C_Flush_TXDR(hi2c);
+
return HAL_ERROR;
}
@@ -1433,6 +1443,10 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData
{
/* Disable Address Acknowledge */
hi2c->Instance->CR2 |= I2C_CR2_NACK;
+
+ /* Flush TX register */
+ I2C_Flush_TXDR(hi2c);
+
return HAL_ERROR;
}
@@ -1456,31 +1470,48 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData
}
/* Wait until AF flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK)
+ error = I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart);
+
+ if (error != HAL_OK)
{
- /* Disable Address Acknowledge */
- hi2c->Instance->CR2 |= I2C_CR2_NACK;
- return HAL_ERROR;
+ /* Check that I2C transfer finished */
+ /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */
+ /* Mean XferCount == 0 */
+
+ tmpXferCount = hi2c->XferCount;
+ if ((hi2c->ErrorCode == HAL_I2C_ERROR_AF) && (tmpXferCount == 0U))
+ {
+ /* Reset ErrorCode to NONE */
+ hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
+ }
+ else
+ {
+ /* Disable Address Acknowledge */
+ hi2c->Instance->CR2 |= I2C_CR2_NACK;
+ return HAL_ERROR;
+ }
}
+ else
+ {
+ /* Flush TX register */
+ I2C_Flush_TXDR(hi2c);
- /* Flush TX register */
- I2C_Flush_TXDR(hi2c);
+ /* Clear AF flag */
+ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
- /* Clear AF flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
+ /* Wait until STOP flag is set */
+ if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
+ {
+ /* Disable Address Acknowledge */
+ hi2c->Instance->CR2 |= I2C_CR2_NACK;
- /* Wait until STOP flag is set */
- if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- /* Disable Address Acknowledge */
- hi2c->Instance->CR2 |= I2C_CR2_NACK;
+ return HAL_ERROR;
+ }
- return HAL_ERROR;
+ /* Clear STOP flag */
+ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
}
- /* Clear STOP flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
/* Wait until BUSY flag is reset */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK)
{
@@ -4819,7 +4850,7 @@ HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
}
/**
- * @brief Abort a master I2C IT or DMA process communication with Interrupt.
+ * @brief Abort a master or memory I2C IT or DMA process communication with Interrupt.
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for the specified I2C.
* @param DevAddress Target device address: The device 7 bits address value
@@ -4828,7 +4859,9 @@ HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
*/
HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
{
- if (hi2c->Mode == HAL_I2C_MODE_MASTER)
+ HAL_I2C_ModeTypeDef tmp_mode = hi2c->Mode;
+
+ if ((tmp_mode == HAL_I2C_MODE_MASTER) || (tmp_mode == HAL_I2C_MODE_MEM))
{
/* Process Locked */
__HAL_LOCK(hi2c);
diff --git a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_rcc_ex.c b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_rcc_ex.c
index d06b427902..53076faf4b 100644
--- a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_rcc_ex.c
+++ b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_rcc_ex.c
@@ -43,11 +43,11 @@
/* Private function prototypes -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
-/** @defgroup RCCEx_Exported_Functions RCCEx Exported Functions
+/** @addtogroup RCCEx_Exported_Functions
* @{
*/
-/** @defgroup RCCEx_Exported_Functions_Group1 Extended Peripheral Control functions
+/** @addtogroup RCCEx_Exported_Functions_Group1
* @brief Extended Peripheral Control functions
*
@verbatim
@@ -88,7 +88,9 @@
* @arg @ref RCC_PERIPHCLK_LPTIM1 LPTIM1 peripheral clock
* @arg @ref RCC_PERIPHCLK_ADC ADC4 peripheral clock
* @arg @ref RCC_PERIPHCLK_RTC RTC peripheral clock
+ * @arg @ref RCC_PERIPHCLK_RADIOST RADIO sleep timer clock (**)
* @note (*) Peripherals are not available on all devices
+ * @note (**) This requires the Backup domain access to be enabled
* @note Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to select
* the RTC clock source: in this case the access to Backup domain is enabled.
* @retval HAL status
@@ -391,6 +393,12 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(const RCC_PeriphCLKInitTypeDef *Peri
/* Configure the RADIO Sleep Timer clock source */
__HAL_RCC_RADIOSLPTIM_CONFIG(PeriphClkInit->RadioSlpTimClockSelection);
+
+ /* Check configuration validity as under Backup domain access control */
+ if (__HAL_RCC_GET_RADIOSLPTIM_SOURCE() != PeriphClkInit->RadioSlpTimClockSelection)
+ {
+ return HAL_ERROR;
+ }
}
return HAL_OK;
@@ -517,6 +525,7 @@ void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
* @arg @ref RCC_PERIPHCLK_LPTIM1 LPTIM1 peripheral clock
* @arg @ref RCC_PERIPHCLK_ADC ADC4 peripheral clock
* @arg @ref RCC_PERIPHCLK_RTC RTC peripheral clock
+ * @arg @ref RCC_PERIPHCLK_RADIOST RADIO sleep timer clock
* @note (*) Peripherals are not available on all devices
* @retval Frequency in Hz
*/
@@ -1124,7 +1133,7 @@ uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
* @}
*/
-/** @defgroup RCCEx_Exported_Functions_Group2 Extended Clock management functions
+/** @addtogroup RCCEx_Exported_Functions_Group2
* @brief Extended Clock management functions
*
@verbatim
@@ -1190,7 +1199,7 @@ void HAL_RCCEx_DisableLSCO(void)
/**
* @brief Set HSE trimming value
- * @param Trimming specifies the HSE trimmign value.
+ * @param Trimming specifies the HSE trimming value.
* This parameter should be below 0x3F.
* @retval None
*/
@@ -1204,7 +1213,7 @@ void HAL_RCCEx_HSESetTrimming(uint32_t Trimming)
/**
* @brief Get HSE trimming value
- * @retval The programmed HSE trimmign value
+ * @retval The programmed HSE trimming value
*/
uint32_t HAL_RCCEx_HSEGetTrimming(void)
{
@@ -1231,7 +1240,7 @@ void HAL_RCCEx_LSESetTrimming(uint32_t Trimming)
/**
* @brief Get LSE trimming value
- * @retval The programmed LSE trimmign value
+ * @retval The programmed LSE trimming value
*/
uint32_t HAL_RCCEx_LSEGetTrimming(void)
{
@@ -1281,7 +1290,7 @@ void HAL_RCCEx_LSI2GetConfig(RCC_LSIConfigTypeDef *pConfig)
* @}
*/
-/** @defgroup RCCEx_Exported_Functions_Group3 Radio clock management functions
+/** @addtogroup RCCEx_Exported_Functions_Group3
* @brief Radio clock management functions
*
@verbatim
@@ -1347,6 +1356,120 @@ uint32_t HAL_RCCEx_GetRadioBusClockReadiness(void)
* @}
*/
+#if defined(RCC_CCIPR2_ASSEL)
+/** @addtogroup RCCEx_Exported_Functions_Group4
+ * @brief Radio clock management functions
+ *
+@verbatim
+ ===============================================================================
+ ##### Extended radio clock management functions #####
+ ===============================================================================
+ [..]
+ This subsection provides a set of functions allowing to control the
+ audio-synchronization-related parameters.
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Enable the Audio Synchronization counter and kernel clock
+ * @retval None
+ */
+void HAL_RCCEx_EnableAudioSyncClock(void)
+{
+ SET_BIT(RCC->ASCR, RCC_ASCR_CEN);
+}
+
+/**
+ * @brief Disable the Audio Synchronization counter and kernel clock
+ * @retval None
+ */
+void HAL_RCCEx_DisableAudioSyncClock(void)
+{
+ CLEAR_BIT(RCC->ASCR, RCC_ASCR_CEN);
+}
+
+/**
+ * @brief Set Audio Synchronization Configuration
+ * @param pConf pointer to an RCC_AudioSyncConfigTypeDef structure that
+ * contains the configuration information for the Audio Synchronization
+ * @retval None
+ */
+HAL_StatusTypeDef HAL_RCCEx_SetConfigAudioSync(const RCC_AudioSyncConfigTypeDef *pConf)
+{
+ /* Check the parameters */
+ assert_param(pConf != (void *)NULL);
+ assert_param(IS_RCC_AUDIOSYNC_CAPTUREPRESCALER(pConf->CapturePrescaler));
+ assert_param(IS_RCC_AUDIOSYNC_CLOCKPRESCALER(pConf->ClockPrescaler));
+ assert_param(IS_RCC_AUDIOSYNC_AUTORELOAD(pConf->AutoReloadValue));
+ assert_param(IS_RCC_AUDIOSYNC_COMPARE(pConf->CompareValue));
+
+ /* Set ASCR register value */
+ RCC->ASCR = (((pConf->CapturePrescaler) << RCC_ASCR_CPS_Pos) & \
+ ((pConf->ClockPrescaler) << RCC_ASCR_PSC_Pos));
+
+ /* Set Auto Reload value */
+ RCC->ASARR = ((pConf->AutoReloadValue) << RCC_ASARR_AR_Pos);
+
+ /* Set Compare value */
+ RCC->ASCOR = ((pConf->CompareValue) << RCC_ASCOR_CO_Pos);
+
+ return HAL_OK;
+}
+
+/**
+ * @brief Configure the pConf according to the internal
+ * RCC configuration registers.
+ * @param pConf pointer to an RCC_AudioSyncConfigTypeDef
+ * structure that will be configured.
+ * @retval None
+ */
+void HAL_RCCEx_GetConfigAudioSync(RCC_AudioSyncConfigTypeDef *pConf)
+{
+ uint32_t regvalue;
+
+ /* Check the parameters */
+ assert_param(pConf != (void *)NULL);
+
+ /* Get Audio ASCR register */
+ regvalue = RCC->ASCR;
+
+ /* Get Capture prescaler value */
+ pConf->CapturePrescaler = ((regvalue & RCC_ASCR_CPS) >> RCC_ASCR_CPS_Pos);
+
+ /* Get Clock prescaler value */
+ pConf->ClockPrescaler = ((regvalue & RCC_ASCR_PSC) >> RCC_ASCR_PSC_Pos);
+
+ /* Get Auto Reload value */
+ pConf->AutoReloadValue = ((RCC->ASARR & RCC_ASCAR_CA) >> RCC_ASCAR_CA_Pos);
+
+ /* Get Compare value */
+ pConf->CompareValue = ((RCC->ASCOR & RCC_ASCOR_CO) >> RCC_ASCOR_CO_Pos);
+}
+
+/**
+ * @brief Get AudioSync Counter value
+ * @retval The Counter value
+ */
+uint32_t HAL_RCCEx_GetAudioSyncCounterValue(void)
+{
+ return ((RCC->ASCNTR & RCC_ASCNTR_CNT) >> RCC_ASCNTR_CNT_Pos);
+}
+
+/**
+ * @brief Get AudioSync Capture value
+ * @retval The programmed Capture value
+ */
+uint32_t HAL_RCCEx_GetAudioSyncCaptureValue(void)
+{
+ return ((RCC->ASCAR & RCC_ASCAR_CA) >> RCC_ASCAR_CA_Pos);
+}
+
+/**
+ * @}
+ */
+#endif /* RCC_CCIPR2_ASSEL */
+
/**
* @}
*/
diff --git a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_rng_ex.c b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_rng_ex.c
index 3de5f9f590..0e66adbb0b 100644
--- a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_rng_ex.c
+++ b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_rng_ex.c
@@ -30,7 +30,7 @@
#if defined(RNG)
-/** @addtogroup RNG_Ex
+/** @addtogroup RNGEx
* @brief RNG Extended HAL module driver.
* @{
*/
@@ -41,7 +41,7 @@
/* Private defines -----------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
-/** @addtogroup RNG_Ex_Private_Constants
+/** @addtogroup RNGEx_Private_Constants
* @{
*/
#define RNG_TIMEOUT_VALUE 2U
@@ -53,11 +53,11 @@
/* Private functions --------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
-/** @defgroup RNG_Ex_Exported_Functions RNG_Ex Exported Functions
+/** @defgroup RNGEx_Exported_Functions RNGEx Exported Functions
* @{
*/
-/** @defgroup RNG_Ex_Exported_Functions_Group1 Configuration and lock functions
+/** @defgroup RNGEx_Exported_Functions_Group1 Configuration and lock functions
* @brief Configuration functions
*
@verbatim
@@ -269,7 +269,7 @@ HAL_StatusTypeDef HAL_RNGEx_LockConfig(RNG_HandleTypeDef *hrng)
* @}
*/
-/** @defgroup RNG_Ex_Exported_Functions_Group2 Recover from seed error function
+/** @defgroup RNGEx_Exported_Functions_Group2 Recover from seed error function
* @brief Recover from seed error function
*
@verbatim
diff --git a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_rtc.c b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_rtc.c
index b288722a44..ed2910d585 100644
--- a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_rtc.c
+++ b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_rtc.c
@@ -518,6 +518,7 @@ HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc)
* @arg @ref HAL_RTC_ALARM_B_EVENT_CB_ID Alarm B Event Callback ID
* @arg @ref HAL_RTC_TIMESTAMP_EVENT_CB_ID TimeStamp Event Callback ID
* @arg @ref HAL_RTC_WAKEUPTIMER_EVENT_CB_ID WakeUp Timer Event Callback ID
+ * @arg @ref HAL_RTC_SSRU_EVENT_CB_ID SSRU Event Callback ID
* @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Callback ID
* @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Callback ID
* @arg @ref HAL_RTC_TAMPER3_EVENT_CB_ID Tamper 3 Callback ID
diff --git a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_smbus.c b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_smbus.c
index ccda2e6bfb..850034618e 100644
--- a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_smbus.c
+++ b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_smbus.c
@@ -2625,8 +2625,11 @@ static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus)
__HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_PECERR);
}
- /* Flush TX register */
- SMBUS_Flush_TXDR(hsmbus);
+ if (hsmbus->ErrorCode != HAL_SMBUS_ERROR_NONE)
+ {
+ /* Flush TX register */
+ SMBUS_Flush_TXDR(hsmbus);
+ }
/* Store current volatile hsmbus->ErrorCode, misra rule */
tmperror = hsmbus->ErrorCode;
diff --git a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_smbus_ex.c b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_smbus_ex.c
index 2e6a216014..23d81ea1c6 100644
--- a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_smbus_ex.c
+++ b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_smbus_ex.c
@@ -6,6 +6,9 @@
* This file provides firmware functions to manage the following
* functionalities of SMBUS Extended peripheral:
* + Extended features functions
+ * + WakeUp Mode Functions
+ * + FastModePlus Functions
+ * + Autonomous Mode Functions
*
******************************************************************************
* @attention
diff --git a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_tim.c b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_tim.c
index de7fb7c7e7..0eda68d0e0 100644
--- a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_tim.c
+++ b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_tim.c
@@ -4630,7 +4630,7 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_O
* @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
* @param BurstBuffer The Buffer address.
* @param BurstLength DMA Burst length. This parameter can be one value
- * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_26TRANSFER.
+ * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_26TRANSFERS.
* @note This function should be used only when BurstLength is equal to DMA data transfer length.
* @retval HAL status
*/
@@ -4776,7 +4776,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
* @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
* @param BurstBuffer The Buffer address.
* @param BurstLength DMA Burst length. This parameter can be one value
- * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_26TRANSFER.
+ * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_26TRANSFERS.
* @param DataLength Data length. This parameter can be one value
* between 1 and 0xFFFF.
* @retval HAL status
@@ -5086,7 +5086,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t B
* @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
* @param BurstBuffer The Buffer address.
* @param BurstLength DMA Burst length. This parameter can be one value
- * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_26TRANSFER.
+ * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_26TRANSFERS.
* @note This function should be used only when BurstLength is equal to DMA data transfer length.
* @retval HAL status
*/
@@ -5231,7 +5231,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t B
* @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
* @param BurstBuffer The Buffer address.
* @param BurstLength DMA Burst length. This parameter can be one value
- * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_26TRANSFER.
+ * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_26TRANSFERS.
* @param DataLength Data length. This parameter can be one value
* between 1 and 0xFFFF.
* @retval HAL status
@@ -5578,15 +5578,28 @@ HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim,
case TIM_CLEARINPUTSOURCE_NONE:
{
/* Clear the OCREF clear selection bit and the the ETR Bits */
- CLEAR_BIT(htim->Instance->SMCR, (TIM_SMCR_OCCS | TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP));
+ if (IS_TIM_OCCS_INSTANCE(htim->Instance))
+ {
+ CLEAR_BIT(htim->Instance->SMCR, (TIM_SMCR_OCCS | TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP));
+
+ /* Clear TIMx_AF2_OCRSEL (reset value) */
+ CLEAR_BIT(htim->Instance->AF2, TIMx_AF2_OCRSEL);
+ }
+ else
+ {
+ CLEAR_BIT(htim->Instance->SMCR, (TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP));
+ }
break;
}
case TIM_CLEARINPUTSOURCE_COMP1:
case TIM_CLEARINPUTSOURCE_COMP2:
{
- /* Clear the OCREF clear selection bit */
- CLEAR_BIT(htim->Instance->SMCR, TIM_SMCR_OCCS);
+ if (IS_TIM_OCCS_INSTANCE(htim->Instance))
+ {
+ /* Clear the OCREF clear selection bit */
+ CLEAR_BIT(htim->Instance->SMCR, TIM_SMCR_OCCS);
+ }
/* Set the clear input source */
MODIFY_REG(htim->Instance->AF2, TIMx_AF2_OCRSEL, sClearInputConfig->ClearInputSource);
@@ -5613,8 +5626,14 @@ HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim,
sClearInputConfig->ClearInputPolarity,
sClearInputConfig->ClearInputFilter);
- /* Set the OCREF clear selection bit */
- SET_BIT(htim->Instance->SMCR, TIM_SMCR_OCCS);
+ if (IS_TIM_OCCS_INSTANCE(htim->Instance))
+ {
+ /* Set the OCREF clear selection bit */
+ SET_BIT(htim->Instance->SMCR, TIM_SMCR_OCCS);
+
+ /* Clear TIMx_AF2_OCRSEL (reset value) */
+ CLEAR_BIT(htim->Instance->AF2, TIMx_AF2_OCRSEL);
+ }
break;
}
diff --git a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_tim_ex.c b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_tim_ex.c
index 7145249607..8c67bc2199 100644
--- a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_tim_ex.c
+++ b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_tim_ex.c
@@ -1902,7 +1902,8 @@ HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t
* @arg TIM_TS_ITR0: Internal trigger 0 selected
* @arg TIM_TS_ITR1: Internal trigger 1 selected
* @arg TIM_TS_ITR2: Internal trigger 2 selected
- * @arg TIM_TS_ITR3: Internal trigger 3 selected
+ * @arg TIM_TS_ITR7: Internal trigger 7 selected
+ * @arg TIM_TS_ITR8: Internal trigger 8 selected
* @arg TIM_TS_NONE: No trigger is needed
* @param CommutationSource the Commutation Event source
* This parameter can be one of the following values:
@@ -1919,6 +1920,9 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t
__HAL_LOCK(htim);
+ if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
+ (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR7) ||
+ (InputTrigger == TIM_TS_ITR8))
{
/* Select the Input trigger */
htim->Instance->SMCR &= ~TIM_SMCR_TS;
@@ -1956,7 +1960,8 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t
* @arg TIM_TS_ITR0: Internal trigger 0 selected
* @arg TIM_TS_ITR1: Internal trigger 1 selected
* @arg TIM_TS_ITR2: Internal trigger 2 selected
- * @arg TIM_TS_ITR3: Internal trigger 3 selected
+ * @arg TIM_TS_ITR7: Internal trigger 7 selected
+ * @arg TIM_TS_ITR8: Internal trigger 8 selected
* @arg TIM_TS_NONE: No trigger is needed
* @param CommutationSource the Commutation Event source
* This parameter can be one of the following values:
@@ -1973,6 +1978,9 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32
__HAL_LOCK(htim);
+ if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
+ (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR7) ||
+ (InputTrigger == TIM_TS_ITR8))
{
/* Select the Input trigger */
htim->Instance->SMCR &= ~TIM_SMCR_TS;
@@ -2011,7 +2019,8 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32
* @arg TIM_TS_ITR0: Internal trigger 0 selected
* @arg TIM_TS_ITR1: Internal trigger 1 selected
* @arg TIM_TS_ITR2: Internal trigger 2 selected
- * @arg TIM_TS_ITR3: Internal trigger 3 selected
+ * @arg TIM_TS_ITR7: Internal trigger 7 selected
+ * @arg TIM_TS_ITR8: Internal trigger 8 selected
* @arg TIM_TS_NONE: No trigger is needed
* @param CommutationSource the Commutation Event source
* This parameter can be one of the following values:
@@ -2028,6 +2037,9 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint3
__HAL_LOCK(htim);
+ if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
+ (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR7) ||
+ (InputTrigger == TIM_TS_ITR8))
{
/* Select the Input trigger */
htim->Instance->SMCR &= ~TIM_SMCR_TS;
diff --git a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_tsc.c b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_tsc.c
index d484dc17e7..f70c1ae4a7 100644
--- a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_tsc.c
+++ b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_hal_tsc.c
@@ -176,9 +176,16 @@
| PB14 (AF9) | TSC_G6_IO1 |
| PB13 (AF9) | TSC_G6_IO2 |
|--------------|-----------------|
+ |(*) PE3 (AF9) | TSC_G7_IO1 |
+ |(*) PE2 (AF9) | TSC_G7_IO2 |
+ |(*) PE1 (AF9) | TSC_G7_IO3 |
+ |(*) PE0 (AF9) | TSC_G7_IO4 |
+ |--------------|-----------------|
| PB12 (AF9) | TSC_SYNC |
+--------------------------------+
+ (*) not usable for all devices.
+
*/
/* Includes ------------------------------------------------------------------*/
diff --git a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_ll_adc.c b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_ll_adc.c
index 3ae9761b20..28674a794c 100644
--- a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_ll_adc.c
+++ b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_ll_adc.c
@@ -389,6 +389,14 @@ ErrorStatus LL_ADC_DeInit(ADC_TypeDef *ADCx)
/* Reset register SMPR */
CLEAR_BIT(ADCx->SMPR, ADC_SMPR_SMP1 | ADC_SMPR_SMP2 | ADC_SMPR_SMPSEL);
+ /* Reset register CHSELR */
+ CLEAR_BIT(ADCx->CHSELR,
+ (ADC_CHSELR_CHSEL13 | ADC_CHSELR_CHSEL12
+ | ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL9 | ADC_CHSELR_CHSEL8
+ | ADC_CHSELR_CHSEL7 | ADC_CHSELR_CHSEL6 | ADC_CHSELR_CHSEL5 | ADC_CHSELR_CHSEL4
+ | ADC_CHSELR_CHSEL3 | ADC_CHSELR_CHSEL2 | ADC_CHSELR_CHSEL1 | ADC_CHSELR_CHSEL0)
+ );
+
/* Reset register AWD1TR */
MODIFY_REG(ADCx->AWD1TR, ADC_AWD1TR_LT1 | ADC_AWD1TR_HT1, ADC_AWD1TR_HT1);
@@ -398,14 +406,6 @@ ErrorStatus LL_ADC_DeInit(ADC_TypeDef *ADCx)
/* Reset register AWD3TR */
MODIFY_REG(ADCx->AWD3TR, ADC_AWD3TR_LT3 | ADC_AWD3TR_HT3, ADC_AWD3TR_HT3);
- /* Reset register CHSELR */
- CLEAR_BIT(ADCx->CHSELR,
- (ADC_CHSELR_CHSEL13 | ADC_CHSELR_CHSEL12
- | ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL9 | ADC_CHSELR_CHSEL8
- | ADC_CHSELR_CHSEL7 | ADC_CHSELR_CHSEL6 | ADC_CHSELR_CHSEL5 | ADC_CHSELR_CHSEL4
- | ADC_CHSELR_CHSEL3 | ADC_CHSELR_CHSEL2 | ADC_CHSELR_CHSEL1 | ADC_CHSELR_CHSEL0)
- );
-
/* Reset register DR */
/* bits in access mode read only, no direct reset applicable */
diff --git a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_ll_rtc.c b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_ll_rtc.c
index 186bb215c9..ee73d0e847 100644
--- a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_ll_rtc.c
+++ b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_ll_rtc.c
@@ -161,9 +161,9 @@ ErrorStatus LL_RTC_DeInit(RTC_TypeDef *RTCx)
#if defined (RTC_PRIVCFGR_PRIV)
WRITE_REG(RTCx->PRIVCFGR, 0U);
#endif /* RTC_PRIVCFGR_PRIV */
-#if defined (RTC_SECCFGR_SEC)
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
WRITE_REG(RTCx->SECCFGR, 0U);
-#endif /* RTC_SECCFGR_SEC */
+#endif /* #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
/* Clear some bits of RTC_ICSR and exit Initialization mode */
CLEAR_BIT(RTCx->ICSR, RTC_ICSR_BCDU_Msk | RTC_ICSR_BIN_Msk | RTC_ICSR_INIT);
@@ -179,9 +179,9 @@ ErrorStatus LL_RTC_DeInit(RTC_TypeDef *RTCx)
WRITE_REG(TAMP->CR1, 0U);
WRITE_REG(TAMP->CR2, 0U);
WRITE_REG(TAMP->CR3, 0U);
-#if defined (TAMP_SECCFGR_TAMPSEC)
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
WRITE_REG(TAMP->SECCFGR, 0U);
-#endif /* TAMP_SECCFGR_TAMPSEC */
+#endif /* #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
#if defined (TAMP_PRIVCFGR_TAMPPRIV)
WRITE_REG(TAMP->PRIVCFGR, 0U);
#endif /* TAMP_PRIVCFGR_TAMPPRIV */
diff --git a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_ll_tim.c b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_ll_tim.c
index c347ac2c95..801e1740ba 100644
--- a/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_ll_tim.c
+++ b/system/Drivers/STM32WBAxx_HAL_Driver/Src/stm32wbaxx_ll_tim.c
@@ -66,8 +66,8 @@
|| ((__VALUE__) == LL_TIM_OCMODE_RETRIG_OPM2) \
|| ((__VALUE__) == LL_TIM_OCMODE_COMBINED_PWM1) \
|| ((__VALUE__) == LL_TIM_OCMODE_COMBINED_PWM2) \
- || ((__VALUE__) == LL_TIM_OCMODE_ASSYMETRIC_PWM1) \
- || ((__VALUE__) == LL_TIM_OCMODE_ASSYMETRIC_PWM2) \
+ || ((__VALUE__) == LL_TIM_OCMODE_ASYMMETRIC_PWM1) \
+ || ((__VALUE__) == LL_TIM_OCMODE_ASYMMETRIC_PWM2) \
|| ((__VALUE__) == LL_TIM_OCMODE_PULSE_ON_COMPARE) \
|| ((__VALUE__) == LL_TIM_OCMODE_DIRECTION_OUTPUT))
diff --git a/system/Drivers/STM32YYxx_HAL_Driver_version.md b/system/Drivers/STM32YYxx_HAL_Driver_version.md
index acc06cd3e9..83d50c2d5d 100644
--- a/system/Drivers/STM32YYxx_HAL_Driver_version.md
+++ b/system/Drivers/STM32YYxx_HAL_Driver_version.md
@@ -18,7 +18,7 @@
* STM32MP1: 1.6.0
* STM32U5: 1.5.0
* STM32WB: 1.14.2
- * STM32WBA: 1.2.0
+ * STM32WBA: 1.3.0
* STM32WL: 1.3.0
Release notes of each STM32YYxx HAL Drivers available here:
diff --git a/variants/STM32WBAxx/WBA50K(E-G)U/PeripheralPins.c b/variants/STM32WBAxx/WBA50K(E-G)U/PeripheralPins.c
index a9a00bad08..3d08eef75f 100644
--- a/variants/STM32WBAxx/WBA50K(E-G)U/PeripheralPins.c
+++ b/variants/STM32WBAxx/WBA50K(E-G)U/PeripheralPins.c
@@ -12,7 +12,7 @@
*/
/*
* Automatically generated from STM32WBA50KEUx.xml, STM32WBA50KGUx.xml
- * CubeMX DB release 6.0.100
+ * CubeMX DB release 6.0.110
*/
#if !defined(CUSTOM_PERIPHERAL_PINS)
#include "Arduino.h"
diff --git a/variants/STM32WBAxx/WBA52C(E-G)U_WBA54C(E-G)U_WBA55H(E-G)F/PeripheralPins.c b/variants/STM32WBAxx/WBA52C(E-G)U_WBA54C(E-G)U_WBA55H(E-G)F/PeripheralPins.c
index 4c99410f86..7d002a9278 100644
--- a/variants/STM32WBAxx/WBA52C(E-G)U_WBA54C(E-G)U_WBA55H(E-G)F/PeripheralPins.c
+++ b/variants/STM32WBAxx/WBA52C(E-G)U_WBA54C(E-G)U_WBA55H(E-G)F/PeripheralPins.c
@@ -14,7 +14,7 @@
* Automatically generated from STM32WBA52CEUx.xml, STM32WBA52CGUx.xml
* STM32WBA54CEUx.xml, STM32WBA54CGUx.xml
* STM32WBA55HEFx.xml, STM32WBA55HGFx.xml
- * CubeMX DB release 6.0.100
+ * CubeMX DB release 6.0.110
*/
#if !defined(CUSTOM_PERIPHERAL_PINS)
#include "Arduino.h"
diff --git a/variants/STM32WBAxx/WBA52K(E-G)U_WBA54K(E-G)U/PeripheralPins.c b/variants/STM32WBAxx/WBA52K(E-G)U_WBA54K(E-G)U/PeripheralPins.c
index a6aea956f6..5689ccca70 100644
--- a/variants/STM32WBAxx/WBA52K(E-G)U_WBA54K(E-G)U/PeripheralPins.c
+++ b/variants/STM32WBAxx/WBA52K(E-G)U_WBA54K(E-G)U/PeripheralPins.c
@@ -13,7 +13,7 @@
/*
* Automatically generated from STM32WBA52KEUx.xml, STM32WBA52KGUx.xml
* STM32WBA54KEUx.xml, STM32WBA54KGUx.xml
- * CubeMX DB release 6.0.100
+ * CubeMX DB release 6.0.110
*/
#if !defined(CUSTOM_PERIPHERAL_PINS)
#include "Arduino.h"
diff --git a/variants/STM32WBAxx/WBA55C(E-G)U/PeripheralPins.c b/variants/STM32WBAxx/WBA55C(E-G)U/PeripheralPins.c
index 547e19544b..7cdf8ad293 100644
--- a/variants/STM32WBAxx/WBA55C(E-G)U/PeripheralPins.c
+++ b/variants/STM32WBAxx/WBA55C(E-G)U/PeripheralPins.c
@@ -12,7 +12,7 @@
*/
/*
* Automatically generated from STM32WBA55CEUx.xml, STM32WBA55CGUx.xml
- * CubeMX DB release 6.0.100
+ * CubeMX DB release 6.0.110
*/
#if !defined(CUSTOM_PERIPHERAL_PINS)
#include "Arduino.h"
diff --git a/variants/STM32WBAxx/WBA55U(E-G)I/PeripheralPins.c b/variants/STM32WBAxx/WBA55U(E-G)I/PeripheralPins.c
index b06b23cf61..32b1b99350 100644
--- a/variants/STM32WBAxx/WBA55U(E-G)I/PeripheralPins.c
+++ b/variants/STM32WBAxx/WBA55U(E-G)I/PeripheralPins.c
@@ -12,7 +12,7 @@
*/
/*
* Automatically generated from STM32WBA55UEIx.xml, STM32WBA55UGIx.xml
- * CubeMX DB release 6.0.100
+ * CubeMX DB release 6.0.110
*/
#if !defined(CUSTOM_PERIPHERAL_PINS)
#include "Arduino.h"
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