-
Main Changes
+
Main Changes
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal.c
index a99a20e499..af11609879 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal.c
@@ -54,7 +54,7 @@
*/
#define __STM32F2xx_HAL_VERSION_MAIN 0x01U /*!< [31:24] main version */
#define __STM32F2xx_HAL_VERSION_SUB1 0x02U /*!< [23:16] sub1 version */
-#define __STM32F2xx_HAL_VERSION_SUB2 0x08U /*!< [15:8] sub2 version */
+#define __STM32F2xx_HAL_VERSION_SUB2 0x09U /*!< [15:8] sub2 version */
#define __STM32F2xx_HAL_VERSION_RC 0x00U /*!< [7:0] release candidate */
#define __STM32F2xx_HAL_VERSION ((__STM32F2xx_HAL_VERSION_MAIN << 24U)\
|(__STM32F2xx_HAL_VERSION_SUB1 << 16U)\
@@ -381,7 +381,7 @@ HAL_TickFreqTypeDef HAL_GetTickFreq(void)
* @param Delay specifies the delay time length, in milliseconds.
* @retval None
*/
-__weak void HAL_Delay(__IO uint32_t Delay)
+__weak void HAL_Delay(uint32_t Delay)
{
uint32_t tickstart = HAL_GetTick();
uint32_t wait = Delay;
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_can.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_can.c
index c43c873fec..6d565b554d 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_can.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_can.c
@@ -33,7 +33,7 @@
(++) Enable the CAN interface clock using __HAL_RCC_CANx_CLK_ENABLE()
(++) Configure CAN pins
(+++) Enable the clock for the CAN GPIOs
- (+++) Configure CAN pins as alternate function open-drain
+ (+++) Configure CAN pins as alternate function
(++) In case of using interrupts (e.g. HAL_CAN_ActivateNotification())
(+++) Configure the CAN interrupt priority using
HAL_NVIC_SetPriority()
@@ -235,6 +235,7 @@
* @{
*/
#define CAN_TIMEOUT_VALUE 10U
+#define CAN_WAKEUP_TIMEOUT_COUNTER 1000000U
/**
* @}
*/
@@ -248,8 +249,8 @@
*/
/** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions
- * @brief Initialization and Configuration functions
- *
+ * @brief Initialization and Configuration functions
+ *
@verbatim
==============================================================================
##### Initialization and de-initialization functions #####
@@ -328,7 +329,7 @@ HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan)
/* Init the low level hardware: CLOCK, NVIC */
HAL_CAN_MspInit(hcan);
}
-#endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
+#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
/* Request initialisation */
SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ);
@@ -482,7 +483,7 @@ HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan)
#else
/* DeInit the low level hardware: CLOCK, NVIC */
HAL_CAN_MspDeInit(hcan);
-#endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
+#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
/* Reset the CAN peripheral */
SET_BIT(hcan->Instance->MCR, CAN_MCR_RESET);
@@ -814,8 +815,8 @@ HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_Ca
*/
/** @defgroup CAN_Exported_Functions_Group2 Configuration functions
- * @brief Configuration functions.
- *
+ * @brief Configuration functions.
+ *
@verbatim
==============================================================================
##### Configuration functions #####
@@ -868,7 +869,7 @@ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_Filter
/* Check the parameters */
assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank));
-#endif
+#endif /* CAN3 */
/* Initialisation mode for the filter */
SET_BIT(can_ip->FMR, CAN_FMR_FINIT);
@@ -878,7 +879,7 @@ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_Filter
CLEAR_BIT(can_ip->FMR, CAN_FMR_CAN2SB);
SET_BIT(can_ip->FMR, sFilterConfig->SlaveStartFilterBank << CAN_FMR_CAN2SB_Pos);
-#endif
+#endif /* CAN3 */
/* Convert filter number into bit position */
filternbrbitpos = (uint32_t)1 << (sFilterConfig->FilterBank & 0x1FU);
@@ -970,8 +971,8 @@ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_Filter
*/
/** @defgroup CAN_Exported_Functions_Group3 Control functions
- * @brief Control functions
- *
+ * @brief Control functions
+ *
@verbatim
==============================================================================
##### Control functions #####
@@ -1143,7 +1144,6 @@ HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan)
HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan)
{
__IO uint32_t count = 0;
- uint32_t timeout = 1000000U;
HAL_CAN_StateTypeDef state = hcan->State;
if ((state == HAL_CAN_STATE_READY) ||
@@ -1159,15 +1159,14 @@ HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan)
count++;
/* Check if timeout is reached */
- if (count > timeout)
+ if (count > CAN_WAKEUP_TIMEOUT_COUNTER)
{
/* Update error code */
hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT;
return HAL_ERROR;
}
- }
- while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U);
+ } while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U);
/* Return function status */
return HAL_OK;
@@ -1608,8 +1607,8 @@ uint32_t HAL_CAN_GetRxFifoFillLevel(const CAN_HandleTypeDef *hcan, uint32_t RxFi
*/
/** @defgroup CAN_Exported_Functions_Group4 Interrupts management
- * @brief Interrupts management
- *
+ * @brief Interrupts management
+ *
@verbatim
==============================================================================
##### Interrupts management #####
@@ -2074,8 +2073,8 @@ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan)
*/
/** @defgroup CAN_Exported_Functions_Group5 Callback functions
- * @brief CAN Callback functions
- *
+ * @brief CAN Callback functions
+ *
@verbatim
==============================================================================
##### Callback functions #####
@@ -2324,8 +2323,8 @@ __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan)
*/
/** @defgroup CAN_Exported_Functions_Group6 Peripheral State and Error functions
- * @brief CAN Peripheral State functions
- *
+ * @brief CAN Peripheral State functions
+ *
@verbatim
==============================================================================
##### Peripheral State and Error functions #####
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_cortex.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_cortex.c
index 95398b6fac..2fe231c772 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_cortex.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_cortex.c
@@ -8,17 +8,6 @@
* + Initialization and de-initialization functions
* + Peripheral Control functions
*
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -77,6 +66,16 @@
@endverbatim
******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -291,6 +290,38 @@ void HAL_MPU_Enable(uint32_t MPU_Control)
__ISB();
}
+/**
+ * @brief Enable the MPU Region.
+ * @retval None
+ */
+void HAL_MPU_EnableRegion(uint32_t RegionNumber)
+{
+ /* Check the parameters */
+ assert_param(IS_MPU_REGION_NUMBER(RegionNumber));
+
+ /* Set the Region number */
+ MPU->RNR = RegionNumber;
+
+ /* Enable the Region */
+ SET_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
+}
+
+/**
+ * @brief Disable the MPU Region.
+ * @retval None
+ */
+void HAL_MPU_DisableRegion(uint32_t RegionNumber)
+{
+ /* Check the parameters */
+ assert_param(IS_MPU_REGION_NUMBER(RegionNumber));
+
+ /* Set the Region number */
+ MPU->RNR = RegionNumber;
+
+ /* Disable the Region */
+ CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
+}
+
/**
* @brief Initializes and configures the Region and the memory to be protected.
* @param MPU_Init Pointer to a MPU_Region_InitTypeDef structure that contains
@@ -302,38 +333,32 @@ void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
/* Check the parameters */
assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number));
assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable));
+ assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec));
+ assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission));
+ assert_param(IS_MPU_TEX_LEVEL(MPU_Init->TypeExtField));
+ assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable));
+ assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable));
+ assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
+ assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
+ assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));
/* Set the Region number */
MPU->RNR = MPU_Init->Number;
- if ((MPU_Init->Enable) != RESET)
- {
- /* Check the parameters */
- assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec));
- assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission));
- assert_param(IS_MPU_TEX_LEVEL(MPU_Init->TypeExtField));
- assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable));
- assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable));
- assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
- assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
- assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));
-
- MPU->RBAR = MPU_Init->BaseAddress;
- MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) |
- ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) |
- ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) |
- ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) |
- ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) |
- ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) |
- ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) |
- ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) |
- ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos);
- }
- else
- {
- MPU->RBAR = 0x00U;
- MPU->RASR = 0x00U;
- }
+ /* Disable the Region */
+ CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
+
+ /* Apply configuration */
+ MPU->RBAR = MPU_Init->BaseAddress;
+ MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) |
+ ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) |
+ ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) |
+ ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) |
+ ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) |
+ ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) |
+ ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) |
+ ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) |
+ ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos);
}
#endif /* __MPU_PRESENT */
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dac.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dac.c
index a27cc292e8..657a198255 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dac.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dac.c
@@ -938,10 +938,7 @@ uint32_t HAL_DAC_GetValue(const DAC_HandleTypeDef *hdac, uint32_t Channel)
uint32_t result;
/* Check the DAC peripheral handle */
- if (hdac == NULL)
- {
- return HAL_ERROR;
- }
+ assert_param(hdac != NULL);
/* Check the parameters */
assert_param(IS_DAC_CHANNEL(Channel));
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dac_ex.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dac_ex.c
index bc2c874af8..95c73a7c83 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dac_ex.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dac_ex.c
@@ -387,7 +387,6 @@ __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
}
-
/**
* @}
*/
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dcmi.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dcmi.c
index 98c70f4428..bdaf01a71f 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dcmi.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dcmi.c
@@ -10,6 +10,17 @@
* + Peripheral Control functions
* + Peripheral State and Error functions
*
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -26,7 +37,7 @@
Synchronization Mode, code of the frame delimiter and data width
using HAL_DCMI_Init() function.
- (#) Configure the DMA2_Stream1 channel1 to transfer Data from DCMI DR
+ (#) Configure the selected DMA stream to transfer Data from DCMI DR
register to the destination memory buffer.
(#) Program the required configuration through following parameters:
@@ -35,7 +46,7 @@
(#) Optionally, configure and Enable the CROP feature to select a rectangular
window from the received image using HAL_DCMI_ConfigCrop()
- and HAL_DCMI_EnableCROP() functions
+ and HAL_DCMI_EnableCrop() functions
(#) The capture can be stopped using HAL_DCMI_Stop() function.
@@ -65,33 +76,33 @@
Use functions HAL_DCMI_RegisterCallback() to register a user callback.
Function HAL_DCMI_RegisterCallback() allows to register following callbacks:
- (+) FrameEventCallback : DCMI Frame Event.
- (+) VsyncEventCallback : DCMI Vsync Event.
- (+) LineEventCallback : DCMI Line Event.
- (+) ErrorCallback : DCMI error.
- (+) MspInitCallback : DCMI MspInit.
- (+) MspDeInitCallback : DCMI MspDeInit.
- This function takes as parameters the HAL peripheral handle, the callback ID
+ (+) FrameEventCallback : callback for DCMI Frame Event.
+ (+) VsyncEventCallback : callback for DCMI Vsync Event.
+ (+) LineEventCallback : callback for DCMI Line Event.
+ (+) ErrorCallback : callback for DCMI error detection.
+ (+) MspInitCallback : callback for DCMI MspInit.
+ (+) MspDeInitCallback : callback for DCMI MspDeInit.
+ This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
Use function HAL_DCMI_UnRegisterCallback() to reset a callback to the default
- weak (surcharged) function.
+ weak (overridden) function.
HAL_DCMI_UnRegisterCallback() takes as parameters the HAL peripheral handle,
and the callback ID.
This function allows to reset following callbacks:
- (+) FrameEventCallback : DCMI Frame Event.
- (+) VsyncEventCallback : DCMI Vsync Event.
- (+) LineEventCallback : DCMI Line Event.
- (+) ErrorCallback : DCMI error.
- (+) MspInitCallback : DCMI MspInit.
- (+) MspDeInitCallback : DCMI MspDeInit.
+ (+) FrameEventCallback : callback for DCMI Frame Event.
+ (+) VsyncEventCallback : callback for DCMI Vsync Event.
+ (+) LineEventCallback : callback for DCMI Line Event.
+ (+) ErrorCallback : callback for DCMI error.
+ (+) MspInitCallback : callback for DCMI MspInit.
+ (+) MspDeInitCallback : callback for DCMI MspDeInit.
By default, after the HAL_DCMI_Init and if the state is HAL_DCMI_STATE_RESET
- all callbacks are reset to the corresponding legacy weak (surcharged) functions:
+ all callbacks are reset to the corresponding legacy weak (overridden) functions:
examples FrameEventCallback(), HAL_DCMI_ErrorCallback().
Exception done for MspInit and MspDeInit callbacks that are respectively
- reset to the legacy weak (surcharged) functions in the HAL_DCMI_Init
- and HAL_DCMI_DeInit only when these callbacks are null (not registered beforehand).
+ reset to the legacy weak (overridden) functions in the HAL_DCMI_Init
+ and HAL_DCMI_DeInit only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the HAL_DCMI_Init and HAL_DCMI_DeInit
keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
@@ -105,24 +116,16 @@
When the compilation define USE_HAL_DCMI_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registering feature is not available
- and weak (surcharged) callbacks are used.
+ and weak (overridden) callbacks are used.
@endverbatim
******************************************************************************
- * @attention
- *
- * Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f2xx_hal.h"
+#ifdef HAL_DCMI_MODULE_ENABLED
+#if defined (DCMI)
/** @addtogroup STM32F2xx_HAL_Driver
* @{
@@ -132,19 +135,35 @@
* @{
*/
-#ifdef HAL_DCMI_MODULE_ENABLED
-#if defined (DCMI)
-
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
+/** @defgroup DCMI_Private_Constants DCMI Private Constants
+ * @{
+ */
+
+/** @defgroup DCMI_Stop_TimeOut DCMI Stop Time Out
+ * @{
+ */
#define HAL_TIMEOUT_DCMI_STOP ((uint32_t)1000) /* Set timeout to 1s */
+/**
+ * @}
+ */
+/**
+ * @}
+ */
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
+/** @addtogroup DCMI_Private_Functions DCMI Private Functions
+ * @{
+ */
static void DCMI_DMAXferCplt(DMA_HandleTypeDef *hdma);
static void DCMI_DMAError(DMA_HandleTypeDef *hdma);
+/**
+ * @}
+ */
/* Exported functions --------------------------------------------------------*/
/** @defgroup DCMI_Exported_Functions DCMI Exported Functions
@@ -152,8 +171,8 @@ static void DCMI_DMAError(DMA_HandleTypeDef *hdma);
*/
/** @defgroup DCMI_Exported_Functions_Group1 Initialization and Configuration functions
- * @brief Initialization and Configuration functions
- *
+ * @brief Initialization and Configuration functions
+ *
@verbatim
===============================================================================
##### Initialization and Configuration functions #####
@@ -195,6 +214,7 @@ HAL_StatusTypeDef HAL_DCMI_Init(DCMI_HandleTypeDef *hdcmi)
{
/* Init the DCMI Callback settings */
#if (USE_HAL_DCMI_REGISTER_CALLBACKS == 1)
+ /* Reset callback pointers to the weak predefined callbacks */
hdcmi->FrameEventCallback = HAL_DCMI_FrameEventCallback; /* Legacy weak FrameEventCallback */
hdcmi->VsyncEventCallback = HAL_DCMI_VsyncEventCallback; /* Legacy weak VsyncEventCallback */
hdcmi->LineEventCallback = HAL_DCMI_LineEventCallback; /* Legacy weak LineEventCallback */
@@ -317,8 +337,8 @@ __weak void HAL_DCMI_MspDeInit(DCMI_HandleTypeDef *hdcmi)
* @}
*/
/** @defgroup DCMI_Exported_Functions_Group2 IO operation functions
- * @brief IO operation functions
- *
+ * @brief IO operation functions
+ *
@verbatim
===============================================================================
##### IO operation functions #####
@@ -344,8 +364,9 @@ __weak void HAL_DCMI_MspDeInit(DCMI_HandleTypeDef *hdcmi)
*/
HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef *hdcmi, uint32_t DCMI_Mode, uint32_t pData, uint32_t Length)
{
+ uint32_t tmp_length = Length;
/* Initialize the second memory address */
- uint32_t SecondMemAddress = 0;
+ uint32_t SecondMemAddress;
/* Check function parameters */
assert_param(IS_DCMI_CAPTURE_MODE(DCMI_Mode));
@@ -378,11 +399,18 @@ HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef *hdcmi, uint32_t DCMI_Mo
hdcmi->XferSize = 0;
hdcmi->pBuffPtr = 0;
- if (Length <= 0xFFFFU)
+ if (tmp_length <= 0xFFFFU)
{
/* Enable the DMA Stream */
- if (HAL_DMA_Start_IT(hdcmi->DMA_Handle, (uint32_t)&hdcmi->Instance->DR, (uint32_t)pData, Length) != HAL_OK)
+ if (HAL_DMA_Start_IT(hdcmi->DMA_Handle, (uint32_t)&hdcmi->Instance->DR, (uint32_t)pData, tmp_length) != HAL_OK)
{
+ /* Set Error Code */
+ hdcmi->ErrorCode = HAL_DCMI_ERROR_DMA;
+ /* Change DCMI state */
+ hdcmi->State = HAL_DCMI_STATE_READY;
+ /* Release Lock */
+ __HAL_UNLOCK(hdcmi);
+ /* Return function status */
return HAL_ERROR;
}
}
@@ -393,7 +421,7 @@ HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef *hdcmi, uint32_t DCMI_Mo
/* Initialize transfer parameters */
hdcmi->XferCount = 1;
- hdcmi->XferSize = Length;
+ hdcmi->XferSize = tmp_length;
hdcmi->pBuffPtr = pData;
/* Get the number of buffer */
@@ -408,11 +436,18 @@ HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef *hdcmi, uint32_t DCMI_Mo
hdcmi->XferTransferNumber = hdcmi->XferCount;
/* Update second memory address */
- SecondMemAddress = (uint32_t)(pData + (4 * hdcmi->XferSize));
+ SecondMemAddress = (uint32_t)(pData + (4U * hdcmi->XferSize));
/* Start DMA multi buffer transfer */
if (HAL_DMAEx_MultiBufferStart_IT(hdcmi->DMA_Handle, (uint32_t)&hdcmi->Instance->DR, (uint32_t)pData, SecondMemAddress, hdcmi->XferSize) != HAL_OK)
{
+ /* Set Error Code */
+ hdcmi->ErrorCode = HAL_DCMI_ERROR_DMA;
+ /* Change DCMI state */
+ hdcmi->State = HAL_DCMI_STATE_READY;
+ /* Release Lock */
+ __HAL_UNLOCK(hdcmi);
+ /* Return function status */
return HAL_ERROR;
}
}
@@ -435,7 +470,7 @@ HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef *hdcmi, uint32_t DCMI_Mo
*/
HAL_StatusTypeDef HAL_DCMI_Stop(DCMI_HandleTypeDef *hdcmi)
{
- register uint32_t count = HAL_TIMEOUT_DCMI_STOP * (SystemCoreClock / 8U / 1000U);
+ uint32_t count = HAL_TIMEOUT_DCMI_STOP * (SystemCoreClock / 8U / 1000U);
HAL_StatusTypeDef status = HAL_OK;
/* Process locked */
@@ -450,7 +485,8 @@ HAL_StatusTypeDef HAL_DCMI_Stop(DCMI_HandleTypeDef *hdcmi)
/* Check if the DCMI capture effectively disabled */
do
{
- if (count-- == 0U)
+ count-- ;
+ if (count == 0U)
{
/* Update error code */
hdcmi->ErrorCode |= HAL_DCMI_ERROR_TIMEOUT;
@@ -458,8 +494,7 @@ HAL_StatusTypeDef HAL_DCMI_Stop(DCMI_HandleTypeDef *hdcmi)
status = HAL_TIMEOUT;
break;
}
- }
- while ((hdcmi->Instance->CR & DCMI_CR_CAPTURE) != 0U);
+ } while ((hdcmi->Instance->CR & DCMI_CR_CAPTURE) != 0U);
/* Disable the DCMI */
__HAL_DCMI_DISABLE(hdcmi);
@@ -488,7 +523,7 @@ HAL_StatusTypeDef HAL_DCMI_Stop(DCMI_HandleTypeDef *hdcmi)
*/
HAL_StatusTypeDef HAL_DCMI_Suspend(DCMI_HandleTypeDef *hdcmi)
{
- register uint32_t count = HAL_TIMEOUT_DCMI_STOP * (SystemCoreClock / 8U / 1000U);
+ uint32_t count = HAL_TIMEOUT_DCMI_STOP * (SystemCoreClock / 8U / 1000U);
HAL_StatusTypeDef status = HAL_OK;
/* Process locked */
@@ -505,7 +540,8 @@ HAL_StatusTypeDef HAL_DCMI_Suspend(DCMI_HandleTypeDef *hdcmi)
/* Check if the DCMI capture effectively disabled */
do
{
- if (count-- == 0U)
+ count-- ;
+ if (count == 0U)
{
/* Update error code */
hdcmi->ErrorCode |= HAL_DCMI_ERROR_TIMEOUT;
@@ -516,8 +552,7 @@ HAL_StatusTypeDef HAL_DCMI_Suspend(DCMI_HandleTypeDef *hdcmi)
status = HAL_TIMEOUT;
break;
}
- }
- while ((hdcmi->Instance->CR & DCMI_CR_CAPTURE) != 0U);
+ } while ((hdcmi->Instance->CR & DCMI_CR_CAPTURE) != 0U);
}
/* Process Unlocked */
__HAL_UNLOCK(hdcmi);
@@ -542,7 +577,7 @@ HAL_StatusTypeDef HAL_DCMI_Resume(DCMI_HandleTypeDef *hdcmi)
/* Change DCMI state */
hdcmi->State = HAL_DCMI_STATE_BUSY;
- /* Disable Capture */
+ /* Enable Capture */
hdcmi->Instance->CR |= DCMI_CR_CAPTURE;
}
/* Process Unlocked */
@@ -578,7 +613,10 @@ void HAL_DCMI_IRQHandler(DCMI_HandleTypeDef *hdcmi)
hdcmi->DMA_Handle->XferAbortCallback = DCMI_DMAError;
/* Abort the DMA Transfer */
- (void)HAL_DMA_Abort_IT(hdcmi->DMA_Handle);
+ if (HAL_DMA_Abort_IT(hdcmi->DMA_Handle) != HAL_OK)
+ {
+ DCMI_DMAError(hdcmi->DMA_Handle);
+ }
}
/* Overflow interrupt management ********************************************/
if ((isr_value & DCMI_FLAG_OVRRI) == DCMI_FLAG_OVRRI)
@@ -679,6 +717,8 @@ __weak void HAL_DCMI_ErrorCallback(DCMI_HandleTypeDef *hdcmi)
*/
__weak void HAL_DCMI_LineEventCallback(DCMI_HandleTypeDef *hdcmi)
{
+ /* Prevent unused argument(s) compilation warning */
+ UNUSED(hdcmi);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_DCMI_LineEventCallback could be implemented in the user file
*/
@@ -721,8 +761,8 @@ __weak void HAL_DCMI_FrameEventCallback(DCMI_HandleTypeDef *hdcmi)
*/
/** @defgroup DCMI_Exported_Functions_Group3 Peripheral Control functions
- * @brief Peripheral Control functions
- *
+ * @brief Peripheral Control functions
+ *
@verbatim
===============================================================================
##### Peripheral Control functions #####
@@ -746,7 +786,8 @@ __weak void HAL_DCMI_FrameEventCallback(DCMI_HandleTypeDef *hdcmi)
* @param Y0 DCMI window Y offset
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_DCMI_ConfigCrop(DCMI_HandleTypeDef *hdcmi, uint32_t X0, uint32_t Y0, uint32_t XSize, uint32_t YSize)
+HAL_StatusTypeDef HAL_DCMI_ConfigCrop(DCMI_HandleTypeDef *hdcmi, uint32_t X0, uint32_t Y0, uint32_t XSize,
+ uint32_t YSize)
{
/* Process Locked */
__HAL_LOCK(hdcmi);
@@ -833,7 +874,7 @@ HAL_StatusTypeDef HAL_DCMI_EnableCrop(DCMI_HandleTypeDef *hdcmi)
* the embedded synchronization delimiters unmasks.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_DCMI_ConfigSyncUnmask(DCMI_HandleTypeDef *hdcmi, DCMI_SyncUnmaskTypeDef *SyncUnmask)
+HAL_StatusTypeDef HAL_DCMI_ConfigSyncUnmask(DCMI_HandleTypeDef *hdcmi, const DCMI_SyncUnmaskTypeDef *SyncUnmask)
{
/* Process Locked */
__HAL_LOCK(hdcmi);
@@ -861,8 +902,8 @@ HAL_StatusTypeDef HAL_DCMI_ConfigSyncUnmask(DCMI_HandleTypeDef *hdcmi, DCMI_Syn
*/
/** @defgroup DCMI_Exported_Functions_Group4 Peripheral State functions
- * @brief Peripheral State functions
- *
+ * @brief Peripheral State functions
+ *
@verbatim
===============================================================================
##### Peripheral State and Errors functions #####
@@ -882,32 +923,40 @@ HAL_StatusTypeDef HAL_DCMI_ConfigSyncUnmask(DCMI_HandleTypeDef *hdcmi, DCMI_Syn
* the configuration information for DCMI.
* @retval HAL state
*/
-HAL_DCMI_StateTypeDef HAL_DCMI_GetState(DCMI_HandleTypeDef *hdcmi)
+HAL_DCMI_StateTypeDef HAL_DCMI_GetState(const DCMI_HandleTypeDef *hdcmi)
{
return hdcmi->State;
}
/**
-* @brief Return the DCMI error code
-* @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
+ * @brief Return the DCMI error code
+ * @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
* the configuration information for DCMI.
-* @retval DCMI Error Code
-*/
-uint32_t HAL_DCMI_GetError(DCMI_HandleTypeDef *hdcmi)
+ * @retval DCMI Error Code
+ */
+uint32_t HAL_DCMI_GetError(const DCMI_HandleTypeDef *hdcmi)
{
return hdcmi->ErrorCode;
}
#if (USE_HAL_DCMI_REGISTER_CALLBACKS == 1)
/**
- * @brief DCMI Callback registering
- * @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
- * the configuration information for DCMI.
- * @param CallbackID dcmi Callback ID
- * @param pCallback pointer to DCMI_CallbackTypeDef structure
- * @retval status
+ * @brief Register a User DCMI Callback
+ * To be used instead of the weak predefined callback
+ * @param hdcmi DCMI handle
+ * @param CallbackID ID of the callback to be registered
+ * This parameter can be one of the following values:
+ * @arg @ref HAL_DCMI_LINE_EVENT_CB_ID Line Event callback ID
+ * @arg @ref HAL_DCMI_FRAME_EVENT_CB_ID Frame Event callback ID
+ * @arg @ref HAL_DCMI_VSYNC_EVENT_CB_ID Vsync Event callback ID
+ * @arg @ref HAL_DCMI_ERROR_CB_ID Error callback ID
+ * @arg @ref HAL_DCMI_MSPINIT_CB_ID MspInit callback ID
+ * @arg @ref HAL_DCMI_MSPDEINIT_CB_ID MspDeInit callback ID
+ * @param pCallback pointer to the Callback function
+ * @retval HAL status
*/
-HAL_StatusTypeDef HAL_DCMI_RegisterCallback(DCMI_HandleTypeDef *hdcmi, HAL_DCMI_CallbackIDTypeDef CallbackID, pDCMI_CallbackTypeDef pCallback)
+HAL_StatusTypeDef HAL_DCMI_RegisterCallback(DCMI_HandleTypeDef *hdcmi, HAL_DCMI_CallbackIDTypeDef CallbackID,
+ pDCMI_CallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@@ -987,10 +1036,18 @@ HAL_StatusTypeDef HAL_DCMI_RegisterCallback(DCMI_HandleTypeDef *hdcmi, HAL_DCMI_
}
/**
- * @brief DCMI Callback Unregistering
- * @param hdcmi dcmi handle
- * @param CallbackID dcmi Callback ID
- * @retval status
+ * @brief Unregister a DCMI Callback
+ * DCMI callback is redirected to the weak predefined callback
+ * @param hdcmi DCMI handle
+ * @param CallbackID ID of the callback to be registered
+ * This parameter can be one of the following values:
+ * @arg @ref HAL_DCMI_LINE_EVENT_CB_ID Line Event callback ID
+ * @arg @ref HAL_DCMI_FRAME_EVENT_CB_ID Frame Event callback ID
+ * @arg @ref HAL_DCMI_VSYNC_EVENT_CB_ID Vsync Event callback ID
+ * @arg @ref HAL_DCMI_ERROR_CB_ID Error callback ID
+ * @arg @ref HAL_DCMI_MSPINIT_CB_ID MspInit callback ID
+ * @arg @ref HAL_DCMI_MSPDEINIT_CB_ID MspDeInit callback ID
+ * @retval HAL status
*/
HAL_StatusTypeDef HAL_DCMI_UnRegisterCallback(DCMI_HandleTypeDef *hdcmi, HAL_DCMI_CallbackIDTypeDef CallbackID)
{
@@ -1005,15 +1062,15 @@ HAL_StatusTypeDef HAL_DCMI_UnRegisterCallback(DCMI_HandleTypeDef *hdcmi, HAL_DCM
break;
case HAL_DCMI_VSYNC_EVENT_CB_ID :
- hdcmi->VsyncEventCallback = HAL_DCMI_VsyncEventCallback; /* Legacy weak VsyncEventCallback */
+ hdcmi->VsyncEventCallback = HAL_DCMI_VsyncEventCallback; /* Legacy weak VsyncEventCallback */
break;
case HAL_DCMI_LINE_EVENT_CB_ID :
- hdcmi->LineEventCallback = HAL_DCMI_LineEventCallback; /* Legacy weak LineEventCallback */
+ hdcmi->LineEventCallback = HAL_DCMI_LineEventCallback; /* Legacy weak LineEventCallback */
break;
case HAL_DCMI_ERROR_CB_ID :
- hdcmi->ErrorCallback = HAL_DCMI_ErrorCallback; /* Legacy weak ErrorCallback */
+ hdcmi->ErrorCallback = HAL_DCMI_ErrorCallback; /* Legacy weak ErrorCallback */
break;
case HAL_DCMI_MSPINIT_CB_ID :
@@ -1067,52 +1124,65 @@ HAL_StatusTypeDef HAL_DCMI_UnRegisterCallback(DCMI_HandleTypeDef *hdcmi, HAL_DCM
/**
* @}
*/
+
+/**
+ * @}
+ */
+
/* Private functions ---------------------------------------------------------*/
/** @defgroup DCMI_Private_Functions DCMI Private Functions
* @{
*/
/**
-* @brief DMA conversion complete callback.
-* @param hdma pointer to a DMA_HandleTypeDef structure that contains
-* the configuration information for the specified DMA module.
-* @retval None
-*/
+ * @brief DMA conversion complete callback.
+ * @param hdma pointer to a DMA_HandleTypeDef structure that contains
+ * the configuration information for the specified DMA module.
+ * @retval None
+ */
static void DCMI_DMAXferCplt(DMA_HandleTypeDef *hdma)
{
- uint32_t tmp = 0;
+ uint32_t tmp ;
DCMI_HandleTypeDef *hdcmi = (DCMI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
- if (hdcmi->XferCount != 0)
+ if (hdcmi->XferCount != 0U)
{
/* Update memory 0 address location */
- tmp = ((hdcmi->DMA_Handle->Instance->CR) & DMA_SxCR_CT);
- if (((hdcmi->XferCount % 2) == 0) && (tmp != 0))
+ tmp = ((((DMA_Stream_TypeDef *)(hdcmi->DMA_Handle->Instance))->CR) & DMA_SxCR_CT);
+ if (((hdcmi->XferCount % 2U) == 0U) && (tmp != 0U))
{
- tmp = hdcmi->DMA_Handle->Instance->M0AR;
- HAL_DMAEx_ChangeMemory(hdcmi->DMA_Handle, (tmp + (8 * hdcmi->XferSize)), MEMORY0);
+ tmp = ((DMA_Stream_TypeDef *)(hdcmi->DMA_Handle->Instance))->M0AR;
+ (void)HAL_DMAEx_ChangeMemory(hdcmi->DMA_Handle, (tmp + (8U * hdcmi->XferSize)), MEMORY0);
hdcmi->XferCount--;
}
/* Update memory 1 address location */
- else if ((hdcmi->DMA_Handle->Instance->CR & DMA_SxCR_CT) == 0)
+ else if ((((DMA_Stream_TypeDef *)(hdcmi->DMA_Handle->Instance))->CR & DMA_SxCR_CT) == 0U)
{
- tmp = hdcmi->DMA_Handle->Instance->M1AR;
- HAL_DMAEx_ChangeMemory(hdcmi->DMA_Handle, (tmp + (8 * hdcmi->XferSize)), MEMORY1);
+ tmp = ((DMA_Stream_TypeDef *)(hdcmi->DMA_Handle->Instance))->M1AR;
+ (void)HAL_DMAEx_ChangeMemory(hdcmi->DMA_Handle, (tmp + (8U * hdcmi->XferSize)), MEMORY1);
hdcmi->XferCount--;
}
+ else
+ {
+ /* Nothing to do */
+ }
}
/* Update memory 0 address location */
- else if ((hdcmi->DMA_Handle->Instance->CR & DMA_SxCR_CT) != 0)
+ else if ((((DMA_Stream_TypeDef *)(hdcmi->DMA_Handle->Instance))->CR & DMA_SxCR_CT) != 0U)
{
- hdcmi->DMA_Handle->Instance->M0AR = hdcmi->pBuffPtr;
+ ((DMA_Stream_TypeDef *)(hdcmi->DMA_Handle->Instance))->M0AR = hdcmi->pBuffPtr;
}
/* Update memory 1 address location */
- else if ((hdcmi->DMA_Handle->Instance->CR & DMA_SxCR_CT) == 0)
+ else if ((((DMA_Stream_TypeDef *)(hdcmi->DMA_Handle->Instance))->CR & DMA_SxCR_CT) == 0U)
{
tmp = hdcmi->pBuffPtr;
- hdcmi->DMA_Handle->Instance->M1AR = (tmp + (4 * hdcmi->XferSize));
+ ((DMA_Stream_TypeDef *)(hdcmi->DMA_Handle->Instance))->M1AR = (tmp + (4U * hdcmi->XferSize));
hdcmi->XferCount = hdcmi->XferTransferNumber;
}
+ else
+ {
+ /* Nothing to do */
+ }
/* Check if the frame is transferred */
if (hdcmi->XferCount == hdcmi->XferTransferNumber)
@@ -1157,10 +1227,6 @@ static void DCMI_DMAError(DMA_HandleTypeDef *hdma)
}
-/**
- * @}
- */
-
/**
* @}
*/
@@ -1173,5 +1239,3 @@ static void DCMI_DMAError(DMA_HandleTypeDef *hdma)
/**
* @}
*/
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dcmi_ex.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dcmi_ex.c
index aa737d2930..77009818ad 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dcmi_ex.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dcmi_ex.c
@@ -30,4 +30,3 @@
/* Exported functions --------------------------------------------------------*/
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_flash.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_flash.c
index 5f145a6fba..9ef7a4da8c 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_flash.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_flash.c
@@ -215,9 +215,6 @@ HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint
HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
{
HAL_StatusTypeDef status = HAL_OK;
-
- /* Process Locked */
- __HAL_LOCK(&pFlash);
/* Check the parameters */
assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram));
@@ -362,9 +359,7 @@ void HAL_FLASH_IRQHandler(void)
/* Disable Error source interrupt */
__HAL_FLASH_DISABLE_IT(FLASH_IT_ERR);
-
- /* Process Unlocked */
- __HAL_UNLOCK(&pFlash);
+
}
}
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_flash_ex.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_flash_ex.c
index 3f0a8a72eb..aad856a423 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_flash_ex.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_flash_ex.c
@@ -205,9 +205,6 @@ HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
{
HAL_StatusTypeDef status = HAL_OK;
- /* Process Locked */
- __HAL_LOCK(&pFlash);
-
/* Check the parameters */
assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_hash.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_hash.c
index 6a72b3d2f7..8919c44760 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_hash.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_hash.c
@@ -119,7 +119,7 @@
(#) HAL in interruption mode (interruptions driven)
(##)Due to HASH peripheral hardware design, the peripheral interruption is triggered every 64 bytes.
- This is why, for driver implementation simplicity’s sake, user is requested to enter a message the
+ This is why, for driver implementation simplicity s sake, user is requested to enter a message the
length of which is a multiple of 4 bytes.
(##) When the message length (in bytes) is not a multiple of words, a specific field exists in HASH_STR
@@ -268,10 +268,10 @@
*/
static void HASH_DMAXferCplt(DMA_HandleTypeDef *hdma);
static void HASH_DMAError(DMA_HandleTypeDef *hdma);
-static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size);
+static void HASH_GetDigest(const uint8_t *pMsgDigest, uint8_t Size);
static HAL_StatusTypeDef HASH_WaitOnFlagUntilTimeout(HASH_HandleTypeDef *hhash, uint32_t Flag, FlagStatus Status,
uint32_t Timeout);
-static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
+static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size);
static HAL_StatusTypeDef HASH_IT(HASH_HandleTypeDef *hhash);
static uint32_t HASH_Write_Block_Data(HASH_HandleTypeDef *hhash);
static HAL_StatusTypeDef HMAC_Processing(HASH_HandleTypeDef *hhash, uint32_t Timeout);
@@ -751,7 +751,8 @@ HAL_StatusTypeDef HAL_HASH_UnRegisterCallback(HASH_HandleTypeDef *hhash, HAL_HAS
* @param Timeout Timeout value
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer,
+HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size,
+ uint8_t *pOutBuffer,
uint32_t Timeout)
{
return HASH_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_MD5);
@@ -777,7 +778,7 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuff
* @param Size length of the input buffer in bytes, must be a multiple of 4.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HASH_MD5_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
+HAL_StatusTypeDef HAL_HASH_MD5_Accmlt(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size)
{
return HASH_Accumulate(hhash, pInBuffer, Size, HASH_ALGOSELECTION_MD5);
}
@@ -792,7 +793,7 @@ HAL_StatusTypeDef HAL_HASH_MD5_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuf
* @param Timeout Timeout value
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size,
+HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size,
uint8_t *pOutBuffer, uint32_t Timeout)
{
return HASH_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_MD5);
@@ -809,7 +810,8 @@ HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pI
* @param Timeout Timeout value
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer,
+HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size,
+ uint8_t *pOutBuffer,
uint32_t Timeout)
{
return HASH_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA1);
@@ -835,7 +837,7 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuf
* @param Size length of the input buffer in bytes, must be a multiple of 4.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
+HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size)
{
return HASH_Accumulate(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA1);
}
@@ -850,7 +852,7 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBu
* @param Timeout Timeout value
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size,
+HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size,
uint8_t *pOutBuffer, uint32_t Timeout)
{
return HASH_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA1);
@@ -898,7 +900,7 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *p
* @param pOutBuffer pointer to the computed digest. Digest size is 16 bytes.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size,
+HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size,
uint8_t *pOutBuffer)
{
return HASH_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_MD5);
@@ -922,7 +924,7 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInB
* @param Size length of the input buffer in bytes, must be a multiple of 4.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
+HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size)
{
return HASH_Accumulate_IT(hhash, pInBuffer, Size, HASH_ALGOSELECTION_MD5);
}
@@ -936,7 +938,7 @@ HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn
* @param pOutBuffer pointer to the computed digest. Digest size is 16 bytes.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size,
+HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size,
uint8_t *pOutBuffer)
{
return HASH_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_MD5);
@@ -952,7 +954,7 @@ HAL_StatusTypeDef HAL_HASH_MD5_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t
* @param pOutBuffer pointer to the computed digest. Digest size is 20 bytes.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size,
+HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size,
uint8_t *pOutBuffer)
{
return HASH_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA1);
@@ -977,7 +979,7 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn
* @param Size length of the input buffer in bytes, must be a multiple of 4.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
+HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size)
{
return HASH_Accumulate_IT(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA1);
}
@@ -991,7 +993,7 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pI
* @param pOutBuffer pointer to the computed digest. Digest size is 20 bytes.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size,
+HAL_StatusTypeDef HAL_HASH_SHA1_Accmlt_End_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size,
uint8_t *pOutBuffer)
{
return HASH_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA1);
@@ -1060,7 +1062,7 @@ void HAL_HASH_IRQHandler(HASH_HandleTypeDef *hhash)
* @param Size length of the input buffer in bytes.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HASH_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
+HAL_StatusTypeDef HAL_HASH_MD5_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size)
{
return HASH_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_MD5);
}
@@ -1090,7 +1092,7 @@ HAL_StatusTypeDef HAL_HASH_MD5_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBu
* @param Size length of the input buffer in bytes.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HASH_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
+HAL_StatusTypeDef HAL_HASH_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size)
{
return HASH_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA1);
}
@@ -1147,7 +1149,8 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutB
* @param Timeout Timeout value.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer,
+HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size,
+ uint8_t *pOutBuffer,
uint32_t Timeout)
{
return HMAC_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_MD5);
@@ -1166,7 +1169,8 @@ HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuff
* @param Timeout Timeout value.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer,
+HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size,
+ uint8_t *pOutBuffer,
uint32_t Timeout)
{
return HMAC_Start(hhash, pInBuffer, Size, pOutBuffer, Timeout, HASH_ALGOSELECTION_SHA1);
@@ -1208,7 +1212,7 @@ HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuf
* @param pOutBuffer pointer to the computed digest. Digest size is 16 bytes.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HMAC_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size,
+HAL_StatusTypeDef HAL_HMAC_MD5_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size,
uint8_t *pOutBuffer)
{
return HMAC_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_MD5);
@@ -1226,7 +1230,7 @@ HAL_StatusTypeDef HAL_HMAC_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInB
* @param pOutBuffer pointer to the computed digest. Digest size is 20 bytes.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HMAC_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size,
+HAL_StatusTypeDef HAL_HMAC_SHA1_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size,
uint8_t *pOutBuffer)
{
return HMAC_Start_IT(hhash, pInBuffer, Size, pOutBuffer, HASH_ALGOSELECTION_SHA1);
@@ -1237,7 +1241,6 @@ HAL_StatusTypeDef HAL_HMAC_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn
*/
-
/** @defgroup HASH_Exported_Functions_Group7 HMAC processing functions in DMA mode
* @brief HMAC processing functions using DMA modes.
*
@@ -1274,7 +1277,7 @@ HAL_StatusTypeDef HAL_HMAC_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn
* @param Size length of the input buffer in bytes.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
+HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size)
{
return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_MD5);
}
@@ -1293,7 +1296,7 @@ HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pIn
* @param Size length of the input buffer in bytes.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
+HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size)
{
return HMAC_Start_DMA(hhash, pInBuffer, Size, HASH_ALGOSELECTION_SHA1);
}
@@ -1340,7 +1343,7 @@ HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pI
* @param hhash HASH handle.
* @retval HAL HASH state
*/
-HAL_HASH_StateTypeDef HAL_HASH_GetState(HASH_HandleTypeDef *hhash)
+HAL_HASH_StateTypeDef HAL_HASH_GetState(const HASH_HandleTypeDef *hhash)
{
return hhash->State;
}
@@ -1353,7 +1356,7 @@ HAL_HASH_StateTypeDef HAL_HASH_GetState(HASH_HandleTypeDef *hhash)
* @param hhash HASH handle.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HASH_GetStatus(HASH_HandleTypeDef *hhash)
+HAL_StatusTypeDef HAL_HASH_GetStatus(const HASH_HandleTypeDef *hhash)
{
return hhash->Status;
}
@@ -1591,7 +1594,7 @@ HAL_StatusTypeDef HAL_HASH_DMAFeed_ProcessSuspend(HASH_HandleTypeDef *hhash)
* @param hhash pointer to a HASH_HandleTypeDef structure.
* @retval HASH Error Code
*/
-uint32_t HAL_HASH_GetError(HASH_HandleTypeDef *hhash)
+uint32_t HAL_HASH_GetError(const HASH_HandleTypeDef *hhash)
{
/* Return HASH Error Code */
return hhash->ErrorCode;
@@ -1785,12 +1788,13 @@ static void HASH_DMAError(DMA_HandleTypeDef *hdma)
* suspension time is stored in the handle for resumption later on.
* @retval HAL status
*/
-static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
+static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size)
{
uint32_t buffercounter;
__IO uint32_t inputaddr = (uint32_t) pInBuffer;
+ uint32_t tmp;
- for (buffercounter = 0U; buffercounter < Size; buffercounter += 4U)
+ for (buffercounter = 0U; buffercounter < (Size / 4U); buffercounter++)
{
/* Write input data 4 bytes at a time */
HASH->DIN = *(uint32_t *)inputaddr;
@@ -1798,8 +1802,16 @@ static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInB
/* If the suspension flag has been raised and if the processing is not about
to end, suspend processing */
- if ((hhash->SuspendRequest == HAL_HASH_SUSPEND) && ((buffercounter + 4U) < Size))
+ if ((hhash->SuspendRequest == HAL_HASH_SUSPEND) && (((buffercounter * 4U) + 4U) < Size))
{
+ /* wait for flag BUSY not set before Wait for DINIS = 1*/
+ if ((buffercounter * 4U) >= 64U)
+ {
+ if (HASH_WaitOnFlagUntilTimeout(hhash, HASH_FLAG_BUSY, SET, HASH_TIMEOUTVALUE) != HAL_OK)
+ {
+ return HAL_TIMEOUT;
+ }
+ }
/* Wait for DINIS = 1, which occurs when 16 32-bit locations are free
in the input buffer */
if (__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS))
@@ -1814,14 +1826,14 @@ static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInB
/* Save current reading and writing locations of Input and Output buffers */
hhash->pHashInBuffPtr = (uint8_t *)inputaddr;
/* Save the number of bytes that remain to be processed at this point */
- hhash->HashInCount = Size - (buffercounter + 4U);
+ hhash->HashInCount = Size - ((buffercounter * 4U) + 4U);
}
else if ((hhash->Phase == HAL_HASH_PHASE_HMAC_STEP_1) || (hhash->Phase == HAL_HASH_PHASE_HMAC_STEP_3))
{
/* Save current reading and writing locations of Input and Output buffers */
hhash->pHashKeyBuffPtr = (uint8_t *)inputaddr;
/* Save the number of bytes that remain to be processed at this point */
- hhash->HashKeyCount = Size - (buffercounter + 4U);
+ hhash->HashKeyCount = Size - ((buffercounter * 4U) + 4U);
}
else
{
@@ -1840,6 +1852,51 @@ static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInB
} /* for(buffercounter = 0; buffercounter < Size; buffercounter+=4) */
/* At this point, all the data have been entered to the Peripheral: exit */
+
+ if ((Size % 4U) != 0U)
+ {
+ if (hhash->Init.DataType == HASH_DATATYPE_16B)
+ {
+ /* Write remaining input data */
+
+ if ((Size % 4U) <= 2U)
+ {
+ HASH->DIN = (uint32_t) * (uint16_t *)inputaddr;
+ }
+ if ((Size % 4U) == 3U)
+ {
+ HASH->DIN = *(uint32_t *)inputaddr;
+ }
+
+ }
+ else if ((hhash->Init.DataType == HASH_DATATYPE_8B)
+ || (hhash->Init.DataType == HASH_DATATYPE_1B)) /* byte swap or bit swap or */
+ {
+ /* Write remaining input data */
+ if ((Size % 4U) == 1U)
+ {
+ HASH->DIN = (uint32_t) * (uint8_t *)inputaddr;
+ }
+ if ((Size % 4U) == 2U)
+ {
+ HASH->DIN = (uint32_t) * (uint16_t *)inputaddr;
+ }
+ if ((Size % 4U) == 3U)
+ {
+ tmp = *(uint8_t *)inputaddr;
+ tmp |= (uint32_t) * (uint8_t *)(inputaddr + 1U) << 8U;
+ tmp |= (uint32_t) * (uint8_t *)(inputaddr + 2U) << 16U;
+ HASH->DIN = tmp;
+ }
+
+ }
+ else
+ {
+ HASH->DIN = *(uint32_t *)inputaddr;
+ }
+ }
+
+
return HAL_OK;
}
@@ -1849,7 +1906,7 @@ static HAL_StatusTypeDef HASH_WriteData(HASH_HandleTypeDef *hhash, uint8_t *pInB
* @param Size message digest size in bytes.
* @retval None
*/
-static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size)
+static void HASH_GetDigest(const uint8_t *pMsgDigest, uint8_t Size)
{
uint32_t msgdigest = (uint32_t)pMsgDigest;
@@ -1882,7 +1939,6 @@ static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size)
}
-
/**
* @brief Handle HASH processing Timeout.
* @param hhash HASH handle.
@@ -2368,10 +2424,11 @@ static HAL_StatusTypeDef HMAC_Processing(HASH_HandleTypeDef *hhash, uint32_t Tim
* @param Algorithm HASH algorithm.
* @retval HAL status
*/
-HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer,
+HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size,
+ uint8_t *pOutBuffer,
uint32_t Timeout, uint32_t Algorithm)
{
- uint8_t *pInBuffer_tmp; /* input data address, input parameter of HASH_WriteData() */
+ const uint8_t *pInBuffer_tmp; /* input data address, input parameter of HASH_WriteData() */
uint32_t Size_tmp; /* input data size (in bytes), input parameter of HASH_WriteData() */
HAL_HASH_StateTypeDef State_tmp = hhash->State;
@@ -2403,7 +2460,7 @@ HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint
/* pInBuffer_tmp and Size_tmp are initialized to be used afterwards as
input parameters of HASH_WriteData() */
- pInBuffer_tmp = pInBuffer; /* pInBuffer_tmp is set to the input data address */
+ pInBuffer_tmp = (const uint8_t *)pInBuffer; /* pInBuffer_tmp is set to the input data address */
Size_tmp = Size; /* Size_tmp contains the input data size in bytes */
/* Set the phase */
@@ -2419,7 +2476,7 @@ HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint
/* Since this is resumption, pInBuffer_tmp and Size_tmp are not set
to the API input parameters but to those saved beforehand by HASH_WriteData()
when the processing was suspended */
- pInBuffer_tmp = hhash->pHashInBuffPtr;
+ pInBuffer_tmp = (const uint8_t *)hhash->pHashInBuffPtr;
Size_tmp = hhash->HashInCount;
}
/* ... or multi-buffer HASH processing end */
@@ -2427,7 +2484,7 @@ HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint
{
/* pInBuffer_tmp and Size_tmp are initialized to be used afterwards as
input parameters of HASH_WriteData() */
- pInBuffer_tmp = pInBuffer;
+ pInBuffer_tmp = (const uint8_t *)pInBuffer;
Size_tmp = Size;
/* Configure the number of valid bits in last word of the message */
__HAL_HASH_SET_NBVALIDBITS(Size);
@@ -2505,9 +2562,10 @@ HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint
* @param Algorithm HASH algorithm.
* @retval HAL status
*/
-HAL_StatusTypeDef HASH_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm)
+HAL_StatusTypeDef HASH_Accumulate(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size,
+ uint32_t Algorithm)
{
- uint8_t *pInBuffer_tmp; /* input data address, input parameter of HASH_WriteData() */
+ const uint8_t *pInBuffer_tmp; /* input data address, input parameter of HASH_WriteData() */
uint32_t Size_tmp; /* input data size (in bytes), input parameter of HASH_WriteData() */
HAL_HASH_StateTypeDef State_tmp = hhash->State;
@@ -2539,7 +2597,7 @@ HAL_StatusTypeDef HASH_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer,
/* Since this is resumption, pInBuffer_tmp and Size_tmp are not set
to the API input parameters but to those saved beforehand by HASH_WriteData()
when the processing was suspended */
- pInBuffer_tmp = hhash->pHashInBuffPtr; /* pInBuffer_tmp is set to the input data address */
+ pInBuffer_tmp = (const uint8_t *)hhash->pHashInBuffPtr; /* pInBuffer_tmp is set to the input data address */
Size_tmp = hhash->HashInCount; /* Size_tmp contains the input data size in bytes */
}
@@ -2550,7 +2608,7 @@ HAL_StatusTypeDef HASH_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer,
/* pInBuffer_tmp and Size_tmp are initialized to be used afterwards as
input parameters of HASH_WriteData() */
- pInBuffer_tmp = pInBuffer; /* pInBuffer_tmp is set to the input data address */
+ pInBuffer_tmp = (const uint8_t *)pInBuffer; /* pInBuffer_tmp is set to the input data address */
Size_tmp = Size; /* Size_tmp contains the input data size in bytes */
/* Check if initialization phase has already be performed */
@@ -2608,7 +2666,8 @@ HAL_StatusTypeDef HASH_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer,
* @param Algorithm HASH algorithm.
* @retval HAL status
*/
-HAL_StatusTypeDef HASH_Accumulate_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm)
+HAL_StatusTypeDef HASH_Accumulate_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size,
+ uint32_t Algorithm)
{
HAL_HASH_StateTypeDef State_tmp = hhash->State;
__IO uint32_t inputaddr = (uint32_t) pInBuffer;
@@ -2718,7 +2777,6 @@ HAL_StatusTypeDef HASH_Accumulate_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuff
}
-
/**
* @brief Initialize the HASH peripheral, next process pInBuffer then
* read the computed digest in interruption mode.
@@ -2730,7 +2788,8 @@ HAL_StatusTypeDef HASH_Accumulate_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuff
* @param Algorithm HASH algorithm.
* @retval HAL status
*/
-HAL_StatusTypeDef HASH_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer,
+HAL_StatusTypeDef HASH_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size,
+ uint8_t *pOutBuffer,
uint32_t Algorithm)
{
HAL_HASH_StateTypeDef State_tmp = hhash->State;
@@ -2779,6 +2838,19 @@ HAL_StatusTypeDef HASH_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, u
hhash->pHashOutBuffPtr = pOutBuffer; /* Points at the computed digest */
}
+ else if ((hhash->Phase == HAL_HASH_PHASE_PROCESS) && (SizeVar < 4U))
+ {
+ if (__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS))
+ {
+ /* It remains data to enter and the Peripheral is ready to trigger DINIE,carry on as usual.
+ Update HashInCount and pHashInBuffPtr accordingly. */
+ hhash->HashInCount = SizeVar;
+ hhash->pHashInBuffPtr = (uint8_t *)inputaddr;
+ /* Update the configuration of the number of valid bits in last word of the message */
+ __HAL_HASH_SET_NBVALIDBITS(SizeVar);
+ hhash->pHashOutBuffPtr = pOutBuffer; /* Points at the computed digest */
+ }
+ }
else
{
initialization_skipped = 1; /* info user later on in case of multi-buffer */
@@ -2882,7 +2954,8 @@ HAL_StatusTypeDef HASH_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, u
* @param Algorithm HASH algorithm.
* @retval HAL status
*/
-HAL_StatusTypeDef HASH_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm)
+HAL_StatusTypeDef HASH_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size,
+ uint32_t Algorithm)
{
uint32_t inputaddr;
uint32_t inputSize;
@@ -3054,7 +3127,8 @@ HAL_StatusTypeDef HASH_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBuffer, ui
* @param Algorithm HASH algorithm.
* @retval HAL status
*/
-HAL_StatusTypeDef HMAC_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer,
+HAL_StatusTypeDef HMAC_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size,
+ uint8_t *pOutBuffer,
uint32_t Timeout, uint32_t Algorithm)
{
HAL_HASH_StateTypeDef State_tmp = hhash->State;
@@ -3118,7 +3192,6 @@ HAL_StatusTypeDef HMAC_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint
}
-
/**
* @brief Initialize the HASH peripheral in HMAC mode, next process pInBuffer then
* read the computed digest in interruption mode.
@@ -3132,7 +3205,8 @@ HAL_StatusTypeDef HMAC_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint
* @param Algorithm HASH algorithm.
* @retval HAL status
*/
-HAL_StatusTypeDef HMAC_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t *pOutBuffer,
+HAL_StatusTypeDef HMAC_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size,
+ uint8_t *pOutBuffer,
uint32_t Algorithm)
{
HAL_HASH_StateTypeDef State_tmp = hhash->State;
@@ -3227,7 +3301,6 @@ HAL_StatusTypeDef HMAC_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, u
}
-
/**
* @brief Initialize the HASH peripheral in HMAC mode then initiate the required
* DMA transfers to feed the key and the input buffer to the Peripheral.
@@ -3243,7 +3316,8 @@ HAL_StatusTypeDef HMAC_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, u
* @param Algorithm HASH algorithm.
* @retval HAL status
*/
-HAL_StatusTypeDef HMAC_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm)
+HAL_StatusTypeDef HMAC_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size,
+ uint32_t Algorithm)
{
uint32_t inputaddr;
uint32_t inputSize;
@@ -3362,7 +3436,7 @@ HAL_StatusTypeDef HMAC_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer,
/* Enable the DMA In DMA stream */
status = HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, \
(((inputSize % 4U) != 0U) ? ((inputSize + (4U - (inputSize % 4U))) / 4U) \
- : (inputSize / 4U)));
+ : (inputSize / 4U)));
/* Enable DMA requests */
SET_BIT(HASH->CR, HASH_CR_DMAE);
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_hcd.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_hcd.c
index 47603637a9..8df2d18af0 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_hcd.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_hcd.c
@@ -109,7 +109,9 @@ static void HCD_Port_IRQHandler(HCD_HandleTypeDef *hhcd);
*/
HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd)
{
- USB_OTG_GlobalTypeDef *USBx;
+#if defined (USB_OTG_FS)
+ const USB_OTG_GlobalTypeDef *USBx;
+#endif /* defined (USB_OTG_FS) */
/* Check the HCD handle allocation */
if (hhcd == NULL)
@@ -120,7 +122,9 @@ HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd)
/* Check the parameters */
assert_param(IS_HCD_ALL_INSTANCE(hhcd->Instance));
+#if defined (USB_OTG_FS)
USBx = hhcd->Instance;
+#endif /* defined (USB_OTG_FS) */
if (hhcd->State == HAL_HCD_STATE_RESET)
{
@@ -150,23 +154,37 @@ HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd)
hhcd->State = HAL_HCD_STATE_BUSY;
+#if defined (USB_OTG_FS)
/* Disable DMA mode for FS instance */
- if ((USBx->CID & (0x1U << 8)) == 0U)
+ if (USBx == USB_OTG_FS)
{
hhcd->Init.dma_enable = 0U;
}
+#endif /* defined (USB_OTG_FS) */
/* Disable the Interrupts */
__HAL_HCD_DISABLE(hhcd);
/* Init the Core (common init.) */
- (void)USB_CoreInit(hhcd->Instance, hhcd->Init);
+ if (USB_CoreInit(hhcd->Instance, hhcd->Init) != HAL_OK)
+ {
+ hhcd->State = HAL_HCD_STATE_ERROR;
+ return HAL_ERROR;
+ }
- /* Force Host Mode*/
- (void)USB_SetCurrentMode(hhcd->Instance, USB_HOST_MODE);
+ /* Force Host Mode */
+ if (USB_SetCurrentMode(hhcd->Instance, USB_HOST_MODE) != HAL_OK)
+ {
+ hhcd->State = HAL_HCD_STATE_ERROR;
+ return HAL_ERROR;
+ }
/* Init Host */
- (void)USB_HostInit(hhcd->Instance, hhcd->Init);
+ if (USB_HostInit(hhcd->Instance, hhcd->Init) != HAL_OK)
+ {
+ hhcd->State = HAL_HCD_STATE_ERROR;
+ return HAL_ERROR;
+ }
hhcd->State = HAL_HCD_STATE_READY;
@@ -1261,7 +1279,7 @@ HAL_StatusTypeDef HAL_HCD_HC_ClearHubInfo(HCD_HandleTypeDef *hhcd, uint8_t ch_nu
*/
static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
{
- USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
+ const USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t tmpreg;
@@ -1580,7 +1598,7 @@ static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
*/
static void HCD_HC_OUT_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
{
- USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
+ const USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t tmpreg;
uint32_t num_packets;
@@ -1815,7 +1833,7 @@ static void HCD_HC_OUT_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
*/
static void HCD_RXQLVL_IRQHandler(HCD_HandleTypeDef *hhcd)
{
- USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
+ const USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t pktsts;
uint32_t pktcnt;
@@ -1881,7 +1899,7 @@ static void HCD_RXQLVL_IRQHandler(HCD_HandleTypeDef *hhcd)
*/
static void HCD_Port_IRQHandler(HCD_HandleTypeDef *hhcd)
{
- USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
+ const USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
uint32_t USBx_BASE = (uint32_t)USBx;
__IO uint32_t hprt0;
__IO uint32_t hprt0_dup;
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_i2c.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_i2c.c
index 48eef2f098..af00307527 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_i2c.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_i2c.c
@@ -89,7 +89,7 @@
add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
add his own code by customization of function pointer HAL_I2C_ErrorCallback()
- (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
+ (+) Abort a master or memory I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
(+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
@@ -139,7 +139,7 @@
or using HAL_I2C_Master_Seq_Receive_DMA()
(+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
- (++) Abort a master IT or DMA I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
+ (++) Abort a master or memory IT or DMA I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
(+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
(++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT()
@@ -193,7 +193,7 @@
add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
add his own code by customization of function pointer HAL_I2C_ErrorCallback()
- (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
+ (+) Abort a master or memory I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
(+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
@@ -2831,6 +2831,11 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress,
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
{
+ if (hi2c->XferSize == 3U)
+ {
+ /* Disable Acknowledge */
+ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
+ }
/* Read data from DR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
@@ -4708,7 +4713,7 @@ HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
}
/**
- * @brief Abort a master I2C IT or DMA process communication with Interrupt.
+ * @brief Abort a master or memory I2C IT or DMA process communication with Interrupt.
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for the specified I2C.
* @param DevAddress Target device address: The device 7 bits address value
@@ -4724,7 +4729,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevA
UNUSED(DevAddress);
/* Abort Master transfer during Receive or Transmit process */
- if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET) && (CurrentMode == HAL_I2C_MODE_MASTER))
+ if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET) && ((CurrentMode == HAL_I2C_MODE_MASTER) ||
+ (CurrentMode == HAL_I2C_MODE_MEM)))
{
/* Process Locked */
__HAL_LOCK(hi2c);
@@ -5516,7 +5522,9 @@ static void I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
{
uint32_t tmp;
+ uint32_t CurrentXferOptions;
+ CurrentXferOptions = hi2c->XferOptions;
tmp = hi2c->XferCount;
if (tmp > 3U)
{
@@ -5572,7 +5580,14 @@ static void I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
else
{
hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
+ if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME))
+ {
+ hi2c->PreviousState = I2C_STATE_NONE;
+ }
+ else
+ {
+ hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
+ }
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
hi2c->MasterRxCpltCallback(hi2c);
@@ -5675,15 +5690,11 @@ static void I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
/* Enable Acknowledge */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
}
- else if (CurrentXferOptions != I2C_LAST_FRAME_NO_STOP)
+ else
{
/* Generate Stop */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
}
- else
- {
- /* Do nothing */
- }
/* Read data from DR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
@@ -5720,7 +5731,14 @@ static void I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
else
{
hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
+ if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME))
+ {
+ hi2c->PreviousState = I2C_STATE_NONE;
+ }
+ else
+ {
+ hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
+ }
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
hi2c->MasterRxCpltCallback(hi2c);
#else
@@ -7028,7 +7046,14 @@ static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma)
else
{
hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
+ if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME))
+ {
+ hi2c->PreviousState = I2C_STATE_NONE;
+ }
+ else
+ {
+ hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
+ }
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
hi2c->MasterRxCpltCallback(hi2c);
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_i2s.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_i2s.c
index 3f891a67b6..af307e4b6a 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_i2s.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_i2s.c
@@ -796,15 +796,14 @@ HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uin
return HAL_ERROR;
}
- /* Process Locked */
- __HAL_LOCK(hi2s);
-
if (hi2s->State != HAL_I2S_STATE_READY)
{
- __HAL_UNLOCK(hi2s);
return HAL_BUSY;
}
+ /* Process Locked */
+ __HAL_LOCK(hi2s);
+
/* Set state and reset error code */
hi2s->State = HAL_I2S_STATE_BUSY_TX;
hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
@@ -915,15 +914,14 @@ HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint
return HAL_ERROR;
}
- /* Process Locked */
- __HAL_LOCK(hi2s);
-
if (hi2s->State != HAL_I2S_STATE_READY)
{
- __HAL_UNLOCK(hi2s);
return HAL_BUSY;
}
+ /* Process Locked */
+ __HAL_LOCK(hi2s);
+
/* Set state and reset error code */
hi2s->State = HAL_I2S_STATE_BUSY_RX;
hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
@@ -1013,15 +1011,14 @@ HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData,
return HAL_ERROR;
}
- /* Process Locked */
- __HAL_LOCK(hi2s);
-
if (hi2s->State != HAL_I2S_STATE_READY)
{
- __HAL_UNLOCK(hi2s);
return HAL_BUSY;
}
+ /* Process Locked */
+ __HAL_LOCK(hi2s);
+
/* Set state and reset error code */
hi2s->State = HAL_I2S_STATE_BUSY_TX;
hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
@@ -1040,6 +1037,8 @@ HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData,
hi2s->TxXferCount = Size;
}
+ __HAL_UNLOCK(hi2s);
+
/* Enable TXE and ERR interrupt */
__HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
@@ -1050,7 +1049,6 @@ HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData,
__HAL_I2S_ENABLE(hi2s);
}
- __HAL_UNLOCK(hi2s);
return HAL_OK;
}
@@ -1079,15 +1077,14 @@ HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, u
return HAL_ERROR;
}
- /* Process Locked */
- __HAL_LOCK(hi2s);
-
if (hi2s->State != HAL_I2S_STATE_READY)
{
- __HAL_UNLOCK(hi2s);
return HAL_BUSY;
}
+ /* Process Locked */
+ __HAL_LOCK(hi2s);
+
/* Set state and reset error code */
hi2s->State = HAL_I2S_STATE_BUSY_RX;
hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
@@ -1106,6 +1103,8 @@ HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, u
hi2s->RxXferCount = Size;
}
+ __HAL_UNLOCK(hi2s);
+
/* Enable RXNE and ERR interrupt */
__HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
@@ -1116,7 +1115,6 @@ HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, u
__HAL_I2S_ENABLE(hi2s);
}
- __HAL_UNLOCK(hi2s);
return HAL_OK;
}
@@ -1143,15 +1141,14 @@ HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData,
return HAL_ERROR;
}
- /* Process Locked */
- __HAL_LOCK(hi2s);
-
if (hi2s->State != HAL_I2S_STATE_READY)
{
- __HAL_UNLOCK(hi2s);
return HAL_BUSY;
}
+ /* Process Locked */
+ __HAL_LOCK(hi2s);
+
/* Set state and reset error code */
hi2s->State = HAL_I2S_STATE_BUSY_TX;
hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
@@ -1193,12 +1190,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData,
return HAL_ERROR;
}
- /* Check if the I2S is already enabled */
- if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
- {
- /* Enable I2S peripheral */
- __HAL_I2S_ENABLE(hi2s);
- }
+ __HAL_UNLOCK(hi2s);
/* Check if the I2S Tx request is already enabled */
if (HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_TXDMAEN))
@@ -1207,7 +1199,13 @@ HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData,
SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
}
- __HAL_UNLOCK(hi2s);
+ /* Check if the I2S is already enabled */
+ if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
+ {
+ /* Enable I2S peripheral */
+ __HAL_I2S_ENABLE(hi2s);
+ }
+
return HAL_OK;
}
@@ -1234,15 +1232,14 @@ HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData,
return HAL_ERROR;
}
- /* Process Locked */
- __HAL_LOCK(hi2s);
-
if (hi2s->State != HAL_I2S_STATE_READY)
{
- __HAL_UNLOCK(hi2s);
return HAL_BUSY;
}
+ /* Process Locked */
+ __HAL_LOCK(hi2s);
+
/* Set state and reset error code */
hi2s->State = HAL_I2S_STATE_BUSY_RX;
hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
@@ -1290,12 +1287,7 @@ HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData,
return HAL_ERROR;
}
- /* Check if the I2S is already enabled */
- if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
- {
- /* Enable I2S peripheral */
- __HAL_I2S_ENABLE(hi2s);
- }
+ __HAL_UNLOCK(hi2s);
/* Check if the I2S Rx request is already enabled */
if (HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_RXDMAEN))
@@ -1304,7 +1296,13 @@ HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData,
SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
}
- __HAL_UNLOCK(hi2s);
+ /* Check if the I2S is already enabled */
+ if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
+ {
+ /* Enable I2S peripheral */
+ __HAL_I2S_ENABLE(hi2s);
+ }
+
return HAL_OK;
}
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_iwdg.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_iwdg.c
index 89d06006e7..d9878d03f4 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_iwdg.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_iwdg.c
@@ -91,7 +91,6 @@
the reload register
@endverbatim
- ******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -121,7 +120,8 @@
The timeout value is multiplied by 1000 to be converted in milliseconds.
LSI startup time is also considered here by adding LSI_STARTUP_TIME
converted in milliseconds. */
-#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL))
+#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / (LSI_VALUE / 128U)) + \
+ ((LSI_STARTUP_TIME / 1000UL) + 1UL))
#define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_RVU | IWDG_SR_PVU)
/**
* @}
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_mmc.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_mmc.c
index 764e61aa8e..352e05b4c3 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_mmc.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_mmc.c
@@ -2328,7 +2328,7 @@ HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32
if(errorstate != HAL_MMC_ERROR_NONE)
{
/* Clear all the static flags */
- __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
+ __HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
hmmc->ErrorCode |= errorstate;
return HAL_ERROR;
}
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_nand.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_nand.c
index 0976a7a6fe..2bf27d23af 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_nand.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_nand.c
@@ -506,7 +506,7 @@ HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand)
* @param pDeviceConfig pointer to NAND_DeviceConfigTypeDef structure
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, NAND_DeviceConfigTypeDef *pDeviceConfig)
+HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, const NAND_DeviceConfigTypeDef *pDeviceConfig)
{
hnand->Config.PageSize = pDeviceConfig->PageSize;
hnand->Config.SpareAreaSize = pDeviceConfig->SpareAreaSize;
@@ -2036,6 +2036,7 @@ HAL_StatusTypeDef HAL_NAND_RegisterCallback(NAND_HandleTypeDef *hnand, HAL_NAND_
status = HAL_ERROR;
}
+ return status;
}
/**
@@ -2094,6 +2095,7 @@ HAL_StatusTypeDef HAL_NAND_UnRegisterCallback(NAND_HandleTypeDef *hnand, HAL_NAN
status = HAL_ERROR;
}
+ return status;
}
#endif /* USE_HAL_NAND_REGISTER_CALLBACKS */
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_pccard.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_pccard.c
index 2361d7e5e1..fd998d9f9a 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_pccard.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_pccard.c
@@ -162,7 +162,8 @@
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCCARD_Init(PCCARD_HandleTypeDef *hpccard, FSMC_NAND_PCC_TimingTypeDef *ComSpaceTiming,
- FSMC_NAND_PCC_TimingTypeDef *AttSpaceTiming, FSMC_NAND_PCC_TimingTypeDef *IOSpaceTiming)
+ FSMC_NAND_PCC_TimingTypeDef *AttSpaceTiming,
+ FSMC_NAND_PCC_TimingTypeDef *IOSpaceTiming)
{
/* Check the PCCARD controller state */
if (hpccard == NULL)
@@ -186,7 +187,7 @@ HAL_StatusTypeDef HAL_PCCARD_Init(PCCARD_HandleTypeDef *hpccard, FSMC_NAND_PCC_T
#else
/* Initialize the low level hardware (MSP) */
HAL_PCCARD_MspInit(hpccard);
-#endif
+#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
}
/* Initialize the PCCARD state */
@@ -233,7 +234,7 @@ HAL_StatusTypeDef HAL_PCCARD_DeInit(PCCARD_HandleTypeDef *hpccard)
#else
/* De-Initialize the low level hardware (MSP) */
HAL_PCCARD_MspDeInit(hpccard);
-#endif
+#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
/* Configure the PCCARD registers with their reset values */
FSMC_PCCARD_DeInit(hpccard->Instance);
@@ -306,8 +307,9 @@ __weak void HAL_PCCARD_MspDeInit(PCCARD_HandleTypeDef *hpccard)
*/
HAL_StatusTypeDef HAL_PCCARD_Read_ID(PCCARD_HandleTypeDef *hpccard, uint8_t CompactFlash_ID[], uint8_t *pStatus)
{
- uint32_t timeout = PCCARD_TIMEOUT_READ_ID, index = 0U;
- uint8_t status = 0;
+ uint32_t timeout = 0U;
+ uint32_t index = 0U;
+ uint8_t status = 0U;
/* Process Locked */
__HAL_LOCK(hpccard);
@@ -318,6 +320,9 @@ HAL_StatusTypeDef HAL_PCCARD_Read_ID(PCCARD_HandleTypeDef *hpccard, uint8_t Comp
return HAL_BUSY;
}
+ /* Initialize timeout value */
+ timeout = PCCARD_TIMEOUT_READ_ID;
+
/* Update the PCCARD controller state */
hpccard->State = HAL_PCCARD_STATE_BUSY;
@@ -370,8 +375,9 @@ HAL_StatusTypeDef HAL_PCCARD_Read_ID(PCCARD_HandleTypeDef *hpccard, uint8_t Comp
HAL_StatusTypeDef HAL_PCCARD_Read_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t *pBuffer, uint16_t SectorAddress,
uint8_t *pStatus)
{
- uint32_t timeout = PCCARD_TIMEOUT_READ_WRITE_SECTOR, index = 0U;
- uint8_t status = 0;
+ uint32_t timeout = 0U;
+ uint32_t index = 0U;
+ uint8_t status = 0U;
/* Process Locked */
__HAL_LOCK(hpccard);
@@ -382,6 +388,9 @@ HAL_StatusTypeDef HAL_PCCARD_Read_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t
return HAL_BUSY;
}
+ /* Initialize timeout value */
+ timeout = PCCARD_TIMEOUT_READ_WRITE_SECTOR;
+
/* Update the PCCARD controller state */
hpccard->State = HAL_PCCARD_STATE_BUSY;
@@ -447,8 +456,9 @@ HAL_StatusTypeDef HAL_PCCARD_Read_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t
HAL_StatusTypeDef HAL_PCCARD_Write_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t *pBuffer, uint16_t SectorAddress,
uint8_t *pStatus)
{
- uint32_t timeout = PCCARD_TIMEOUT_READ_WRITE_SECTOR, index = 0U;
- uint8_t status = 0;
+ uint32_t timeout = 0U;
+ uint32_t index = 0U;
+ uint8_t status = 0U;
/* Process Locked */
__HAL_LOCK(hpccard);
@@ -459,6 +469,9 @@ HAL_StatusTypeDef HAL_PCCARD_Write_Sector(PCCARD_HandleTypeDef *hpccard, uint16_
return HAL_BUSY;
}
+ /* Initialize timeout value */
+ timeout = PCCARD_TIMEOUT_READ_WRITE_SECTOR;
+
/* Update the PCCARD controller state */
hpccard->State = HAL_PCCARD_STATE_BUSY;
@@ -521,7 +534,7 @@ HAL_StatusTypeDef HAL_PCCARD_Write_Sector(PCCARD_HandleTypeDef *hpccard, uint16_
HAL_StatusTypeDef HAL_PCCARD_Erase_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t SectorAddress, uint8_t *pStatus)
{
uint32_t timeout = PCCARD_TIMEOUT_ERASE_SECTOR;
- uint8_t status = 0;
+ uint8_t status = 0U;
/* Process Locked */
__HAL_LOCK(hpccard);
@@ -623,7 +636,7 @@ void HAL_PCCARD_IRQHandler(PCCARD_HandleTypeDef *hpccard)
hpccard->ItCallback(hpccard);
#else
HAL_PCCARD_ITCallback(hpccard);
-#endif
+#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
/* Clear PCCARD interrupt Rising edge pending bit */
__FSMC_PCCARD_CLEAR_FLAG(hpccard->Instance, FSMC_FLAG_RISING_EDGE);
@@ -637,7 +650,7 @@ void HAL_PCCARD_IRQHandler(PCCARD_HandleTypeDef *hpccard)
hpccard->ItCallback(hpccard);
#else
HAL_PCCARD_ITCallback(hpccard);
-#endif
+#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
/* Clear PCCARD interrupt Level pending bit */
__FSMC_PCCARD_CLEAR_FLAG(hpccard->Instance, FSMC_FLAG_LEVEL);
@@ -651,7 +664,7 @@ void HAL_PCCARD_IRQHandler(PCCARD_HandleTypeDef *hpccard)
hpccard->ItCallback(hpccard);
#else
HAL_PCCARD_ITCallback(hpccard);
-#endif
+#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
/* Clear PCCARD interrupt Falling edge pending bit */
__FSMC_PCCARD_CLEAR_FLAG(hpccard->Instance, FSMC_FLAG_FALLING_EDGE);
@@ -665,7 +678,7 @@ void HAL_PCCARD_IRQHandler(PCCARD_HandleTypeDef *hpccard)
hpccard->ItCallback(hpccard);
#else
HAL_PCCARD_ITCallback(hpccard);
-#endif
+#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
/* Clear PCCARD interrupt FIFO empty pending bit */
__FSMC_PCCARD_CLEAR_FLAG(hpccard->Instance, FSMC_FLAG_FEMPT);
@@ -822,7 +835,7 @@ HAL_StatusTypeDef HAL_PCCARD_UnRegisterCallback(PCCARD_HandleTypeDef *hpccard, H
__HAL_UNLOCK(hpccard);
return status;
}
-#endif
+#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
/**
* @}
@@ -865,7 +878,8 @@ HAL_PCCARD_StateTypeDef HAL_PCCARD_GetState(PCCARD_HandleTypeDef *hpccard)
*/
HAL_PCCARD_StatusTypeDef HAL_PCCARD_GetStatus(PCCARD_HandleTypeDef *hpccard)
{
- uint32_t timeout = PCCARD_TIMEOUT_STATUS, status_pccard = 0U;
+ uint32_t timeout = PCCARD_TIMEOUT_STATUS;
+ uint32_t status_pccard = 0U;
/* Check the PCCARD controller state */
if (hpccard->State == HAL_PCCARD_STATE_BUSY)
@@ -901,7 +915,8 @@ HAL_PCCARD_StatusTypeDef HAL_PCCARD_GetStatus(PCCARD_HandleTypeDef *hpccard)
*/
HAL_PCCARD_StatusTypeDef HAL_PCCARD_ReadStatus(PCCARD_HandleTypeDef *hpccard)
{
- uint8_t data = 0U, status_pccard = PCCARD_BUSY;
+ uint8_t data = 0U;
+ uint8_t status_pccard = PCCARD_BUSY;
/* Check the PCCARD controller state */
if (hpccard->State == HAL_PCCARD_STATE_BUSY)
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_pcd.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_pcd.c
index 9946ab0546..ae9999a87c 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_pcd.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_pcd.c
@@ -122,7 +122,9 @@ static HAL_StatusTypeDef PCD_EP_OutSetupPacket_int(PCD_HandleTypeDef *hpcd, uint
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
- USB_OTG_GlobalTypeDef *USBx;
+#if defined (USB_OTG_FS)
+ const USB_OTG_GlobalTypeDef *USBx;
+#endif /* defined (USB_OTG_FS) */
uint8_t i;
/* Check the PCD handle allocation */
@@ -134,7 +136,9 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
/* Check the parameters */
assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
+#if defined (USB_OTG_FS)
USBx = hpcd->Instance;
+#endif /* defined (USB_OTG_FS) */
if (hpcd->State == HAL_PCD_STATE_RESET)
{
@@ -169,11 +173,13 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
hpcd->State = HAL_PCD_STATE_BUSY;
+#if defined (USB_OTG_FS)
/* Disable DMA mode for FS instance */
- if ((USBx->CID & (0x1U << 8)) == 0U)
+ if (USBx == USB_OTG_FS)
{
hpcd->Init.dma_enable = 0U;
}
+#endif /* defined (USB_OTG_FS) */
/* Disable the Interrupts */
__HAL_PCD_DISABLE(hpcd);
@@ -185,8 +191,12 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
return HAL_ERROR;
}
- /* Force Device Mode*/
- (void)USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE);
+ /* Force Device Mode */
+ if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK)
+ {
+ hpcd->State = HAL_PCD_STATE_ERROR;
+ return HAL_ERROR;
+ }
/* Init endpoints structures */
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
@@ -1300,16 +1310,17 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
*/
void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd)
{
+#if defined (USB_OTG_FS)
USB_OTG_GlobalTypeDef *USBx;
-
USBx = hpcd->Instance;
- if ((USBx->CID & (0x1U << 8)) == 0U)
+ if (USBx == USB_OTG_FS)
{
/* Clear EXTI pending Bit */
__HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG();
}
else
+#endif /* defined (USB_OTG_FS) */
{
/* Clear EXTI pending Bit */
__HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG();
@@ -1886,9 +1897,9 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd)
* @param testmode USB Device high speed test mode
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_PCD_SetTestMode(PCD_HandleTypeDef *hpcd, uint8_t testmode)
+HAL_StatusTypeDef HAL_PCD_SetTestMode(const PCD_HandleTypeDef *hpcd, uint8_t testmode)
{
- USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
+ const USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
uint32_t USBx_BASE = (uint32_t)USBx;
switch (testmode)
@@ -1990,9 +2001,9 @@ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t
static HAL_StatusTypeDef PCD_EP_OutXfrComplete_int(PCD_HandleTypeDef *hpcd, uint32_t epnum)
{
USB_OTG_EPTypeDef *ep;
- USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
+ const USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
uint32_t USBx_BASE = (uint32_t)USBx;
- uint32_t gSNPSiD = *(__IO uint32_t *)(&USBx->CID + 0x1U);
+ uint32_t gSNPSiD = *(__IO const uint32_t *)(&USBx->CID + 0x1U);
uint32_t DoepintReg = USBx_OUTEP(epnum)->DOEPINT;
if (hpcd->Init.dma_enable == 1U)
@@ -2101,9 +2112,9 @@ static HAL_StatusTypeDef PCD_EP_OutXfrComplete_int(PCD_HandleTypeDef *hpcd, uint
*/
static HAL_StatusTypeDef PCD_EP_OutSetupPacket_int(PCD_HandleTypeDef *hpcd, uint32_t epnum)
{
- USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
+ const USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
uint32_t USBx_BASE = (uint32_t)USBx;
- uint32_t gSNPSiD = *(__IO uint32_t *)(&USBx->CID + 0x1U);
+ uint32_t gSNPSiD = *(__IO const uint32_t *)(&USBx->CID + 0x1U);
uint32_t DoepintReg = USBx_OUTEP(epnum)->DOEPINT;
if ((gSNPSiD > USB_OTG_CORE_ID_300A) &&
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rng.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rng.c
index a49894b3f2..acaf0e9e2c 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rng.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rng.c
@@ -689,15 +689,16 @@ uint32_t HAL_RNG_GetRandomNumber_IT(RNG_HandleTypeDef *hrng)
void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng)
{
uint32_t rngclockerror = 0U;
+ uint32_t itflag = hrng->Instance->SR;
/* RNG clock error interrupt occurred */
- if (__HAL_RNG_GET_IT(hrng, RNG_IT_CEI) != RESET)
+ if ((itflag & RNG_IT_CEI) == RNG_IT_CEI)
{
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_CLOCK;
rngclockerror = 1U;
}
- else if (__HAL_RNG_GET_IT(hrng, RNG_IT_SEI) != RESET)
+ else if ((itflag & RNG_IT_SEI) == RNG_IT_SEI)
{
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_SEED;
@@ -728,7 +729,7 @@ void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng)
}
/* Check RNG data ready interrupt occurred */
- if (__HAL_RNG_GET_IT(hrng, RNG_IT_DRDY) != RESET)
+ if ((itflag & RNG_IT_DRDY) == RNG_IT_DRDY)
{
/* Generate random number once, so disable the IT */
__HAL_RNG_DISABLE_IT(hrng);
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rtc.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rtc.c
index 30fe52ca40..71cae35205 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rtc.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rtc.c
@@ -6,8 +6,8 @@
* This file provides firmware functions to manage the following
* functionalities of the Real-Time Clock (RTC) peripheral:
* + Initialization and de-initialization functions
- * + RTC Calendar (Time and Date) configuration functions
- * + RTC Alarms (Alarm A and Alarm B) configuration functions
+ * + Calendar (Time and Date) configuration functions
+ * + Alarms (Alarm A and Alarm B) configuration functions
* + Peripheral Control functions
* + Peripheral State functions
*
@@ -121,6 +121,12 @@
*** Callback registration ***
=============================================
[..]
+ When the compilation define USE_HAL_RTC_REGISTER_CALLBACKS is set to 0 or
+ not defined, the callback registration feature is not available and all
+ callbacks are set to the corresponding weak functions.
+ This is the recommended configuration in order to optimize memory/code
+ consumption footprint/performances.
+ [..]
The compilation define USE_HAL_RTC_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
Use Function HAL_RTC_RegisterCallback() to register an interrupt callback.
@@ -152,25 +158,21 @@
[..]
By default, after the HAL_RTC_Init() and when the state is HAL_RTC_STATE_RESET,
all callbacks are set to the corresponding weak functions:
- examples AlarmAEventCallback(), WakeUpTimerEventCallback().
+ examples AlarmAEventCallback(), TimeStampEventCallback().
Exception done for MspInit() and MspDeInit() callbacks that are reset to the
- legacy weak function in the HAL_RTC_Init()/HAL_RTC_DeInit() only
- when these callbacks are null (not registered beforehand).
+ legacy weak function in the HAL_RTC_Init()/HAL_RTC_DeInit() only when these
+ callbacks are null (not registered beforehand).
If not, MspInit() or MspDeInit() are not null, HAL_RTC_Init()/HAL_RTC_DeInit()
keep and use the user MspInit()/MspDeInit() callbacks (registered beforehand).
[..]
Callbacks can be registered/unregistered in HAL_RTC_STATE_READY state only.
- Exception done MspInit()/MspDeInit() that can be registered/unregistered
+ Exception done for MspInit() and MspDeInit() that can be registered/unregistered
in HAL_RTC_STATE_READY or HAL_RTC_STATE_RESET state.
Thus registered (user) MspInit()/MspDeInit() callbacks can be used during the
Init/DeInit.
- In that case first register the MspInit()/MspDeInit() user callbacks
- using HAL_RTC_RegisterCallback() before calling HAL_RTC_DeInit()
- or HAL_RTC_Init() functions.
- [..]
- When The compilation define USE_HAL_RTC_REGISTER_CALLBACKS is set to 0 or
- not defined, the callback registration feature is not available and all
- callbacks are set to the corresponding weak functions.
+ In that case first register the MspInit()/MspDeInit() user callbacks using
+ HAL_RTC_RegisterCallback() before calling HAL_RTC_DeInit() or HAL_RTC_Init()
+ functions.
@endverbatim
******************************************************************************
@@ -426,9 +428,9 @@ HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc)
* @arg @ref HAL_RTC_ALARM_B_EVENT_CB_ID Alarm B Event Callback ID
* @arg @ref HAL_RTC_TIMESTAMP_EVENT_CB_ID Timestamp Event Callback ID
* @arg @ref HAL_RTC_WAKEUPTIMER_EVENT_CB_ID Wakeup Timer Event Callback ID
- * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Callback ID
- * @arg @ref HAL_RTC_MSPINIT_CB_ID Msp Init callback ID
- * @arg @ref HAL_RTC_MSPDEINIT_CB_ID Msp DeInit callback ID
+ * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Event Callback ID
+ * @arg @ref HAL_RTC_MSPINIT_CB_ID MSP Init callback ID
+ * @arg @ref HAL_RTC_MSPDEINIT_CB_ID MSP DeInit callback ID
* @param pCallback pointer to the Callback function
* @retval HAL status
*/
@@ -523,9 +525,9 @@ HAL_StatusTypeDef HAL_RTC_RegisterCallback(RTC_HandleTypeDef *hrtc, HAL_RTC_Call
* @arg @ref HAL_RTC_ALARM_B_EVENT_CB_ID Alarm B Event Callback ID
* @arg @ref HAL_RTC_TIMESTAMP_EVENT_CB_ID Timestamp Event Callback ID
* @arg @ref HAL_RTC_WAKEUPTIMER_EVENT_CB_ID Wakeup Timer Event Callback ID
- * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Callback ID
- * @arg @ref HAL_RTC_MSPINIT_CB_ID Msp Init callback ID
- * @arg @ref HAL_RTC_MSPDEINIT_CB_ID Msp DeInit callback ID
+ * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Event Callback ID
+ * @arg @ref HAL_RTC_MSPINIT_CB_ID MSP Init callback ID
+ * @arg @ref HAL_RTC_MSPDEINIT_CB_ID MSP DeInit callback ID
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RTC_UnRegisterCallback(RTC_HandleTypeDef *hrtc, HAL_RTC_CallbackIDTypeDef CallbackID)
@@ -1006,7 +1008,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA
tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \
((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \
((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \
- ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \
+ ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_ALRMAR_PM_Pos) | \
((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \
((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
((uint32_t)sAlarm->AlarmMask));
@@ -1039,7 +1041,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA
tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \
((uint32_t)(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \
((uint32_t) sAlarm->AlarmTime.Seconds) | \
- ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \
+ ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_ALRMAR_PM_Pos) | \
((uint32_t)(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \
((uint32_t) sAlarm->AlarmDateWeekDaySel) | \
((uint32_t) sAlarm->AlarmMask));
@@ -1048,16 +1050,15 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- /* Configure the Alarm register */
if (sAlarm->Alarm == RTC_ALARM_A)
{
- /* Disable the Alarm A */
+ /* Disable Alarm A */
__HAL_RTC_ALARMA_DISABLE(hrtc);
/* In case interrupt mode is used, the interrupt source must be disabled */
__HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA);
- /* Clear the Alarm flag */
+ /* Clear Alarm A flag */
__HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF);
/* Get tick */
@@ -1080,19 +1081,20 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA
}
}
+ /* Configure Alarm A register */
hrtc->Instance->ALRMAR = (uint32_t)tmpreg;
- /* Configure the Alarm state: Enable Alarm */
+ /* Enable Alarm A */
__HAL_RTC_ALARMA_ENABLE(hrtc);
}
else
{
- /* Disable the Alarm B */
+ /* Disable Alarm B */
__HAL_RTC_ALARMB_DISABLE(hrtc);
/* In case interrupt mode is used, the interrupt source must be disabled */
__HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRB);
- /* Clear the Alarm flag */
+ /* Clear Alarm B flag */
__HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF);
/* Get tick */
@@ -1115,8 +1117,9 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA
}
}
+ /* Configure Alarm B register */
hrtc->Instance->ALRMBR = (uint32_t)tmpreg;
- /* Configure the Alarm state: Enable Alarm */
+ /* Enable Alarm B */
__HAL_RTC_ALARMB_ENABLE(hrtc);
}
@@ -1192,7 +1195,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef
tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \
((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \
((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \
- ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \
+ ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_ALRMAR_PM_Pos) | \
((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \
((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
((uint32_t)sAlarm->AlarmMask));
@@ -1225,7 +1228,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef
tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \
((uint32_t)(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \
((uint32_t) sAlarm->AlarmTime.Seconds) | \
- ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \
+ ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_ALRMAR_PM_Pos) | \
((uint32_t)(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \
((uint32_t) sAlarm->AlarmDateWeekDaySel) | \
((uint32_t) sAlarm->AlarmMask));
@@ -1234,13 +1237,12 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- /* Configure the Alarm register */
if (sAlarm->Alarm == RTC_ALARM_A)
{
- /* Disable the Alarm A */
+ /* Disable Alarm A */
__HAL_RTC_ALARMA_DISABLE(hrtc);
- /* Clear the Alarm flag */
+ /* Clear Alarm A flag */
__HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF);
/* Wait till RTC ALRAWF flag is set and if timeout is reached exit */
@@ -1261,18 +1263,19 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef
}
} while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == 0U);
+ /* Configure Alarm A register */
hrtc->Instance->ALRMAR = (uint32_t)tmpreg;
- /* Configure the Alarm state: Enable Alarm */
+ /* Enable Alarm A */
__HAL_RTC_ALARMA_ENABLE(hrtc);
- /* Configure the Alarm interrupt */
+ /* Enable Alarm A interrupt */
__HAL_RTC_ALARM_ENABLE_IT(hrtc, RTC_IT_ALRA);
}
else
{
- /* Disable the Alarm B */
+ /* Disable Alarm B */
__HAL_RTC_ALARMB_DISABLE(hrtc);
- /* Clear the Alarm flag */
+ /* Clear Alarm B flag */
__HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF);
/* Reload the counter */
@@ -1296,14 +1299,15 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef
}
} while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == 0U);
+ /* Configure Alarm B register */
hrtc->Instance->ALRMBR = (uint32_t)tmpreg;
- /* Configure the Alarm state: Enable Alarm */
+ /* Enable Alarm B */
__HAL_RTC_ALARMB_ENABLE(hrtc);
- /* Configure the Alarm interrupt */
+ /* Enable Alarm B interrupt */
__HAL_RTC_ALARM_ENABLE_IT(hrtc, RTC_IT_ALRB);
}
- /* RTC Alarm Interrupt Configuration: EXTI configuration */
+ /* Enable and configure the EXTI line associated to the RTC Alarm interrupt */
__HAL_RTC_ALARM_EXTI_ENABLE_IT();
__HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE();
@@ -1355,7 +1359,7 @@ HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alar
/* Get tick */
tickstart = HAL_GetTick();
- /* Wait till RTC ALRxWF flag is set and if timeout is reached exit */
+ /* Wait till RTC ALRAWF flag is set and if timeout is reached exit */
while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == 0U)
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
@@ -1383,7 +1387,7 @@ HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alar
/* Get tick */
tickstart = HAL_GetTick();
- /* Wait till RTC ALRxWF flag is set and if timeout is reached exit */
+ /* Wait till RTC ALRBWF flag is set and if timeout is reached exit */
while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == 0U)
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
@@ -1476,7 +1480,7 @@ HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA
*/
void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef *hrtc)
{
- /* Clear the EXTI's line Flag for RTC Alarm */
+ /* Clear the EXTI flag associated to the RTC Alarm interrupt */
__HAL_RTC_ALARM_EXTI_CLEAR_FLAG();
/* Get the Alarm A interrupt source enable status */
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rtc_ex.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rtc_ex.c
index bacc521da3..bcfa52e14b 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rtc_ex.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rtc_ex.c
@@ -58,7 +58,7 @@
*** Tamper configuration ***
============================
[..]
- (+) To Enable the RTC Tamper and configure the Tamper filter count, trigger
+ (+) To enable the RTC Tamper and configure the Tamper filter count, trigger
Edge or Level according to the Tamper filter value (if equal to 0 Edge
else Level), sampling frequency, precharge or discharge and Pull-UP use
the HAL_RTCEx_SetTamper() function.
@@ -96,8 +96,8 @@
0 to 62.
(+) In order to measure the clock deviation, a 512 Hz clock is output for
calibration.
- (+) The RTC Coarse Digital Calibration value and sign can be calibrated using
- the HAL_RTCEx_SetCoarseCalib() function.
+ (+) To configure the RTC Coarse Digital Calibration value and sign use the
+ HAL_RTCEx_SetCoarseCalib() function.
@endverbatim
******************************************************************************
@@ -272,7 +272,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t RT
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
- /* RTC Timestamp Interrupt Configuration: EXTI configuration */
+ /* Enable and configure the EXTI line associated to the RTC Timestamp and Tamper interrupts */
__HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
__HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE();
@@ -303,7 +303,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc)
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- /* In case of interrupt mode is used, the interrupt source must disabled */
+ /* In case interrupt mode is used, the interrupt source must disabled */
__HAL_RTC_TIMESTAMP_DISABLE_IT(hrtc, RTC_IT_TS);
/* Get the RTC_CR register and clear the bits to be configured */
@@ -493,7 +493,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperType
/* Copy desired configuration into configuration register */
hrtc->Instance->TAFCR = tmpreg;
- /* RTC Tamper Interrupt Configuration: EXTI configuration */
+ /* Enable and configure the EXTI line associated to the RTC Timestamp and Tamper interrupts */
__HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
__HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE();
@@ -543,7 +543,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t T
*/
void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc)
{
- /* Clear the EXTI's Flag for RTC Timestamp and Tamper */
+ /* Clear the EXTI flag associated to the RTC Timestamp and Tamper interrupts */
__HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG();
/* Get the Timestamp interrupt source enable status */
@@ -894,7 +894,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t
/* Configure the Wakeup Timer counter */
hrtc->Instance->WUTR = (uint32_t)WakeUpCounter;
- /* RTC wakeup timer Interrupt Configuration: EXTI configuration */
+ /* Enable and configure the EXTI line associated to the RTC Wakeup Timer interrupt */
__HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT();
__HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
@@ -936,7 +936,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc)
/* Disable the Wakeup Timer */
__HAL_RTC_WAKEUPTIMER_DISABLE(hrtc);
- /* In case of interrupt mode is used, the interrupt source must disabled */
+ /* In case interrupt mode is used, the interrupt source must disabled */
__HAL_RTC_WAKEUPTIMER_DISABLE_IT(hrtc, RTC_IT_WUT);
/* Get tick */
@@ -995,7 +995,7 @@ uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc)
*/
void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc)
{
- /* Clear the EXTI's line Flag for RTC WakeUpTimer */
+ /* Clear the EXTI flag associated to the RTC Wakeup Timer interrupt */
__HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG();
/* Get the pending status of the Wakeup timer Interrupt */
@@ -1111,7 +1111,7 @@ void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint3
/* Check the parameters */
assert_param(IS_RTC_BKP(BackupRegister));
- tmp = (uint32_t) & (hrtc->Instance->BKP0R);
+ tmp = (uint32_t) &(hrtc->Instance->BKP0R);
tmp += (BackupRegister * 4U);
/* Write the specified register */
@@ -1134,7 +1134,7 @@ uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister)
/* Check the parameters */
assert_param(IS_RTC_BKP(BackupRegister));
- tmp = (uint32_t) & (hrtc->Instance->BKP0R);
+ tmp = (uint32_t) &(hrtc->Instance->BKP0R);
tmp += (BackupRegister * 4U);
/* Read the specified register */
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
index 42fc04b9d5..1e67f06edc 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
@@ -403,7 +403,6 @@ HAL_StatusTypeDef HAL_SD_Init(SD_HandleTypeDef *hsd)
HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd)
{
uint32_t errorstate;
- HAL_StatusTypeDef status;
SD_InitTypeDef Init;
/* Default SDIO peripheral configuration for SD card initialization */
@@ -415,11 +414,7 @@ HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd)
Init.ClockDiv = SDIO_INIT_CLK_DIV;
/* Initialize SDIO peripheral interface with default configuration */
- status = SDIO_Init(hsd->Instance, Init);
- if(status != HAL_OK)
- {
- return HAL_ERROR;
- }
+ SDIO_Init(hsd->Instance, Init);
/* Disable SDIO Clock */
__HAL_SD_DISABLE(hsd);
@@ -692,7 +687,7 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint3
}
/* Get error state */
- if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DTIMEOUT))
+ if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DTIMEOUT) || (__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_STBITERR)))
{
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
@@ -903,7 +898,7 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint
}
/* Get error state */
- if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DTIMEOUT))
+ if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DTIMEOUT) || (__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_STBITERR)))
{
/* Clear all the static flags */
__HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
@@ -2868,13 +2863,13 @@ static uint32_t SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus)
}
}
- if((HAL_GetTick() - tickstart) >= SDMMC_DATATIMEOUT)
+ if((HAL_GetTick() - tickstart) >= SDMMC_SWDATATIMEOUT)
{
return HAL_SD_ERROR_TIMEOUT;
}
}
- if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DTIMEOUT))
+ if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DTIMEOUT) || (__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_STBITERR)))
{
return HAL_SD_ERROR_DATA_TIMEOUT;
}
@@ -2896,7 +2891,7 @@ static uint32_t SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus)
*pData = SDIO_ReadFIFO(hsd->Instance);
pData++;
- if((HAL_GetTick() - tickstart) >= SDMMC_DATATIMEOUT)
+ if((HAL_GetTick() - tickstart) >= SDMMC_SWDATATIMEOUT)
{
return HAL_SD_ERROR_TIMEOUT;
}
@@ -3088,13 +3083,13 @@ static uint32_t SD_FindSCR(SD_HandleTypeDef *hsd, uint32_t *pSCR)
break;
}
- if((HAL_GetTick() - tickstart) >= SDMMC_DATATIMEOUT)
+ if((HAL_GetTick() - tickstart) >= SDMMC_SWDATATIMEOUT)
{
return HAL_SD_ERROR_TIMEOUT;
}
}
- if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DTIMEOUT))
+ if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_DTIMEOUT) || (__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_STBITERR)))
{
__HAL_SD_CLEAR_FLAG(hsd, SDIO_FLAG_DTIMEOUT);
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_spi.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_spi.c
index de0b4a998c..c82cd4fffc 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_spi.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_spi.c
@@ -44,7 +44,8 @@
(+++) Configure the DMA handle parameters
(+++) Configure the DMA Tx or Rx Stream/Channel
(+++) Associate the initialized hdma_tx(or _rx) handle to the hspi DMA Tx or Rx handle
- (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Stream/Channel
+ (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx
+ or Rx Stream/Channel
(#) Program the Mode, BidirectionalMode , Data size, Baudrate Prescaler, NSS
management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
@@ -190,7 +191,8 @@
@note The max SPI frequency depend on SPI data size (8bits, 16bits),
SPI mode(2 Lines fullduplex, 2 lines RxOnly, 1 line TX/RX) and Process mode (Polling, IT, DMA).
@note
- (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and HAL_SPI_TransmitReceive_DMA()
+ (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and
+ HAL_SPI_TransmitReceive_DMA()
(#) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA()
(#) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA()
@@ -765,38 +767,35 @@ HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_Ca
* @param Timeout Timeout duration
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
+HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
uint32_t tickstart;
- HAL_StatusTypeDef errorcode = HAL_OK;
uint16_t initial_TxXferCount;
/* Check Direction parameter */
assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
- /* Process Locked */
- __HAL_LOCK(hspi);
-
/* Init tickstart for timeout management*/
tickstart = HAL_GetTick();
initial_TxXferCount = Size;
if (hspi->State != HAL_SPI_STATE_READY)
{
- errorcode = HAL_BUSY;
- goto error;
+ return HAL_BUSY;
}
if ((pData == NULL) || (Size == 0U))
{
- errorcode = HAL_ERROR;
- goto error;
+ return HAL_ERROR;
}
+ /* Process Locked */
+ __HAL_LOCK(hspi);
+
/* Set the transaction information */
hspi->State = HAL_SPI_STATE_BUSY_TX;
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
- hspi->pTxBuffPtr = (uint8_t *)pData;
+ hspi->pTxBuffPtr = (const uint8_t *)pData;
hspi->TxXferSize = Size;
hspi->TxXferCount = Size;
@@ -835,7 +834,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint
{
if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
{
- hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
+ hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr += sizeof(uint16_t);
hspi->TxXferCount--;
}
@@ -845,7 +844,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint
/* Wait until TXE flag is set to send data */
if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
{
- hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
+ hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr += sizeof(uint16_t);
hspi->TxXferCount--;
}
@@ -854,9 +853,9 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint
/* Timeout management */
if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
{
- errorcode = HAL_TIMEOUT;
hspi->State = HAL_SPI_STATE_READY;
- goto error;
+ __HAL_UNLOCK(hspi);
+ return HAL_TIMEOUT;
}
}
}
@@ -866,7 +865,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint
{
if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
{
- *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
+ *((__IO uint8_t *)&hspi->Instance->DR) = *((const uint8_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr += sizeof(uint8_t);
hspi->TxXferCount--;
}
@@ -875,7 +874,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint
/* Wait until TXE flag is set to send data */
if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
{
- *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
+ *((__IO uint8_t *)&hspi->Instance->DR) = *((const uint8_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr += sizeof(uint8_t);
hspi->TxXferCount--;
}
@@ -884,9 +883,9 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint
/* Timeout management */
if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
{
- errorcode = HAL_TIMEOUT;
hspi->State = HAL_SPI_STATE_READY;
- goto error;
+ __HAL_UNLOCK(hspi);
+ return HAL_TIMEOUT;
}
}
}
@@ -911,19 +910,18 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint
__HAL_SPI_CLEAR_OVRFLAG(hspi);
}
+ hspi->State = HAL_SPI_STATE_READY;
+ /* Process Unlocked */
+ __HAL_UNLOCK(hspi);
+
if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
{
- errorcode = HAL_ERROR;
+ return HAL_ERROR;
}
else
{
- hspi->State = HAL_SPI_STATE_READY;
+ return HAL_OK;
}
-
-error:
- /* Process Unlocked */
- __HAL_UNLOCK(hspi);
- return errorcode;
}
/**
@@ -941,12 +939,10 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1
__IO uint32_t tmpreg = 0U;
#endif /* USE_SPI_CRC */
uint32_t tickstart;
- HAL_StatusTypeDef errorcode = HAL_OK;
if (hspi->State != HAL_SPI_STATE_READY)
{
- errorcode = HAL_BUSY;
- goto error;
+ return HAL_BUSY;
}
if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
@@ -956,18 +952,17 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1
return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
}
- /* Process Locked */
- __HAL_LOCK(hspi);
-
/* Init tickstart for timeout management*/
tickstart = HAL_GetTick();
if ((pData == NULL) || (Size == 0U))
{
- errorcode = HAL_ERROR;
- goto error;
+ return HAL_ERROR;
}
+ /* Process Locked */
+ __HAL_LOCK(hspi);
+
/* Set the transaction information */
hspi->State = HAL_SPI_STATE_BUSY_RX;
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
@@ -1026,9 +1021,9 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1
/* Timeout management */
if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
{
- errorcode = HAL_TIMEOUT;
hspi->State = HAL_SPI_STATE_READY;
- goto error;
+ __HAL_UNLOCK(hspi);
+ return HAL_TIMEOUT;
}
}
}
@@ -1050,9 +1045,9 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1
/* Timeout management */
if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
{
- errorcode = HAL_TIMEOUT;
hspi->State = HAL_SPI_STATE_READY;
- goto error;
+ __HAL_UNLOCK(hspi);
+ return HAL_TIMEOUT;
}
}
}
@@ -1069,8 +1064,8 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1
if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
{
/* the latest data has not been received */
- errorcode = HAL_TIMEOUT;
- goto error;
+ __HAL_UNLOCK(hspi);
+ return HAL_TIMEOUT;
}
/* Receive last data in 16 Bit mode */
@@ -1088,8 +1083,9 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1
if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
- errorcode = HAL_TIMEOUT;
- goto error;
+ hspi->State = HAL_SPI_STATE_READY;
+ __HAL_UNLOCK(hspi);
+ return HAL_TIMEOUT;
}
/* Read CRC to Flush DR and RXNE flag */
@@ -1114,18 +1110,17 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1
}
#endif /* USE_SPI_CRC */
+ hspi->State = HAL_SPI_STATE_READY;
+ /* Unlock the process */
+ __HAL_UNLOCK(hspi);
if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
{
- errorcode = HAL_ERROR;
+ return HAL_ERROR;
}
else
{
- hspi->State = HAL_SPI_STATE_READY;
+ return HAL_OK;
}
-
-error :
- __HAL_UNLOCK(hspi);
- return errorcode;
}
/**
@@ -1138,8 +1133,8 @@ error :
* @param Timeout Timeout duration
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
- uint32_t Timeout)
+HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData,
+ uint16_t Size, uint32_t Timeout)
{
uint16_t initial_TxXferCount;
uint32_t tmp_mode;
@@ -1151,14 +1146,10 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
/* Variable used to alternate Rx and Tx during transfer */
uint32_t txallowed = 1U;
- HAL_StatusTypeDef errorcode = HAL_OK;
/* Check Direction parameter */
assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
- /* Process Locked */
- __HAL_LOCK(hspi);
-
/* Init tickstart for timeout management*/
tickstart = HAL_GetTick();
@@ -1168,18 +1159,20 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
initial_TxXferCount = Size;
if (!((tmp_state == HAL_SPI_STATE_READY) || \
- ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX))))
+ ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) &&
+ (tmp_state == HAL_SPI_STATE_BUSY_RX))))
{
- errorcode = HAL_BUSY;
- goto error;
+ return HAL_BUSY;
}
if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
{
- errorcode = HAL_ERROR;
- goto error;
+ return HAL_ERROR;
}
+ /* Process Locked */
+ __HAL_LOCK(hspi);
+
/* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
if (hspi->State != HAL_SPI_STATE_BUSY_RX)
{
@@ -1191,7 +1184,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
hspi->pRxBuffPtr = (uint8_t *)pRxData;
hspi->RxXferCount = Size;
hspi->RxXferSize = Size;
- hspi->pTxBuffPtr = (uint8_t *)pTxData;
+ hspi->pTxBuffPtr = (const uint8_t *)pTxData;
hspi->TxXferCount = Size;
hspi->TxXferSize = Size;
@@ -1219,16 +1212,25 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
{
if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
{
- hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
+ hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr += sizeof(uint16_t);
hspi->TxXferCount--;
+
+#if (USE_SPI_CRC != 0U)
+ /* Enable CRC Transmission */
+ if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
+ {
+ SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
+ }
+#endif /* USE_SPI_CRC */
+
}
while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
{
/* Check TXE flag */
if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))
{
- hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
+ hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr += sizeof(uint16_t);
hspi->TxXferCount--;
/* Next Data is a reception (Rx). Tx not allowed */
@@ -1254,9 +1256,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
}
if (((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY))
{
- errorcode = HAL_TIMEOUT;
hspi->State = HAL_SPI_STATE_READY;
- goto error;
+ __HAL_UNLOCK(hspi);
+ return HAL_TIMEOUT;
}
}
}
@@ -1265,16 +1267,24 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
{
if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
{
- *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
+ *((__IO uint8_t *)&hspi->Instance->DR) = *((const uint8_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr += sizeof(uint8_t);
hspi->TxXferCount--;
+
+#if (USE_SPI_CRC != 0U)
+ /* Enable CRC Transmission */
+ if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
+ {
+ SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
+ }
+#endif /* USE_SPI_CRC */
}
while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
{
/* Check TXE flag */
if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))
{
- *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
+ *(__IO uint8_t *)&hspi->Instance->DR = *((const uint8_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr++;
hspi->TxXferCount--;
/* Next Data is a reception (Rx). Tx not allowed */
@@ -1300,9 +1310,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
}
if ((((HAL_GetTick() - tickstart) >= Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout == 0U))
{
- errorcode = HAL_TIMEOUT;
hspi->State = HAL_SPI_STATE_READY;
- goto error;
+ __HAL_UNLOCK(hspi);
+ return HAL_TIMEOUT;
}
}
}
@@ -1316,8 +1326,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
{
/* Error on the CRC reception */
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
- errorcode = HAL_TIMEOUT;
- goto error;
+ hspi->State = HAL_SPI_STATE_READY;
+ __HAL_UNLOCK(hspi);
+ return HAL_TIMEOUT;
}
/* Read CRC */
tmpreg = READ_REG(hspi->Instance->DR);
@@ -1331,17 +1342,17 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
/* Clear CRC Flag */
__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
-
- errorcode = HAL_ERROR;
+ __HAL_UNLOCK(hspi);
+ return HAL_ERROR;
}
#endif /* USE_SPI_CRC */
/* Check the end of the transaction */
if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
{
- errorcode = HAL_ERROR;
hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
- goto error;
+ __HAL_UNLOCK(hspi);
+ return HAL_ERROR;
}
/* Clear overrun flag in 2 Lines communication mode because received is not read */
@@ -1350,18 +1361,19 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
__HAL_SPI_CLEAR_OVRFLAG(hspi);
}
+
+ hspi->State = HAL_SPI_STATE_READY;
+ /* Unlock the process */
+ __HAL_UNLOCK(hspi);
+
if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
{
- errorcode = HAL_ERROR;
+ return HAL_ERROR;
}
else
{
- hspi->State = HAL_SPI_STATE_READY;
+ return HAL_OK;
}
-
-error :
- __HAL_UNLOCK(hspi);
- return errorcode;
}
/**
@@ -1372,32 +1384,30 @@ error :
* @param Size amount of data to be sent
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
+HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size)
{
- HAL_StatusTypeDef errorcode = HAL_OK;
/* Check Direction parameter */
assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
- /* Process Locked */
- __HAL_LOCK(hspi);
if ((pData == NULL) || (Size == 0U))
{
- errorcode = HAL_ERROR;
- goto error;
+ return HAL_ERROR;
}
if (hspi->State != HAL_SPI_STATE_READY)
{
- errorcode = HAL_BUSY;
- goto error;
+ return HAL_BUSY;
}
+ /* Process Locked */
+ __HAL_LOCK(hspi);
+
/* Set the transaction information */
hspi->State = HAL_SPI_STATE_BUSY_TX;
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
- hspi->pTxBuffPtr = (uint8_t *)pData;
+ hspi->pTxBuffPtr = (const uint8_t *)pData;
hspi->TxXferSize = Size;
hspi->TxXferCount = Size;
@@ -1433,10 +1443,6 @@ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, u
}
#endif /* USE_SPI_CRC */
- /* Enable TXE and ERR interrupt */
- __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
-
-
/* Check if the SPI is already enabled */
if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
{
@@ -1444,9 +1450,12 @@ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, u
__HAL_SPI_ENABLE(hspi);
}
-error :
+ /* Process Unlocked */
__HAL_UNLOCK(hspi);
- return errorcode;
+ /* Enable TXE and ERR interrupt */
+ __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
+
+ return HAL_OK;
}
/**
@@ -1459,13 +1468,10 @@ error :
*/
HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
{
- HAL_StatusTypeDef errorcode = HAL_OK;
-
if (hspi->State != HAL_SPI_STATE_READY)
{
- errorcode = HAL_BUSY;
- goto error;
+ return HAL_BUSY;
}
if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
@@ -1475,15 +1481,15 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui
return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size);
}
- /* Process Locked */
- __HAL_LOCK(hspi);
if ((pData == NULL) || (Size == 0U))
{
- errorcode = HAL_ERROR;
- goto error;
+ return HAL_ERROR;
}
+ /* Process Locked */
+ __HAL_LOCK(hspi);
+
/* Set the transaction information */
hspi->State = HAL_SPI_STATE_BUSY_RX;
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
@@ -1523,9 +1529,6 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui
}
#endif /* USE_SPI_CRC */
- /* Enable TXE and ERR interrupt */
- __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
-
/* Note : The SPI must be enabled after unlocking current process
to avoid the risk of SPI interrupt handle execution before current
process unlock */
@@ -1537,10 +1540,12 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui
__HAL_SPI_ENABLE(hspi);
}
-error :
/* Process Unlocked */
__HAL_UNLOCK(hspi);
- return errorcode;
+ /* Enable RXNE and ERR interrupt */
+ __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
+
+ return HAL_OK;
}
/**
@@ -1552,35 +1557,34 @@ error :
* @param Size amount of data to be sent and received
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
+HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData,
+ uint16_t Size)
{
uint32_t tmp_mode;
HAL_SPI_StateTypeDef tmp_state;
- HAL_StatusTypeDef errorcode = HAL_OK;
/* Check Direction parameter */
assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
- /* Process locked */
- __HAL_LOCK(hspi);
-
/* Init temporary variables */
tmp_state = hspi->State;
tmp_mode = hspi->Init.Mode;
if (!((tmp_state == HAL_SPI_STATE_READY) || \
- ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX))))
+ ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) &&
+ (tmp_state == HAL_SPI_STATE_BUSY_RX))))
{
- errorcode = HAL_BUSY;
- goto error;
+ return HAL_BUSY;
}
if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
{
- errorcode = HAL_ERROR;
- goto error;
+ return HAL_ERROR;
}
+ /* Process locked */
+ __HAL_LOCK(hspi);
+
/* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
if (hspi->State != HAL_SPI_STATE_BUSY_RX)
{
@@ -1589,7 +1593,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *p
/* Set the transaction information */
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
- hspi->pTxBuffPtr = (uint8_t *)pTxData;
+ hspi->pTxBuffPtr = (const uint8_t *)pTxData;
hspi->TxXferSize = Size;
hspi->TxXferCount = Size;
hspi->pRxBuffPtr = (uint8_t *)pRxData;
@@ -1616,8 +1620,6 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *p
}
#endif /* USE_SPI_CRC */
- /* Enable TXE, RXNE and ERR interrupt */
- __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
/* Check if the SPI is already enabled */
if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
@@ -1626,10 +1628,12 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *p
__HAL_SPI_ENABLE(hspi);
}
-error :
/* Process Unlocked */
__HAL_UNLOCK(hspi);
- return errorcode;
+ /* Enable TXE, RXNE and ERR interrupt */
+ __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
+
+ return HAL_OK;
}
/**
@@ -1640,9 +1644,8 @@ error :
* @param Size amount of data to be sent
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
+HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size)
{
- HAL_StatusTypeDef errorcode = HAL_OK;
/* Check tx dma handle */
assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx));
@@ -1650,25 +1653,23 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData,
/* Check Direction parameter */
assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
- /* Process Locked */
- __HAL_LOCK(hspi);
-
if (hspi->State != HAL_SPI_STATE_READY)
{
- errorcode = HAL_BUSY;
- goto error;
+ return HAL_BUSY;
}
if ((pData == NULL) || (Size == 0U))
{
- errorcode = HAL_ERROR;
- goto error;
+ return HAL_ERROR;
}
+ /* Process Locked */
+ __HAL_LOCK(hspi);
+
/* Set the transaction information */
hspi->State = HAL_SPI_STATE_BUSY_TX;
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
- hspi->pTxBuffPtr = (uint8_t *)pData;
+ hspi->pTxBuffPtr = (const uint8_t *)pData;
hspi->TxXferSize = Size;
hspi->TxXferCount = Size;
@@ -1713,9 +1714,9 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData,
{
/* Update SPI error code */
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
- errorcode = HAL_ERROR;
-
- goto error;
+ /* Process Unlocked */
+ __HAL_UNLOCK(hspi);
+ return HAL_ERROR;
}
/* Check if the SPI is already enabled */
@@ -1725,16 +1726,16 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData,
__HAL_SPI_ENABLE(hspi);
}
+ /* Process Unlocked */
+ __HAL_UNLOCK(hspi);
+
/* Enable the SPI Error Interrupt Bit */
__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));
/* Enable Tx DMA Request */
SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
-error :
- /* Process Unlocked */
- __HAL_UNLOCK(hspi);
- return errorcode;
+ return HAL_OK;
}
/**
@@ -1749,15 +1750,12 @@ error :
*/
HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
{
- HAL_StatusTypeDef errorcode = HAL_OK;
-
/* Check rx dma handle */
assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx));
if (hspi->State != HAL_SPI_STATE_READY)
{
- errorcode = HAL_BUSY;
- goto error;
+ return HAL_BUSY;
}
if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
@@ -1771,15 +1769,14 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u
return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
}
- /* Process Locked */
- __HAL_LOCK(hspi);
-
if ((pData == NULL) || (Size == 0U))
{
- errorcode = HAL_ERROR;
- goto error;
+ return HAL_ERROR;
}
+ /* Process Locked */
+ __HAL_LOCK(hspi);
+
/* Set the transaction information */
hspi->State = HAL_SPI_STATE_BUSY_RX;
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
@@ -1827,9 +1824,9 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u
{
/* Update SPI error code */
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
- errorcode = HAL_ERROR;
-
- goto error;
+ /* Process Unlocked */
+ __HAL_UNLOCK(hspi);
+ return HAL_ERROR;
}
/* Check if the SPI is already enabled */
@@ -1839,16 +1836,16 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u
__HAL_SPI_ENABLE(hspi);
}
+ /* Process Unlocked */
+ __HAL_UNLOCK(hspi);
+
/* Enable the SPI Error Interrupt Bit */
__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));
/* Enable Rx DMA Request */
SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
-error:
- /* Process Unlocked */
- __HAL_UNLOCK(hspi);
- return errorcode;
+ return HAL_OK;
}
/**
@@ -1861,12 +1858,11 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u
* @param Size amount of data to be sent
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,
+HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData,
uint16_t Size)
{
uint32_t tmp_mode;
HAL_SPI_StateTypeDef tmp_state;
- HAL_StatusTypeDef errorcode = HAL_OK;
/* Check rx & tx dma handles */
assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx));
@@ -1875,26 +1871,25 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *
/* Check Direction parameter */
assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
- /* Process locked */
- __HAL_LOCK(hspi);
-
/* Init temporary variables */
tmp_state = hspi->State;
tmp_mode = hspi->Init.Mode;
if (!((tmp_state == HAL_SPI_STATE_READY) ||
- ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX))))
+ ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) &&
+ (tmp_state == HAL_SPI_STATE_BUSY_RX))))
{
- errorcode = HAL_BUSY;
- goto error;
+ return HAL_BUSY;
}
if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
{
- errorcode = HAL_ERROR;
- goto error;
+ return HAL_ERROR;
}
+ /* Process locked */
+ __HAL_LOCK(hspi);
+
/* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
if (hspi->State != HAL_SPI_STATE_BUSY_RX)
{
@@ -1903,7 +1898,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *
/* Set the transaction information */
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
- hspi->pTxBuffPtr = (uint8_t *)pTxData;
+ hspi->pTxBuffPtr = (const uint8_t *)pTxData;
hspi->TxXferSize = Size;
hspi->TxXferCount = Size;
hspi->pRxBuffPtr = (uint8_t *)pRxData;
@@ -1948,9 +1943,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *
{
/* Update SPI error code */
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
- errorcode = HAL_ERROR;
-
- goto error;
+ /* Process Unlocked */
+ __HAL_UNLOCK(hspi);
+ return HAL_ERROR;
}
/* Enable Rx DMA Request */
@@ -1969,9 +1964,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *
{
/* Update SPI error code */
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
- errorcode = HAL_ERROR;
-
- goto error;
+ /* Process Unlocked */
+ __HAL_UNLOCK(hspi);
+ return HAL_ERROR;
}
/* Check if the SPI is already enabled */
@@ -1980,16 +1975,17 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *
/* Enable SPI peripheral */
__HAL_SPI_ENABLE(hspi);
}
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hspi);
+
/* Enable the SPI Error Interrupt Bit */
__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));
/* Enable Tx DMA Request */
SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
-error :
- /* Process Unlocked */
- __HAL_UNLOCK(hspi);
- return errorcode;
+ return HAL_OK;
}
/**
@@ -2355,9 +2351,11 @@ HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
{
HAL_StatusTypeDef errorcode = HAL_OK;
/* The Lock is not implemented on this API to allow the user application
- to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
+ to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or
+ HAL_SPI_TxRxCpltCallback():
when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
- and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
+ and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or
+ HAL_SPI_TxRxCpltCallback()
*/
/* Abort the SPI DMA tx Stream/Channel */
@@ -2647,7 +2645,7 @@ __weak void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi)
* the configuration information for SPI module.
* @retval SPI state
*/
-HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
+HAL_SPI_StateTypeDef HAL_SPI_GetState(const SPI_HandleTypeDef *hspi)
{
/* Return SPI handle state */
return hspi->State;
@@ -2659,7 +2657,7 @@ HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
* the configuration information for SPI module.
* @retval SPI error code in bitmap format
*/
-uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
+uint32_t HAL_SPI_GetError(const SPI_HandleTypeDef *hspi)
{
/* Return SPI ErrorCode */
return hspi->ErrorCode;
@@ -2686,7 +2684,7 @@ uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
*/
static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
{
- SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
+ SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
uint32_t tickstart;
/* Init tickstart for timeout management*/
@@ -2743,7 +2741,7 @@ static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
*/
static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
{
- SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
+ SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
uint32_t tickstart;
#if (USE_SPI_CRC != 0U)
__IO uint32_t tmpreg = 0U;
@@ -2832,7 +2830,7 @@ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
*/
static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
{
- SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
+ SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
uint32_t tickstart;
#if (USE_SPI_CRC != 0U)
__IO uint32_t tmpreg = 0U;
@@ -2912,7 +2910,7 @@ static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
*/
static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma)
{
- SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
+ SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
/* Call user Tx half complete callback */
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
@@ -2930,7 +2928,7 @@ static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma)
*/
static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma)
{
- SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
+ SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
/* Call user Rx half complete callback */
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
@@ -2948,7 +2946,7 @@ static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma)
*/
static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma)
{
- SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
+ SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
/* Call user TxRx half complete callback */
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
@@ -2966,7 +2964,7 @@ static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma)
*/
static void SPI_DMAError(DMA_HandleTypeDef *hdma)
{
- SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
+ SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
/* Stop the disable DMA transfer on SPI side */
CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
@@ -2989,7 +2987,7 @@ static void SPI_DMAError(DMA_HandleTypeDef *hdma)
*/
static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma)
{
- SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
+ SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
hspi->RxXferCount = 0U;
hspi->TxXferCount = 0U;
@@ -3011,7 +3009,7 @@ static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma)
*/
static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
{
- SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
+ SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
__IO uint32_t count;
hspi->hdmatx->XferAbortCallback = NULL;
@@ -3076,7 +3074,7 @@ static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
*/
static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
{
- SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
+ SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
/* Disable SPI Peripheral */
__HAL_SPI_DISABLE(hspi);
@@ -3198,7 +3196,7 @@ static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
*/
static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
{
- *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
+ *(__IO uint8_t *)&hspi->Instance->DR = *((const uint8_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr++;
hspi->TxXferCount--;
@@ -3291,7 +3289,7 @@ static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
{
/* Transmit data in 16 Bit mode */
- hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
+ hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr += sizeof(uint16_t);
hspi->TxXferCount--;
@@ -3439,7 +3437,7 @@ static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
*/
static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
{
- *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
+ *(__IO uint8_t *)&hspi->Instance->DR = *((const uint8_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr++;
hspi->TxXferCount--;
@@ -3465,7 +3463,7 @@ static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
{
/* Transmit data in 16 Bit mode */
- hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
+ hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr += sizeof(uint16_t);
hspi->TxXferCount--;
@@ -3586,6 +3584,13 @@ static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t
*/
static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
{
+ /* Wait until TXE flag */
+ if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_TXE, SET, Timeout, Tickstart) != HAL_OK)
+ {
+ SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
+ return HAL_TIMEOUT;
+ }
+
/* Control the BSY flag */
if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
{
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sram.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sram.c
index 2d907eb3e4..04738f3b91 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sram.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sram.c
@@ -208,7 +208,7 @@ HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FSMC_NORSRAM_TimingTy
/* Initialize SRAM extended mode timing Interface */
(void)FSMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank,
- hsram->Init.ExtendedMode);
+ hsram->Init.ExtendedMode);
/* Enable the NORSRAM device */
__FSMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank);
@@ -1037,6 +1037,7 @@ HAL_SRAM_StateTypeDef HAL_SRAM_GetState(const SRAM_HandleTypeDef *hsram)
*/
static void SRAM_DMACplt(DMA_HandleTypeDef *hdma)
{
+ /* Derogation MISRAC2012-Rule-11.5 */
SRAM_HandleTypeDef *hsram = (SRAM_HandleTypeDef *)(hdma->Parent);
/* Disable the DMA channel */
@@ -1059,6 +1060,7 @@ static void SRAM_DMACplt(DMA_HandleTypeDef *hdma)
*/
static void SRAM_DMACpltProt(DMA_HandleTypeDef *hdma)
{
+ /* Derogation MISRAC2012-Rule-11.5 */
SRAM_HandleTypeDef *hsram = (SRAM_HandleTypeDef *)(hdma->Parent);
/* Disable the DMA channel */
@@ -1081,6 +1083,7 @@ static void SRAM_DMACpltProt(DMA_HandleTypeDef *hdma)
*/
static void SRAM_DMAError(DMA_HandleTypeDef *hdma)
{
+ /* Derogation MISRAC2012-Rule-11.5 */
SRAM_HandleTypeDef *hsram = (SRAM_HandleTypeDef *)(hdma->Parent);
/* Disable the DMA channel */
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_tim.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_tim.c
index 80cc1e8cb3..30037a4c1c 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_tim.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_tim.c
@@ -3822,13 +3822,16 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
*/
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
+ uint32_t itsource = htim->Instance->DIER;
+ uint32_t itflag = htim->Instance->SR;
+
/* Capture compare 1 event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
+ if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET)
+ if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1))
{
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1);
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
/* Input capture event */
@@ -3856,11 +3859,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* Capture compare 2 event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
+ if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET)
+ if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2);
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
/* Input capture event */
if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
@@ -3886,11 +3889,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* Capture compare 3 event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
+ if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET)
+ if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3);
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
/* Input capture event */
if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
@@ -3916,11 +3919,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* Capture compare 4 event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
+ if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET)
+ if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4);
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
/* Input capture event */
if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
@@ -3946,11 +3949,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* TIM Update event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
+ if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET)
+ if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->PeriodElapsedCallback(htim);
#else
@@ -3959,11 +3962,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* TIM Break input event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
+ if ((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET)
+ if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->BreakCallback(htim);
#else
@@ -3972,11 +3975,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* TIM Trigger detection event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
+ if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET)
+ if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->TriggerCallback(htim);
#else
@@ -3985,11 +3988,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* TIM commutation event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
+ if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET)
+ if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->CommutationCallback(htim);
#else
@@ -4476,7 +4479,8 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_O
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
- uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, uint32_t BurstLength)
+ uint32_t BurstRequestSrc, const uint32_t *BurstBuffer,
+ uint32_t BurstLength)
{
HAL_StatusTypeDef status;
@@ -6810,6 +6814,13 @@ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
+
+ /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
+ if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
+ {
+ /* Clear the update flag */
+ CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
+ }
}
/**
@@ -6934,7 +6945,6 @@ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
tmpccer |= (OC_Config->OCNPolarity << 4U);
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC2NE;
-
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_tim_ex.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_tim_ex.c
index 85e84f50de..2af37ec3b5 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_tim_ex.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_tim_ex.c
@@ -835,7 +835,7 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channe
/* Disable the TIM Break interrupt (only if no more channel is active) */
tmpccer = htim->Instance->CCER;
- if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
+ if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET)
{
__HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
}
@@ -1081,17 +1081,6 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Chann
(+) Stop the Complementary PWM and disable interrupts.
(+) Start the Complementary PWM and enable DMA transfers.
(+) Stop the Complementary PWM and disable DMA transfers.
- (+) Start the Complementary Input Capture measurement.
- (+) Stop the Complementary Input Capture.
- (+) Start the Complementary Input Capture and enable interrupts.
- (+) Stop the Complementary Input Capture and disable interrupts.
- (+) Start the Complementary Input Capture and enable DMA transfers.
- (+) Stop the Complementary Input Capture and disable DMA transfers.
- (+) Start the Complementary One Pulse generation.
- (+) Stop the Complementary One Pulse.
- (+) Start the Complementary One Pulse and enable interrupts.
- (+) Stop the Complementary One Pulse and disable interrupts.
-
@endverbatim
* @{
*/
@@ -1317,7 +1306,7 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Chann
/* Disable the TIM Break interrupt (only if no more channel is active) */
tmpccer = htim->Instance->CCER;
- if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
+ if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET)
{
__HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
}
@@ -2122,7 +2111,7 @@ HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
*/
/**
- * @brief Hall commutation changed callback in non-blocking mode
+ * @brief Commutation callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
@@ -2136,7 +2125,7 @@ __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
*/
}
/**
- * @brief Hall commutation changed half complete callback in non-blocking mode
+ * @brief Commutation half complete callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
@@ -2151,7 +2140,7 @@ __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
}
/**
- * @brief Hall Break detection callback in non-blocking mode
+ * @brief Break detection callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
@@ -2302,15 +2291,6 @@ static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma)
TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
}
}
- else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
-
- if (hdma->Init.Mode == DMA_NORMAL)
- {
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
- }
- }
else
{
/* nothing to do */
@@ -2379,13 +2359,13 @@ static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Cha
{
uint32_t tmp;
- tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
+ tmp = TIM_CCER_CC1NE << (Channel & 0xFU); /* 0xFU = 15 bits max shift */
/* Reset the CCxNE Bit */
TIMx->CCER &= ~tmp;
/* Set or reset the CCxNE Bit */
- TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
+ TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0xFU)); /* 0xFU = 15 bits max shift */
}
/**
* @}
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_uart.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_uart.c
index 0e117a598d..3ea2da539e 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_uart.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_uart.c
@@ -1165,6 +1165,8 @@ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pD
{
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
{
+ huart->gState = HAL_UART_STATE_READY;
+
return HAL_TIMEOUT;
}
if (pdata8bits == NULL)
@@ -1182,6 +1184,8 @@ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pD
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
{
+ huart->gState = HAL_UART_STATE_READY;
+
return HAL_TIMEOUT;
}
@@ -1249,6 +1253,8 @@ HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, ui
{
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
{
+ huart->RxState = HAL_UART_STATE_READY;
+
return HAL_TIMEOUT;
}
if (pdata8bits == NULL)
@@ -1777,21 +1783,18 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_
status = UART_Start_Receive_DMA(huart, pData, Size);
/* Check Rx process has been successfully started */
- if (status == HAL_OK)
+ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
{
- if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- {
- __HAL_UART_CLEAR_IDLEFLAG(huart);
- ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
- }
- else
- {
- /* In case of errors already pending when reception is started,
- Interrupts may have already been raised and lead to reception abortion.
- (Overrun error for instance).
- In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */
- status = HAL_ERROR;
- }
+ __HAL_UART_CLEAR_IDLEFLAG(huart);
+ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
+ }
+ else
+ {
+ /* In case of errors already pending when reception is started,
+ Interrupts may have already been raised and lead to reception abortion.
+ (Overrun error for instance).
+ In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */
+ status = HAL_ERROR;
}
return status;
@@ -3179,19 +3182,31 @@ static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart,
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
{
- if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
+ if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
{
- /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- huart->gState = HAL_UART_STATE_READY;
- huart->RxState = HAL_UART_STATE_READY;
+ return HAL_TIMEOUT;
+ }
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
+ if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
+ {
+ if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
+ {
+ /* Clear Overrun Error flag*/
+ __HAL_UART_CLEAR_OREFLAG(huart);
- return HAL_TIMEOUT;
+ /* Blocking error : transfer is aborted
+ Set the UART state ready to be able to start again the process,
+ Disable Rx Interrupts if ongoing */
+ UART_EndRxTransfer(huart);
+
+ huart->ErrorCode = HAL_UART_ERROR_ORE;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(huart);
+
+ return HAL_ERROR;
+ }
}
}
}
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_usart.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_usart.c
index dcc8ea9c98..32d42ead4d 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_usart.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_usart.c
@@ -2080,6 +2080,9 @@ uint32_t HAL_USART_GetError(const USART_HandleTypeDef *husart)
return husart->ErrorCode;
}
+/**
+ * @}
+ */
/**
* @}
*/
@@ -2794,10 +2797,6 @@ static void USART_SetConfig(USART_HandleTypeDef *husart)
}
}
-/**
- * @}
- */
-
/**
* @}
*/
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_wwdg.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_wwdg.c
index 9cc9b1235f..8ac487ee7b 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_wwdg.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_wwdg.c
@@ -122,7 +122,6 @@
(+) __HAL_WWDG_ENABLE_IT: Enable the WWDG early wakeup interrupt
@endverbatim
- ******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_fsmc.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_fsmc.c
index d4f52dc3da..5c0c20d73d 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_fsmc.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_fsmc.c
@@ -60,7 +60,7 @@
* @{
*/
#if defined(HAL_NOR_MODULE_ENABLED) || defined(HAL_NAND_MODULE_ENABLED) || defined(HAL_PCCARD_MODULE_ENABLED) \
- || defined(HAL_SRAM_MODULE_ENABLED)
+ || defined(HAL_SRAM_MODULE_ENABLED)
/** @defgroup FSMC_LL FSMC Low Layer
* @brief FSMC driver modules
@@ -193,7 +193,7 @@
* @retval HAL status
*/
HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device,
- FSMC_NORSRAM_InitTypeDef *Init)
+ const FSMC_NORSRAM_InitTypeDef *Init)
{
uint32_t flashaccess;
uint32_t btcr_reg;
@@ -273,7 +273,7 @@ HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device,
* @retval HAL status
*/
HAL_StatusTypeDef FSMC_NORSRAM_DeInit(FSMC_NORSRAM_TypeDef *Device,
- FSMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank)
+ FSMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank)
{
/* Check the parameters */
assert_param(IS_FSMC_NORSRAM_DEVICE(Device));
@@ -310,7 +310,7 @@ HAL_StatusTypeDef FSMC_NORSRAM_DeInit(FSMC_NORSRAM_TypeDef *Device,
* @retval HAL status
*/
HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device,
- FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank)
+ const FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank)
{
/* Check the parameters */
@@ -325,13 +325,14 @@ HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device,
assert_param(IS_FSMC_NORSRAM_BANK(Bank));
/* Set FSMC_NORSRAM device timing parameters */
- MODIFY_REG(Device->BTCR[Bank + 1U], BTR_CLEAR_MASK, (Timing->AddressSetupTime |
- ((Timing->AddressHoldTime) << FSMC_BTR1_ADDHLD_Pos) |
- ((Timing->DataSetupTime) << FSMC_BTR1_DATAST_Pos) |
- ((Timing->BusTurnAroundDuration) << FSMC_BTR1_BUSTURN_Pos) |
- (((Timing->CLKDivision) - 1U) << FSMC_BTR1_CLKDIV_Pos) |
- (((Timing->DataLatency) - 2U) << FSMC_BTR1_DATLAT_Pos) |
- (Timing->AccessMode)));
+ Device->BTCR[Bank + 1U] =
+ (Timing->AddressSetupTime << FSMC_BTR1_ADDSET_Pos) |
+ (Timing->AddressHoldTime << FSMC_BTR1_ADDHLD_Pos) |
+ (Timing->DataSetupTime << FSMC_BTR1_DATAST_Pos) |
+ (Timing->BusTurnAroundDuration << FSMC_BTR1_BUSTURN_Pos) |
+ ((Timing->CLKDivision - 1U) << FSMC_BTR1_CLKDIV_Pos) |
+ ((Timing->DataLatency - 2U) << FSMC_BTR1_DATLAT_Pos) |
+ Timing->AccessMode;
return HAL_OK;
}
@@ -349,8 +350,8 @@ HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device,
* @retval HAL status
*/
HAL_StatusTypeDef FSMC_NORSRAM_Extended_Timing_Init(FSMC_NORSRAM_EXTENDED_TypeDef *Device,
- FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank,
- uint32_t ExtendedMode)
+ const FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank,
+ uint32_t ExtendedMode)
{
/* Check the parameters */
assert_param(IS_FSMC_EXTENDED_MODE(ExtendedMode));
@@ -494,7 +495,7 @@ HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Disable(FSMC_NORSRAM_TypeDef *Devi
* @param Init Pointer to NAND Initialization structure
* @retval HAL status
*/
-HAL_StatusTypeDef FSMC_NAND_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_InitTypeDef *Init)
+HAL_StatusTypeDef FSMC_NAND_Init(FSMC_NAND_TypeDef *Device, const FSMC_NAND_InitTypeDef *Init)
{
/* Check the parameters */
assert_param(IS_FSMC_NAND_DEVICE(Device));
@@ -542,7 +543,7 @@ HAL_StatusTypeDef FSMC_NAND_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_InitTypeDe
* @retval HAL status
*/
HAL_StatusTypeDef FSMC_NAND_CommonSpace_Timing_Init(FSMC_NAND_TypeDef *Device,
- FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank)
+ const FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank)
{
/* Check the parameters */
assert_param(IS_FSMC_NAND_DEVICE(Device));
@@ -582,7 +583,7 @@ HAL_StatusTypeDef FSMC_NAND_CommonSpace_Timing_Init(FSMC_NAND_TypeDef *Device,
* @retval HAL status
*/
HAL_StatusTypeDef FSMC_NAND_AttributeSpace_Timing_Init(FSMC_NAND_TypeDef *Device,
- FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank)
+ const FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank)
{
/* Check the parameters */
assert_param(IS_FSMC_NAND_DEVICE(Device));
@@ -729,8 +730,8 @@ HAL_StatusTypeDef FSMC_NAND_ECC_Disable(FSMC_NAND_TypeDef *Device, uint32_t Bank
* @param Timeout Timeout wait value
* @retval HAL status
*/
-HAL_StatusTypeDef FSMC_NAND_GetECC(FSMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank,
- uint32_t Timeout)
+HAL_StatusTypeDef FSMC_NAND_GetECC(const FSMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank,
+ uint32_t Timeout)
{
uint32_t tickstart;
@@ -820,7 +821,7 @@ HAL_StatusTypeDef FSMC_NAND_GetECC(FSMC_NAND_TypeDef *Device, uint32_t *ECCval,
* @param Init Pointer to PCCARD Initialization structure
* @retval HAL status
*/
-HAL_StatusTypeDef FSMC_PCCARD_Init(FSMC_PCCARD_TypeDef *Device, FSMC_PCCARD_InitTypeDef *Init)
+HAL_StatusTypeDef FSMC_PCCARD_Init(FSMC_PCCARD_TypeDef *Device, const FSMC_PCCARD_InitTypeDef *Init)
{
/* Check the parameters */
assert_param(IS_FSMC_PCCARD_DEVICE(Device));
@@ -854,7 +855,7 @@ HAL_StatusTypeDef FSMC_PCCARD_Init(FSMC_PCCARD_TypeDef *Device, FSMC_PCCARD_Init
* @retval HAL status
*/
HAL_StatusTypeDef FSMC_PCCARD_CommonSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device,
- FSMC_NAND_PCC_TimingTypeDef *Timing)
+ const FSMC_NAND_PCC_TimingTypeDef *Timing)
{
/* Check the parameters */
assert_param(IS_FSMC_PCCARD_DEVICE(Device));
@@ -883,7 +884,7 @@ HAL_StatusTypeDef FSMC_PCCARD_CommonSpace_Timing_Init(FSMC_PCCARD_TypeDef *Devic
* @retval HAL status
*/
HAL_StatusTypeDef FSMC_PCCARD_AttributeSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device,
- FSMC_NAND_PCC_TimingTypeDef *Timing)
+ const FSMC_NAND_PCC_TimingTypeDef *Timing)
{
/* Check the parameters */
assert_param(IS_FSMC_PCCARD_DEVICE(Device));
@@ -912,7 +913,7 @@ HAL_StatusTypeDef FSMC_PCCARD_AttributeSpace_Timing_Init(FSMC_PCCARD_TypeDef *De
* @retval HAL status
*/
HAL_StatusTypeDef FSMC_PCCARD_IOSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device,
- FSMC_NAND_PCC_TimingTypeDef *Timing)
+ const FSMC_NAND_PCC_TimingTypeDef *Timing)
{
/* Check the parameters */
assert_param(IS_FSMC_PCCARD_DEVICE(Device));
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_spi.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_spi.c
index 097ebf6304..1ed0a4e00e 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_spi.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_spi.c
@@ -119,7 +119,7 @@
* - SUCCESS: SPI registers are de-initialized
* - ERROR: SPI registers are not de-initialized
*/
-ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx)
+ErrorStatus LL_SPI_DeInit(const SPI_TypeDef *SPIx)
{
ErrorStatus status = ERROR;
@@ -168,8 +168,9 @@ ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx)
/**
* @brief Initialize the SPI registers according to the specified parameters in SPI_InitStruct.
- * @note As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
- * SPI peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
+ * @note As some bits in SPI configuration registers can only be written when the
+ * SPI is disabled (SPI_CR1_SPE bit = 0), SPI peripheral should be in disabled state prior
+ * calling this function. Otherwise, ERROR result will be returned.
* @param SPIx SPI Instance
* @param SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
* @retval An ErrorStatus enumeration value. (Return always SUCCESS)
@@ -345,7 +346,7 @@ void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct)
* - SUCCESS: SPI registers are de-initialized
* - ERROR: SPI registers are not de-initialized
*/
-ErrorStatus LL_I2S_DeInit(SPI_TypeDef *SPIx)
+ErrorStatus LL_I2S_DeInit(const SPI_TypeDef *SPIx)
{
return LL_SPI_DeInit(SPIx);
}
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_tim.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_tim.c
index 4d067b3047..e025d04062 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_tim.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_tim.c
@@ -748,8 +748,6 @@ static ErrorStatus OC1Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM
assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
- assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
- assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
/* Disable the Channel 1: Reset the CC1E Bit */
CLEAR_BIT(TIMx->CCER, TIM_CCER_CC1E);
@@ -777,8 +775,10 @@ static ErrorStatus OC1Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM
if (IS_TIM_BREAK_INSTANCE(TIMx))
{
- assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState));
+ assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
+ assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
+ assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
/* Set the complementary output Polarity */
MODIFY_REG(tmpccer, TIM_CCER_CC1NP, TIM_OCInitStruct->OCNPolarity << 2U);
@@ -827,8 +827,6 @@ static ErrorStatus OC2Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM
assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
- assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
- assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
/* Disable the Channel 2: Reset the CC2E Bit */
CLEAR_BIT(TIMx->CCER, TIM_CCER_CC2E);
@@ -856,8 +854,10 @@ static ErrorStatus OC2Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM
if (IS_TIM_BREAK_INSTANCE(TIMx))
{
- assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState));
+ assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
+ assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
+ assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
/* Set the complementary output Polarity */
MODIFY_REG(tmpccer, TIM_CCER_CC2NP, TIM_OCInitStruct->OCNPolarity << 6U);
@@ -906,8 +906,6 @@ static ErrorStatus OC3Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM
assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
- assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
- assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
/* Disable the Channel 3: Reset the CC3E Bit */
CLEAR_BIT(TIMx->CCER, TIM_CCER_CC3E);
@@ -935,8 +933,10 @@ static ErrorStatus OC3Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM
if (IS_TIM_BREAK_INSTANCE(TIMx))
{
- assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState));
+ assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
+ assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
+ assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
/* Set the complementary output Polarity */
MODIFY_REG(tmpccer, TIM_CCER_CC3NP, TIM_OCInitStruct->OCNPolarity << 10U);
@@ -985,8 +985,6 @@ static ErrorStatus OC4Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM
assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
- assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
- assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
/* Disable the Channel 4: Reset the CC4E Bit */
CLEAR_BIT(TIMx->CCER, TIM_CCER_CC4E);
@@ -1014,7 +1012,6 @@ static ErrorStatus OC4Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM
if (IS_TIM_BREAK_INSTANCE(TIMx))
{
- assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState));
/* Set the Output Idle state */
@@ -1036,7 +1033,6 @@ static ErrorStatus OC4Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM
return SUCCESS;
}
-
/**
* @brief Configure the TIMx input channel 1.
* @param TIMx Timer Instance
@@ -1161,7 +1157,7 @@ static ErrorStatus IC4Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM
(TIM_CCMR2_CC4S | TIM_CCMR2_IC4F | TIM_CCMR2_IC4PSC),
(TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPrescaler) >> 8U);
- /* Select the Polarity and set the CC2E Bit */
+ /* Select the Polarity and set the CC4E Bit */
MODIFY_REG(TIMx->CCER,
(TIM_CCER_CC4P | TIM_CCER_CC4NP),
((TIM_ICInitStruct->ICPolarity << 12U) | TIM_CCER_CC4E));
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_usb.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_usb.c
index fbf6f2eed4..5477e95aca 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_usb.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_usb.c
@@ -250,9 +250,9 @@ HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx, USB_OTG_ModeTy
do
{
- HAL_Delay(1U);
- ms++;
- } while ((USB_GetMode(USBx) != (uint32_t)USB_HOST_MODE) && (ms < 50U));
+ HAL_Delay(10U);
+ ms += 10U;
+ } while ((USB_GetMode(USBx) != (uint32_t)USB_HOST_MODE) && (ms < HAL_USB_CURRENT_MODE_MAX_DELAY_MS));
}
else if (mode == USB_DEVICE_MODE)
{
@@ -260,16 +260,16 @@ HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx, USB_OTG_ModeTy
do
{
- HAL_Delay(1U);
- ms++;
- } while ((USB_GetMode(USBx) != (uint32_t)USB_DEVICE_MODE) && (ms < 50U));
+ HAL_Delay(10U);
+ ms += 10U;
+ } while ((USB_GetMode(USBx) != (uint32_t)USB_DEVICE_MODE) && (ms < HAL_USB_CURRENT_MODE_MAX_DELAY_MS));
}
else
{
return HAL_ERROR;
}
- if (ms == 50U)
+ if (ms == HAL_USB_CURRENT_MODE_MAX_DELAY_MS)
{
return HAL_ERROR;
}
@@ -447,7 +447,7 @@ HAL_StatusTypeDef USB_FlushTxFifo(USB_OTG_GlobalTypeDef *USBx, uint32_t num)
{
count++;
- if (count > 200000U)
+ if (count > HAL_USB_TIMEOUT)
{
return HAL_TIMEOUT;
}
@@ -461,7 +461,7 @@ HAL_StatusTypeDef USB_FlushTxFifo(USB_OTG_GlobalTypeDef *USBx, uint32_t num)
{
count++;
- if (count > 200000U)
+ if (count > HAL_USB_TIMEOUT)
{
return HAL_TIMEOUT;
}
@@ -484,7 +484,7 @@ HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx)
{
count++;
- if (count > 200000U)
+ if (count > HAL_USB_TIMEOUT)
{
return HAL_TIMEOUT;
}
@@ -498,7 +498,7 @@ HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx)
{
count++;
- if (count > 200000U)
+ if (count > HAL_USB_TIMEOUT)
{
return HAL_TIMEOUT;
}
@@ -518,7 +518,7 @@ HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx)
* @arg USB_OTG_SPEED_FULL: Full speed mode
* @retval Hal status
*/
-HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx, uint8_t speed)
+HAL_StatusTypeDef USB_SetDevSpeed(const USB_OTG_GlobalTypeDef *USBx, uint8_t speed)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -534,7 +534,7 @@ HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx, uint8_t speed)
* @arg USBD_HS_SPEED: High speed mode
* @arg USBD_FS_SPEED: Full speed mode
*/
-uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx)
+uint8_t USB_GetDevSpeed(const USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint8_t speed;
@@ -563,7 +563,7 @@ uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx)
* @param ep pointer to endpoint structure
* @retval HAL status
*/
-HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
+HAL_StatusTypeDef USB_ActivateEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t epnum = (uint32_t)ep->num;
@@ -601,7 +601,7 @@ HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTy
* @param ep pointer to endpoint structure
* @retval HAL status
*/
-HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
+HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t epnum = (uint32_t)ep->num;
@@ -640,7 +640,7 @@ HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB
* @param ep pointer to endpoint structure
* @retval HAL status
*/
-HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
+HAL_StatusTypeDef USB_DeactivateEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t epnum = (uint32_t)ep->num;
@@ -687,7 +687,7 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EP
* @param ep pointer to endpoint structure
* @retval HAL status
*/
-HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
+HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t epnum = (uint32_t)ep->num;
@@ -901,7 +901,7 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef
* @param ep pointer to endpoint structure
* @retval HAL status
*/
-HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
+HAL_StatusTypeDef USB_EPStopXfer(const USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
{
__IO uint32_t count = 0U;
HAL_StatusTypeDef ret = HAL_OK;
@@ -965,7 +965,7 @@ HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef
* 1 : DMA feature used
* @retval HAL status
*/
-HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src,
+HAL_StatusTypeDef USB_WritePacket(const USB_OTG_GlobalTypeDef *USBx, uint8_t *src,
uint8_t ch_ep_num, uint16_t len, uint8_t dma)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -996,7 +996,7 @@ HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src,
* @param len Number of bytes to read
* @retval pointer to destination buffer
*/
-void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len)
+void *USB_ReadPacket(const USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint8_t *pDest = dest;
@@ -1038,7 +1038,7 @@ void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len)
* @param ep pointer to endpoint structure
* @retval HAL status
*/
-HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
+HAL_StatusTypeDef USB_EPSetStall(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t epnum = (uint32_t)ep->num;
@@ -1069,7 +1069,7 @@ HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef
* @param ep pointer to endpoint structure
* @retval HAL status
*/
-HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
+HAL_StatusTypeDef USB_EPClearStall(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t epnum = (uint32_t)ep->num;
@@ -1139,7 +1139,7 @@ HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx)
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
-HAL_StatusTypeDef USB_SetDevAddress(USB_OTG_GlobalTypeDef *USBx, uint8_t address)
+HAL_StatusTypeDef USB_SetDevAddress(const USB_OTG_GlobalTypeDef *USBx, uint8_t address)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1154,7 +1154,7 @@ HAL_StatusTypeDef USB_SetDevAddress(USB_OTG_GlobalTypeDef *USBx, uint8_t address
* @param USBx Selected device
* @retval HAL status
*/
-HAL_StatusTypeDef USB_DevConnect(USB_OTG_GlobalTypeDef *USBx)
+HAL_StatusTypeDef USB_DevConnect(const USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1171,7 +1171,7 @@ HAL_StatusTypeDef USB_DevConnect(USB_OTG_GlobalTypeDef *USBx)
* @param USBx Selected device
* @retval HAL status
*/
-HAL_StatusTypeDef USB_DevDisconnect(USB_OTG_GlobalTypeDef *USBx)
+HAL_StatusTypeDef USB_DevDisconnect(const USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1204,7 +1204,7 @@ uint32_t USB_ReadInterrupts(USB_OTG_GlobalTypeDef const *USBx)
* @param chnum Channel number
* @retval USB Channel Interrupt status
*/
-uint32_t USB_ReadChInterrupts(USB_OTG_GlobalTypeDef *USBx, uint8_t chnum)
+uint32_t USB_ReadChInterrupts(const USB_OTG_GlobalTypeDef *USBx, uint8_t chnum)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t tmpreg;
@@ -1220,7 +1220,7 @@ uint32_t USB_ReadChInterrupts(USB_OTG_GlobalTypeDef *USBx, uint8_t chnum)
* @param USBx Selected device
* @retval USB Device OUT EP interrupt status
*/
-uint32_t USB_ReadDevAllOutEpInterrupt(USB_OTG_GlobalTypeDef *USBx)
+uint32_t USB_ReadDevAllOutEpInterrupt(const USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t tmpreg;
@@ -1236,7 +1236,7 @@ uint32_t USB_ReadDevAllOutEpInterrupt(USB_OTG_GlobalTypeDef *USBx)
* @param USBx Selected device
* @retval USB Device IN EP interrupt status
*/
-uint32_t USB_ReadDevAllInEpInterrupt(USB_OTG_GlobalTypeDef *USBx)
+uint32_t USB_ReadDevAllInEpInterrupt(const USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t tmpreg;
@@ -1254,7 +1254,7 @@ uint32_t USB_ReadDevAllInEpInterrupt(USB_OTG_GlobalTypeDef *USBx)
* This parameter can be a value from 0 to 15
* @retval Device OUT EP Interrupt register
*/
-uint32_t USB_ReadDevOutEPInterrupt(USB_OTG_GlobalTypeDef *USBx, uint8_t epnum)
+uint32_t USB_ReadDevOutEPInterrupt(const USB_OTG_GlobalTypeDef *USBx, uint8_t epnum)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t tmpreg;
@@ -1272,7 +1272,7 @@ uint32_t USB_ReadDevOutEPInterrupt(USB_OTG_GlobalTypeDef *USBx, uint8_t epnum)
* This parameter can be a value from 0 to 15
* @retval Device IN EP Interrupt register
*/
-uint32_t USB_ReadDevInEPInterrupt(USB_OTG_GlobalTypeDef *USBx, uint8_t epnum)
+uint32_t USB_ReadDevInEPInterrupt(const USB_OTG_GlobalTypeDef *USBx, uint8_t epnum)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t tmpreg;
@@ -1306,7 +1306,7 @@ void USB_ClearInterrupts(USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt)
* 0 : Host
* 1 : Device
*/
-uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx)
+uint32_t USB_GetMode(const USB_OTG_GlobalTypeDef *USBx)
{
return ((USBx->GINTSTS) & 0x1U);
}
@@ -1316,7 +1316,7 @@ uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx)
* @param USBx Selected device
* @retval HAL status
*/
-HAL_StatusTypeDef USB_ActivateSetup(USB_OTG_GlobalTypeDef *USBx)
+HAL_StatusTypeDef USB_ActivateSetup(const USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1338,10 +1338,10 @@ HAL_StatusTypeDef USB_ActivateSetup(USB_OTG_GlobalTypeDef *USBx)
* @param psetup pointer to setup packet
* @retval HAL status
*/
-HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup)
+HAL_StatusTypeDef USB_EP0_OutStart(const USB_OTG_GlobalTypeDef *USBx, uint8_t dma, const uint8_t *psetup)
{
uint32_t USBx_BASE = (uint32_t)USBx;
- uint32_t gSNPSiD = *(__IO uint32_t *)(&USBx->CID + 0x1U);
+ uint32_t gSNPSiD = *(__IO const uint32_t *)(&USBx->CID + 0x1U);
if (gSNPSiD > USB_OTG_CORE_ID_300A)
{
@@ -1380,7 +1380,7 @@ static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx)
{
count++;
- if (count > 200000U)
+ if (count > HAL_USB_TIMEOUT)
{
return HAL_TIMEOUT;
}
@@ -1394,7 +1394,7 @@ static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx)
{
count++;
- if (count > 200000U)
+ if (count > HAL_USB_TIMEOUT)
{
return HAL_TIMEOUT;
}
@@ -1425,7 +1425,7 @@ HAL_StatusTypeDef USB_HostInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef c
USBx->GCCFG &= ~(USB_OTG_GCCFG_VBUSASEN);
USBx->GCCFG &= ~(USB_OTG_GCCFG_VBUSBSEN);
- if ((USBx->CID & (0x1U << 8)) != 0U)
+ if ((USBx->GUSBCFG & USB_OTG_GUSBCFG_PHYSEL) == 0U)
{
if (cfg.speed == USBH_FSLS_SPEED)
{
@@ -1467,8 +1467,8 @@ HAL_StatusTypeDef USB_HostInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef c
/* Clear any pending interrupts */
USBx->GINTSTS = CLEAR_INTERRUPT_MASK;
-
- if ((USBx->CID & (0x1U << 8)) != 0U)
+#if defined (USB_OTG_HS)
+ if (USBx == USB_OTG_HS)
{
/* set Rx FIFO size */
USBx->GRXFSIZ = 0x200U;
@@ -1476,6 +1476,7 @@ HAL_StatusTypeDef USB_HostInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef c
USBx->HPTXFSIZ = (uint32_t)(((0xE0U << 16) & USB_OTG_HPTXFSIZ_PTXFD) | 0x300U);
}
else
+#endif /* defined (USB_OTG_HS) */
{
/* set Rx FIFO size */
USBx->GRXFSIZ = 0x80U;
@@ -1507,7 +1508,7 @@ HAL_StatusTypeDef USB_HostInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef c
* HCFG_6_MHZ : Low Speed 6 MHz Clock
* @retval HAL status
*/
-HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx, uint8_t freq)
+HAL_StatusTypeDef USB_InitFSLSPClkSel(const USB_OTG_GlobalTypeDef *USBx, uint8_t freq)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1537,7 +1538,7 @@ HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx, uint8_t freq)
* @note (1)The application must wait at least 10 ms
* before clearing the reset bit.
*/
-HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx)
+HAL_StatusTypeDef USB_ResetPort(const USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1564,7 +1565,7 @@ HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx)
* 1 : Activate VBUS
* @retval HAL status
*/
-HAL_StatusTypeDef USB_DriveVbus(USB_OTG_GlobalTypeDef *USBx, uint8_t state)
+HAL_StatusTypeDef USB_DriveVbus(const USB_OTG_GlobalTypeDef *USBx, uint8_t state)
{
uint32_t USBx_BASE = (uint32_t)USBx;
__IO uint32_t hprt0 = 0U;
@@ -1670,11 +1671,13 @@ HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num,
}
else
{
- if ((USBx->CID & (0x1U << 8)) != 0U)
+#if defined (USB_OTG_HS)
+ if (USBx == USB_OTG_HS)
{
USBx_HC((uint32_t)ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_NYET |
USB_OTG_HCINTMSK_ACKM;
}
+#endif /* defined (USB_OTG_HS) */
}
break;
@@ -1779,12 +1782,13 @@ HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDe
uint16_t num_packets;
uint16_t max_hc_pkt_count = HC_MAX_PKT_CNT;
- if ((USBx->CID & (0x1U << 8)) != 0U)
+#if defined (USB_OTG_HS)
+ if (USBx == USB_OTG_HS)
{
/* in DMA mode host Core automatically issues ping in case of NYET/NAK */
if (dma == 1U)
{
- if ((hc->ep_type == EP_TYPE_CTRL) || (hc->ep_type == EP_TYPE_BULK))
+ if (((hc->ep_type == EP_TYPE_CTRL) || (hc->ep_type == EP_TYPE_BULK)) && (hc->do_ssplit == 0U))
{
USBx_HC((uint32_t)ch_num)->HCINTMSK &= ~(USB_OTG_HCINTMSK_NYET |
@@ -1801,6 +1805,7 @@ HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDe
}
}
}
+#endif /* defined (USB_OTG_HS) */
if (hc->do_ssplit == 1U)
{
@@ -2030,7 +2035,7 @@ HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDe
* @param USBx Selected device
* @retval HAL state
*/
-uint32_t USB_HC_ReadInterrupt(USB_OTG_GlobalTypeDef *USBx)
+uint32_t USB_HC_ReadInterrupt(const USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -2044,7 +2049,7 @@ uint32_t USB_HC_ReadInterrupt(USB_OTG_GlobalTypeDef *USBx)
* This parameter can be a value from 1 to 15
* @retval HAL state
*/
-HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num)
+HAL_StatusTypeDef USB_HC_Halt(const USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t hcnum = (uint32_t)hc_num;
@@ -2128,7 +2133,7 @@ HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num)
* This parameter can be a value from 1 to 15
* @retval HAL state
*/
-HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num)
+HAL_StatusTypeDef USB_DoPing(const USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t chnum = (uint32_t)ch_num;
@@ -2217,7 +2222,7 @@ HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx)
* @param USBx Selected device
* @retval HAL status
*/
-HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx)
+HAL_StatusTypeDef USB_ActivateRemoteWakeup(const USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -2235,7 +2240,7 @@ HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx)
* @param USBx Selected device
* @retval HAL status
*/
-HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx)
+HAL_StatusTypeDef USB_DeActivateRemoteWakeup(const USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
diff --git a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_utils.c b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_utils.c
index 646edd10b0..d0bf20b8bf 100644
--- a/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_utils.c
+++ b/system/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_utils.c
@@ -339,28 +339,25 @@ ErrorStatus LL_SetFlashLatency(uint32_t HCLK_Frequency)
latency = LL_FLASH_LATENCY_0;
}
}
- if (status != ERROR)
- {
- LL_FLASH_SetLatency(latency);
+ LL_FLASH_SetLatency(latency);
- /* Check that the new number of wait states is taken into account to access the Flash
- memory by reading the FLASH_ACR register */
- timeout = 2;
- do
- {
+ /* Check that the new number of wait states is taken into account to access the Flash
+ memory by reading the FLASH_ACR register */
+ timeout = 2;
+ do
+ {
/* Wait for Flash latency to be updated */
getlatency = LL_FLASH_GetLatency();
timeout--;
- } while ((getlatency != latency) && (timeout > 0));
+ } while ((getlatency != latency) && (timeout > 0));
- if(getlatency != latency)
- {
- status = ERROR;
- }
- else
- {
- status = SUCCESS;
- }
+ if(getlatency != latency)
+ {
+ status = ERROR;
+ }
+ else
+ {
+ /* No thing to do */
}
}
return status;
diff --git a/system/Drivers/STM32YYxx_HAL_Driver_version.md b/system/Drivers/STM32YYxx_HAL_Driver_version.md
index 532aef1045..9ec13821e6 100644
--- a/system/Drivers/STM32YYxx_HAL_Driver_version.md
+++ b/system/Drivers/STM32YYxx_HAL_Driver_version.md
@@ -3,7 +3,7 @@
* STM32C0: 1.2.0
* STM32F0: 1.7.8
* STM32F1: 1.1.9
- * STM32F2: 1.2.8
+ * STM32F2: 1.2.9
* STM32F3: 1.5.8
* STM32F4: 1.8.3
* STM32F7: 1.3.1
diff --git a/variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T/PeripheralPins.c b/variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T/PeripheralPins.c
index a4ab5814e5..e9f48a32d8 100644
--- a/variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T/PeripheralPins.c
+++ b/variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T/PeripheralPins.c
@@ -13,7 +13,7 @@
/*
* Automatically generated from STM32F205R(B-C-E-F-G)Tx.xml, STM32F205R(E-G)Yx.xml
* STM32F205RGEx.xml, STM32F215R(E-G)Tx.xml
- * CubeMX DB release 6.0.110
+ * CubeMX DB release 6.0.120
*/
#if !defined(CUSTOM_PERIPHERAL_PINS)
#include "Arduino.h"
diff --git a/variants/STM32F2xx/F205V(B-C-E-F-G)T_F215V(E-G)T/PeripheralPins.c b/variants/STM32F2xx/F205V(B-C-E-F-G)T_F215V(E-G)T/PeripheralPins.c
index b07a0d56a0..0c096d9448 100644
--- a/variants/STM32F2xx/F205V(B-C-E-F-G)T_F215V(E-G)T/PeripheralPins.c
+++ b/variants/STM32F2xx/F205V(B-C-E-F-G)T_F215V(E-G)T/PeripheralPins.c
@@ -12,7 +12,7 @@
*/
/*
* Automatically generated from STM32F205V(B-C-E-F-G)Tx.xml, STM32F215V(E-G)Tx.xml
- * CubeMX DB release 6.0.110
+ * CubeMX DB release 6.0.120
*/
#if !defined(CUSTOM_PERIPHERAL_PINS)
#include "Arduino.h"
diff --git a/variants/STM32F2xx/F205Z(C-E-F-G)T_F215Z(E-G)T/PeripheralPins.c b/variants/STM32F2xx/F205Z(C-E-F-G)T_F215Z(E-G)T/PeripheralPins.c
index 391eefcd1e..123000be46 100644
--- a/variants/STM32F2xx/F205Z(C-E-F-G)T_F215Z(E-G)T/PeripheralPins.c
+++ b/variants/STM32F2xx/F205Z(C-E-F-G)T_F215Z(E-G)T/PeripheralPins.c
@@ -12,7 +12,7 @@
*/
/*
* Automatically generated from STM32F205Z(C-E-F-G)Tx.xml, STM32F215Z(E-G)Tx.xml
- * CubeMX DB release 6.0.110
+ * CubeMX DB release 6.0.120
*/
#if !defined(CUSTOM_PERIPHERAL_PINS)
#include "Arduino.h"
diff --git a/variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)/PeripheralPins.c b/variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)/PeripheralPins.c
index a7fb33edd9..65b456bf6a 100644
--- a/variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)/PeripheralPins.c
+++ b/variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)/PeripheralPins.c
@@ -13,7 +13,7 @@
/*
* Automatically generated from STM32F207I(C-E-F-G)Hx.xml, STM32F207I(C-E-F-G)Tx.xml
* STM32F217I(E-G)Hx.xml, STM32F217I(E-G)Tx.xml
- * CubeMX DB release 6.0.110
+ * CubeMX DB release 6.0.120
*/
#if !defined(CUSTOM_PERIPHERAL_PINS)
#include "Arduino.h"
diff --git a/variants/STM32F2xx/F207V(C-E-F-G)T_F217V(E-G)T/PeripheralPins.c b/variants/STM32F2xx/F207V(C-E-F-G)T_F217V(E-G)T/PeripheralPins.c
index a0d642a4a8..ab36f6c801 100644
--- a/variants/STM32F2xx/F207V(C-E-F-G)T_F217V(E-G)T/PeripheralPins.c
+++ b/variants/STM32F2xx/F207V(C-E-F-G)T_F217V(E-G)T/PeripheralPins.c
@@ -12,7 +12,7 @@
*/
/*
* Automatically generated from STM32F207V(C-E-F-G)Tx.xml, STM32F217V(E-G)Tx.xml
- * CubeMX DB release 6.0.110
+ * CubeMX DB release 6.0.120
*/
#if !defined(CUSTOM_PERIPHERAL_PINS)
#include "Arduino.h"
diff --git a/variants/STM32F2xx/F207Z(C-E-F-G)T_F217Z(E-G)T/PeripheralPins.c b/variants/STM32F2xx/F207Z(C-E-F-G)T_F217Z(E-G)T/PeripheralPins.c
index ea49234585..96221815a3 100644
--- a/variants/STM32F2xx/F207Z(C-E-F-G)T_F217Z(E-G)T/PeripheralPins.c
+++ b/variants/STM32F2xx/F207Z(C-E-F-G)T_F217Z(E-G)T/PeripheralPins.c
@@ -12,7 +12,7 @@
*/
/*
* Automatically generated from STM32F207Z(C-E-F-G)Tx.xml, STM32F217Z(E-G)Tx.xml
- * CubeMX DB release 6.0.110
+ * CubeMX DB release 6.0.120
*/
#if !defined(CUSTOM_PERIPHERAL_PINS)
#include "Arduino.h"
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