diff --git a/CI/build/conf/cores_config.json b/CI/build/conf/cores_config.json
index 3b8a05c8f7..baf56c80e4 100644
--- a/CI/build/conf/cores_config.json
+++ b/CI/build/conf/cores_config.json
@@ -49,6 +49,7 @@
             "GENERIC_C031C4UX",
             "GENERIC_C031C6TX",
             "GENERIC_C031F4PX",
+            "GENERIC_C071R8TX",
             "GENERIC_F031C4TX",
             "GENERIC_F031E6YX",
             "GENERIC_F031F4PX",
diff --git a/CI/build/conf/cores_config_ci.json b/CI/build/conf/cores_config_ci.json
index 37c728eb54..c8f42cb299 100644
--- a/CI/build/conf/cores_config_ci.json
+++ b/CI/build/conf/cores_config_ci.json
@@ -49,6 +49,7 @@
             "GENERIC_C031C4UX",
             "GENERIC_C031C6TX",
             "GENERIC_C031F4PX",
+            "GENERIC_C071R8TX",
             "GENERIC_F031C4TX",
             "GENERIC_F031E6YX",
             "GENERIC_F031F4PX",
diff --git a/README.md b/README.md
index aa440294e6..6208bd526d 100644
--- a/README.md
+++ b/README.md
@@ -214,6 +214,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
 | :green_heart: | STM32C011J4<br>STM32C011J6 | Generic Board | *2.8.0* |  |
 | :green_heart: | STM32C031C4<br>STM32C031C6 | Generic Board | *2.5.0* |  |
 | :green_heart: | STM32C031F4<br>STM32C031F6 | Generic Board | *2.6.0* |  |
+| :yellow_heart: | STM32C071R8<br>STM32C071RB | Generic Board | **2.9.0** | |
 
 ### Generic STM32F0 boards
 
diff --git a/boards.txt b/boards.txt
index 176436cb1f..1d9c4e3786 100644
--- a/boards.txt
+++ b/boards.txt
@@ -1668,6 +1668,22 @@ GenC0.menu.pnum.GENERIC_C031F6PX.build.product_line=STM32C031xx
 GenC0.menu.pnum.GENERIC_C031F6PX.build.variant=STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P
 GenC0.menu.pnum.GENERIC_C031F6PX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C031.svd
 
+# Generic C071R8Tx
+GenC0.menu.pnum.GENERIC_C071R8TX=Generic C071R8Tx
+GenC0.menu.pnum.GENERIC_C071R8TX.upload.maximum_size=65536
+GenC0.menu.pnum.GENERIC_C071R8TX.upload.maximum_data_size=24576
+GenC0.menu.pnum.GENERIC_C071R8TX.build.board=GENERIC_C071R8TX
+GenC0.menu.pnum.GENERIC_C071R8TX.build.product_line=STM32C071xx
+GenC0.menu.pnum.GENERIC_C071R8TX.build.variant=STM32C0xx/C071R(8-B)T
+
+# Generic C071RBTx
+GenC0.menu.pnum.GENERIC_C071RBTX=Generic C071RBTx
+GenC0.menu.pnum.GENERIC_C071RBTX.upload.maximum_size=131072
+GenC0.menu.pnum.GENERIC_C071RBTX.upload.maximum_data_size=24576
+GenC0.menu.pnum.GENERIC_C071RBTX.build.board=GENERIC_C071RBTX
+GenC0.menu.pnum.GENERIC_C071RBTX.build.product_line=STM32C071xx
+GenC0.menu.pnum.GENERIC_C071RBTX.build.variant=STM32C0xx/C071R(8-B)T
+
 # Upload menu
 GenC0.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
 GenC0.menu.upload_method.swdMethod.upload.protocol=swd
diff --git a/cmake/boards_db.cmake b/cmake/boards_db.cmake
index 0ec713977b..02227fa14c 100644
--- a/cmake/boards_db.cmake
+++ b/cmake/boards_db.cmake
@@ -7130,6 +7130,114 @@ target_compile_options(GENERIC_C031F6PX_serial_none INTERFACE
   "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
 )
 
+# GENERIC_C071R8TX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_C071R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C0xx/C071R(8-B)T")
+set(GENERIC_C071R8TX_MAXSIZE 65536)
+set(GENERIC_C071R8TX_MAXDATASIZE 24576)
+set(GENERIC_C071R8TX_MCU cortex-m0plus)
+set(GENERIC_C071R8TX_FPCONF "-")
+add_library(GENERIC_C071R8TX INTERFACE)
+target_compile_options(GENERIC_C071R8TX INTERFACE
+  "SHELL:-DSTM32C071xx  -D__CORTEX_SC=0"
+  "SHELL:"
+  "SHELL:"
+  "SHELL: "
+  -mcpu=${GENERIC_C071R8TX_MCU}
+)
+target_compile_definitions(GENERIC_C071R8TX INTERFACE
+  "STM32C0xx"
+	"ARDUINO_GENERIC_C071R8TX"
+	"BOARD_NAME=\"GENERIC_C071R8TX\""
+	"BOARD_ID=GENERIC_C071R8TX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_C071R8TX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32C0xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Source/Templates/gcc/
+  ${GENERIC_C071R8TX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_C071R8TX INTERFACE
+  "LINKER:--default-script=${GENERIC_C071R8TX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=65536"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=24576"
+  "SHELL: "
+  -mcpu=${GENERIC_C071R8TX_MCU}
+)
+
+add_library(GENERIC_C071R8TX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_C071R8TX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_C071R8TX_serial_generic INTERFACE)
+target_compile_options(GENERIC_C071R8TX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_C071R8TX_serial_none INTERFACE)
+target_compile_options(GENERIC_C071R8TX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+
+# GENERIC_C071RBTX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_C071RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C0xx/C071R(8-B)T")
+set(GENERIC_C071RBTX_MAXSIZE 131072)
+set(GENERIC_C071RBTX_MAXDATASIZE 24576)
+set(GENERIC_C071RBTX_MCU cortex-m0plus)
+set(GENERIC_C071RBTX_FPCONF "-")
+add_library(GENERIC_C071RBTX INTERFACE)
+target_compile_options(GENERIC_C071RBTX INTERFACE
+  "SHELL:-DSTM32C071xx  -D__CORTEX_SC=0"
+  "SHELL:"
+  "SHELL:"
+  "SHELL: "
+  -mcpu=${GENERIC_C071RBTX_MCU}
+)
+target_compile_definitions(GENERIC_C071RBTX INTERFACE
+  "STM32C0xx"
+	"ARDUINO_GENERIC_C071RBTX"
+	"BOARD_NAME=\"GENERIC_C071RBTX\""
+	"BOARD_ID=GENERIC_C071RBTX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_C071RBTX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32C0xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Source/Templates/gcc/
+  ${GENERIC_C071RBTX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_C071RBTX INTERFACE
+  "LINKER:--default-script=${GENERIC_C071RBTX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=24576"
+  "SHELL: "
+  -mcpu=${GENERIC_C071RBTX_MCU}
+)
+
+add_library(GENERIC_C071RBTX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_C071RBTX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_C071RBTX_serial_generic INTERFACE)
+target_compile_options(GENERIC_C071RBTX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_C071RBTX_serial_none INTERFACE)
+target_compile_options(GENERIC_C071RBTX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+
 # GENERIC_F030C6TX
 # -----------------------------------------------------------------------------
 
diff --git a/libraries/Wire/src/utility/twi.c b/libraries/Wire/src/utility/twi.c
index 507fc63d96..f49eb800b2 100644
--- a/libraries/Wire/src/utility/twi.c
+++ b/libraries/Wire/src/utility/twi.c
@@ -763,8 +763,8 @@ void i2c_init(i2c_t *obj, uint32_t timing, uint32_t ownAddress)
           __HAL_RCC_I2C2_FORCE_RESET();
           __HAL_RCC_I2C2_RELEASE_RESET();
           obj->irq = I2C2_EV_IRQn;
-#if !defined(STM32F0xx) && !defined(STM32G0xx) && !defined(STM32L0xx) && \
-    !defined(STM32U0xx)
+#if !defined(STM32C0xx) && !defined(STM32F0xx) && !defined(STM32G0xx) && \
+    !defined(STM32L0xx) && !defined(STM32U0xx)
           obj->irqER = I2C2_ER_IRQn;
 #endif /* !STM32F0xx && !STM32G0xx && !STM32L0xx && !STM32U0xx */
           i2c_handles[I2C2_INDEX] = handle;
diff --git a/variants/STM32C0xx/C071R(8-B)T/generic_clock.c b/variants/STM32C0xx/C071R(8-B)T/generic_clock.c
index d77298f799..cfb7612e69 100644
--- a/variants/STM32C0xx/C071R(8-B)T/generic_clock.c
+++ b/variants/STM32C0xx/C071R(8-B)T/generic_clock.c
@@ -12,6 +12,7 @@
  */
 #if defined(ARDUINO_GENERIC_C071R8TX) || defined(ARDUINO_GENERIC_C071RBTX)
 #include "pins_arduino.h"
+#include "stm32yyxx_ll_utils.h"
 
 /**
   * @brief  System Clock Configuration
@@ -20,8 +21,32 @@
   */
 WEAK void SystemClock_Config(void)
 {
-  /* SystemClock_Config can be generated by STM32CubeMX */
-#warning "SystemClock_Config() is empty. Default clock at reset is used."
+  LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
+
+  /* HSI configuration and activation */
+  LL_RCC_HSI_Enable();
+  while (LL_RCC_HSI_IsReady() != 1) {
+  }
+
+  LL_RCC_HSI_SetCalibTrimming(64);
+  LL_RCC_SetHSIDiv(LL_RCC_HSI_DIV_1);
+  /* Set AHB prescaler*/
+  LL_RCC_SetAHBPrescaler(LL_RCC_HCLK_DIV_1);
+
+  /* Sysclk activation on the HSI */
+  LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSI);
+  while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSI) {
+  }
+
+  /* Set APB1 prescaler*/
+  LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
+  /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
+  LL_SetSystemCoreClock(48000000);
+
+  /* Update the time base */
+  if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) {
+    Error_Handler();
+  }
 }
 
 #endif /* ARDUINO_GENERIC_* */
diff --git a/variants/STM32C0xx/C071R(8-B)T/ldscript.ld b/variants/STM32C0xx/C071R(8-B)T/ldscript.ld
new file mode 100644
index 0000000000..1607721619
--- /dev/null
+++ b/variants/STM32C0xx/C071R(8-B)T/ldscript.ld
@@ -0,0 +1,187 @@
+/*
+******************************************************************************
+**
+** @file        : LinkerScript.ld
+**
+** @author      : Auto-generated by STM32CubeIDE
+**
+** @brief       : Linker script for STM32C071RBTx Device from STM32C0 series
+**                      128KBytes FLASH
+**                      24KBytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is, without any warranty
+**                of any kind.
+**
+******************************************************************************
+** @attention
+**
+** Copyright (c) 2024 STMicroelectronics.
+** All rights reserved.
+**
+** This software is licensed under terms that can be found in the LICENSE file
+** in the root directory of this software component.
+** If no LICENSE file comes with this software, it is provided AS-IS.
+**
+******************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = LD_MAX_DATA_SIZE
+  FLASH    (rx)    : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+    *(.RamFunc)        /* .RamFunc sections */
+    *(.RamFunc*)       /* .RamFunc* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}

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