feat: ability to define HCI SPI transport configuration

fpistm · fpistm · commit a633b95b1b11 · 2025-04-17T12:22:56.000+02:00
Signed-off-by: Frederic Pillon &lt;frederic.pillon@st.com&gt;
diff --git a/README.md b/README.md
@@ -15,6 +15,61 @@ https://github.com/stm32duino/Arduino_Core_STM32/wiki/STM32duinoBLE#stm32duinobl
 For more information about ArduinoBLE library please visit the official web page at:
 https://www.arduino.cc/en/Reference/ArduinoBLE
 
+# Configuration
+
+### Shield
+
+The user can include the file `ble_spi_conf.h` to define which shield and configuration to use from the following list:
+
+ * [X-NUCLEO-IDB05A2]
+    * `IDB05A2_SPI_CLOCK_D3`: SPI clock on D3
+    * `IDB05A2_SPI_CLOCK_D13` SPI clock on D13
+ * [X-NUCLEO-IDB05A1]
+    * `IDB05A1_SPI_CLOCK_D3`: SPI clock on D3
+    * `IDB05A1_SPI_CLOCK_D13`: SPI clock on D13
+ * [X-NUCLEO-BNRG2A1]
+    * `BNRG2A1_SPI_CLOCK_D3`: SPI clock on D3
+    * `BNRG2A1_SPI_CLOCK_D13`: SPI clock on D13
+ * `CUSTOM_BLE_SPI`: define a custom configuration, it requires below definition:
+    * `BLE_SPI_MISO`: SPI MISO pin
+    * `BLE_SPI_MOSI`: SPI MOSI pin
+    * `BLE_SPI_CLK`: SPI CLocK pin
+    * `BLE_SPI_CS`: SPI Chip Select pin
+    * `BLE_SPI_IRQ`: SPI IRQ pin
+    * `BLE_SPI_FREQ`: SPI bus frequency
+    * `BLE_SPI_MODE`: can be one of the below `SPIMode`:
+      * `SPI_MODE0`
+      * `SPI_MODE1`
+      * `SPI_MODE2`
+      * `SPI_MODE0`
+    * `BLE_CHIP_TYPE`: can be one of the below `BLEChip_t`:
+      * `SPBTLE_RF`
+      * `SPBTLE_1S`
+      * `BLUENRG_M2SP`
+      * `BLUENRG_M0`
+      * `BLUENRG_LP`
+    * `BLE_RESET`: BLE reset pin
+
+#### Examples
+
+To use the [X-NUCLEO-IDB05A2] with SPI clock on D3, define in `ble_spi_conf.h`:
+```C
+#define IDB05A2_SPI_CLOCK_D3
+```
+This is equivalent to the below configuration using the `CUSTOM_BLE_SPI`:
+```C
+#define CUSTOM_BLE_SPI
+#define BLE_SPI_MISO    D12
+#define BLE_SPI_MOSI    D11
+#define BLE_SPI_CLK     D3
+#define BLE_SPI_CS      A1
+#define BLE_SPI_IRQ     A0
+#define BLE_SPI_FREQ    8000000
+#define BLE_SPI_MODE    SPI_MODE0
+#define BLE_CHIP_TYPE   BLUENRG_M0
+#define BLE_RESET       D7
+```
+
 ## License
 
 ```
diff --git a/src/utility/HCISpiTransport.cpp b/src/utility/HCISpiTransport.cpp
@@ -19,7 +19,14 @@
 
 #include "HCISpiTransport.h"
 
-#if defined(ARDUINO_STEVAL_MKBOXPRO)
+#if __has_include("ble_spi_conf.h")
+  #include "ble_spi_conf.h"
+#endif
+
+#if defined(CUSTOM_BLE_SPI)
+SPIClass SpiHCI(BLE_SPI_MOSI, BLE_SPI_MISO, BLE_SPI_CLK);
+HCISpiTransportClass HCISpiTransport(SpiHCI, BLE_CHIP_TYPE, BLE_SPI_CS, BLE_SPI_IRQ, BLE_RESET, BLE_SPI_FREQ, BLE_SPI_MODE);
+#elif defined(ARDUINO_STEVAL_MKBOXPRO)
 /* STEVAL-MKBOXPRO */
 SPIClass SpiHCI(PA7, PA6, PA5);
 HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_LP, PA2, PB11, PD4, 1000000, SPI_MODE3);
@@ -51,11 +58,11 @@ HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI
 /* Shield IDB05A1 with SPI clock on D13 */
 #define SpiHCI SPI
 HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0);
-#elif defined(BNRG2A1_CLOCK_D3)
+#elif defined(BNRG2A1_SPI_CLOCK_D3)
 /* Shield BNRG2A1 with SPI clock on D3 */
 SPIClass SpiHCI(D11, D12, D3);
 HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1);
-#elif defined(BNRG2A1_CLOCK_D13)
+#elif defined(BNRG2A1_SPI_CLOCK_D13)
 /* Shield BNRG2A1 with SPI clock on D13 */
 #define SpiHCI SPI
 HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1);
