Fix some typos in tutorial.tex (#148)

felixonmars · ucbjrl · commit 2d43a86b0edd · 2020-01-27T13:31:14.000-08:00
diff --git a/doc/tutorial/tutorial.tex b/doc/tutorial/tutorial.tex
@@ -803,7 +803,7 @@ \section{State Elements}
 delayed by one clock cycle.  Note that we do not have to specify the
 type of \verb+Reg+ as it will be automatically inferred from its input
 when instantiated in this way.  In the current version of Chisel,
-clock and reset are global signals that are implicity included where
+clock and reset are global signals that are implicitly included where
 needed.
 
 Using registers, we can quickly define a number of useful circuit
@@ -832,7 +832,7 @@ \section{State Elements}
 The \verb!:=! assignment to \verb!x! in \verb!counter! wires an update combinational circuit 
 which increments the counter value unless it hits the \verb+max+ at which point it wraps back to zero.
 Note that when \verb!x! appears on the right-hand side of
-an assigment, its output is referenced, whereas when on the left-hand
+an assignment, its output is referenced, whereas when on the left-hand
 side, its input is referenced.
 
 Counters can be used to build a number of useful sequential circuits.
