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embARC: add support
Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
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Ports/ARC/embARC/MetaWare/os_cpu.h

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/*
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*********************************************************************************************************
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* uC/OS-III
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* The Real-Time Kernel
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*
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* (c) Copyright 2009-2018; Silicon Laboratories Inc.,
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* 400 W. Cesar Chavez, Austin, TX 78701
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*
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* All rights reserved. Protected by international copyright laws.
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*
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* Your use of this software is subject to your acceptance of the terms
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* of a Silicon Labs Micrium software license, which can be obtained by
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* contacting info@micrium.com. If you do not agree to the terms of this
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* license, you may not use this software.
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*
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* Please help us continue to provide the Embedded community with the finest
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* software available. Your honesty is greatly appreciated.
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*
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* You can find our product's documentation at: doc.micrium.com
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*
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* For more information visit us at: www.micrium.com
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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*
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* ARC
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* MetaWare
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*
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* Filename : os_cpu.h
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* Version : V3.07.03
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*********************************************************************************************************
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*/
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#ifndef _OS_CPU_H
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#define _OS_CPU_H
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#ifdef OS_CPU_GLOBALS
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#define OS_CPU_EXT
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#else
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#define OS_CPU_EXT extern
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#endif
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#include "embARC.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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*********************************************************************************************************
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* MACROS
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*
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* Note(s): OS_TASK_SW() invokes the task level context switch.
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*
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* (1) On some processors, this corresponds to a call to OSCtxSw() which is an assemply language
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* function that performs the context switch.
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*
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* (2) On some processors, you need to simulate an interrupt using a 'sowfate interrupt' or a
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* TRAP instruction. Some compilers allow you to add in-line assembly language as shown.
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*********************************************************************************************************
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*/
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#define OS_TASK_SW() OSCtxSw() /* Simulate interrupt */
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/*
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*********************************************************************************************************
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* TIMESTAMP CONFIGURATION
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*
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* Note(s) : (1) OS_TS_GET() is generally defined as CPU_TS_Get32() to allow CPU timestamp timer to be of
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* any data type size.
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*
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* (2) For architectures that provide 32-bit or higher precision free running counters
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* (i.e. cycle count registers):
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*
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* (a) OS_TS_GET() may be defined as CPU_TS_TmrRd() to improve performance when retrieving
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* the timestamp. You would use CPU_TS_TmrRd() if this function returned the value of
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* a 32-bit free running timer 0x00000000 to 0xFFFFFFFF then roll over to 0x00000000.
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*
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* (b) CPU_TS_TmrRd() MUST be configured to be greater or equal to 32-bits to avoid
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* truncation of TS.
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*
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* (c) The Timer must be an up counter.
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*********************************************************************************************************
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*/
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#if OS_CFG_TS_EN == 1u
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#define OS_TS_GET() (CPU_TS)CPU_TS_Get32() /* See Note #2a. CPU_TS_TmrRd() */
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#else
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#define OS_TS_GET() (CPU_TS)0u
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#endif
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/*
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*********************************************************************************************************
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* FUNCTION PROTOTYPES
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*********************************************************************************************************
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*/
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void OSCtxSw (void);
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void OSIntCtxSw (void);
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void OSStartHighRdy (void);
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int OS_SysTickInit (void);
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#ifdef __cplusplus
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}
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#endif
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#endif

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