Abstract
An energy-efficient capacitor switching scheme for ultra-low voltage successive approximation register (SAR) analog-to-digital converter (ADC) is proposed. The novel switching scheme uses two reference levels, which eliminates the dependency on the accuracy of the extra reference voltage (Vcm). In addition, the proposed scheme combines merge-and-split (MS) switching method, floating switching method and LSB-down switching method. More switching energy is saved with switching energy optimization before the third comparison, and the number of capacitors in the capacitor array is also reduced by 75% due to LSB-down switching method. The proposed scheme achieves a 98.4% reduction in switching energy when compared with the conventional SAR architecture.
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Wu, A., Wu, J. & Huang, J. Energy-efficient switching scheme for ultra-low voltage SAR ADC. Analog Integr Circ Sig Process 90, 507–511 (2017). https://doi.org/10.1007/s10470-016-0892-0
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DOI: https://doi.org/10.1007/s10470-016-0892-0