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Using reference counters in update based coherent memory

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PARLE'94 Parallel Architectures and Languages Europe (PARLE 1994)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 817))

Abstract

As the disparity between processor and memory speed continues to widen, the exploitation of locality of reference in shared-memory multiprocessors becomes an increasingly important problem in parallel processing. In this paper, we explore the problem of managing locality at the operating system level. In specific, we study the use of reference counters in making informed decisions about page placement and movement. We use trace-driven simulation of real applications to evaluate the effectiveness of reference counters in providing useful hints to the memory manager of the operating system. Our main conclusion is that reference counters provide a simple and inexpensive mechanism for detecting the reference patterns of pages and making robust page placement decisions that result in significant performance improvement.

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References

  1. W. J. Bolosky, M. L. Scott, R. P. Fitzgerald, R. J. Fowler, and A. L. Cox. NUMA Policies and Their Relation to Memory Architecture. In Proceedings of the 4th International Conference on Architectural Support for Programming Languages and Operating Systems, pages 212–221, April 1991.

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  2. D. Chaiken, C. Fields, K. Kurihara, and A. Agarwal. Directory-Based Cache Coherence in Large-Scale Multiprocessors. IEEE Computer, 23(G):49–58, June 1990.

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  3. E. P. Markatos and C. E. Chronaki. Trace-Driven Simulation of Data-Alignment and Other Factors Affecting Update and Invalidate Based Coherent Memory. In Proceedings of International Workshop on Modeling, Analysis and Simulation of Computer and Telecommunications Systems (MASCOTS '94), pages 44–52, January 1994. Also appeared as ICS-FORTH Technical Report 93, July 1993.

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Costas Halatsis Dimitrios Maritsas George Philokyprou Sergios Theodoridis

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© 1994 Springer-Verlag Berlin Heidelberg

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Markatos, E.P., Chronaki, C.E. (1994). Using reference counters in update based coherent memory. In: Halatsis, C., Maritsas, D., Philokyprou, G., Theodoridis, S. (eds) PARLE'94 Parallel Architectures and Languages Europe. PARLE 1994. Lecture Notes in Computer Science, vol 817. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-58184-7_162

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  • DOI: https://doi.org/10.1007/3-540-58184-7_162

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-58184-0

  • Online ISBN: 978-3-540-48477-6

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