IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Online ISSN : 1745-1337
Print ISSN : 0916-8508
Volume E95.A, Issue 10
Displaying 1-21 of 21 articles from this issue
Special Section on Advances in Adaptive Signal Processing and Applications
  • Yasuji OTA
    2012 Volume E95.A Issue 10 Pages 1657
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
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  • Kazutaka FUKUDA, Eiji OKAMOTO
    Article type: PAPER
    Subject area: Sensor Network
    2012 Volume E95.A Issue 10 Pages 1658-1666
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
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    Sensor networks, in which many small terminals are wirelessly connected, have recently received considerable interest according to the development of wireless technology and electronic circuit. To provide advanced applications and services by the sensor networks, data collection including node location is essential. Hence the location estimation is important and many localization schemes have been proposed. Time of arrival (TOA) localization is one of the popular schemes because of its high estimation accuracy in ultra wide-band (UWB) sensor networks. However, a non-line-of-sight (NLOS) environment between the target and the anchor nodes causes a serious estimation error because the time is delayed more than its true one. Thus, the NLOS nodes should be detected and eliminated for estimation. As a well-known NLOS detection scheme, an iterative minimum residual (IMR) scheme which has low calculation complexity is used for detection. However, the detection error exists in IMR scheme due to the measurement error. Therefore, in this paper, we propose a new IMR-based NLOS detection scheme and show its performance improvement by computer simulations.
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  • Hiroki MORIYA, Koichi ICHIGE, Hiroyuki ARAI, Takahiro HAYASHI, Hiromi ...
    Article type: PAPER
    Subject area: DOA
    2012 Volume E95.A Issue 10 Pages 1667-1675
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
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    This paper presents a simple 3-D array configuration for high-resolution 2-D Direction-Of-Arrival (DOA) estimation. Planar array structures like Uniform Rectangular Array (URA) or Uniform Circular Array (UCA) often well estimate azimuth angle but cannot well estimate elevation angle because of short antenna aperture in elevation direction. One may put more number of array elements to improve elevation angle estimation accuracy, however it will require very large hardware and software cost. This paper presents a simple 3-D array structure for high-resolution 2-D DOA estimation only by modifying the height of some array elements in a planar array. Based on the analysis of Cramer-Rao Lower Bound (CRLB) formulation and its dependency on the height of array elements, we develop a simple 3-D array structure which improves elevation angle estimation accuracy while preserving azimuth angle estimation accuracy.
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  • Rainfield Y. YEN, Hong-Yu LIU, Chia-Sheng TSAI
    Article type: PAPER
    Subject area: OFDM
    2012 Volume E95.A Issue 10 Pages 1676-1682
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
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    For maximum-likelihood (ML) estimation to jointly track carrier frequency offset (CFO) and channel impulse response (CIR) in orthogonal frequency division multiplexing (OFDM) systems, we present a finite high order approximation method utilizing the MATLAB ‘roots’ command on the log-likelihood function derived from the OFDM received signal, coupled with an adaptive iteration algorithm. The tracking performance of this high order approximation algorithm is found to be excellent, and as expected, the algorithm outperforms the other existing first order approximation algorithms.
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  • Dongpei LIU, Hengzhu LIU, Botao ZHANG, Jianfeng ZHANG, Shixian WANG, Z ...
    Article type: PAPER
    Subject area: OFDM
    2012 Volume E95.A Issue 10 Pages 1683-1691
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
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    High-performance FFT processor is indispensable for real-time OFDM communication systems. This paper presents a CORDIC based design of variable-length FFT processor which can perform various FFT lengths of 64/128/256/512/1024/2048/4096/8192-point. The proposed FFT processor employs memory based architecture in which mixed radix 4/2 algorithm, pipelined CORDIC, and conflict-free parallel memory access scheme are exploited. Besides, the CORDIC rotation angles are generated internally based on the transform of butterfly counter, which eliminates the need of ROM making it memory-efficient. The proposed architecture has a lower hardware complexity because it is ROM-free and with no dedicated complex multiplier. We implemented the proposed FFT processor and verified it on FPGA development platform. Additionally, the processor is also synthesized in 0.18μm technology, the core area of the processor is 3.47mm2 and the maximum operating frequency can be up to 500MHz. The proposed FFT processor is better trade off performance and hardware overhead, and it can meet the speed requirement of most modern OFDM system, such as IEEE 802.11n, WiMax, 3GPP-LTE and DVB-T/H.
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Regular Section
  • Yuki SATOMI, Arata KAWAMURA, Youji IIGUNI
    Article type: PAPER
    Subject area: Digital Signal Processing
    2012 Volume E95.A Issue 10 Pages 1692-1699
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
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    For an adaptive system identification filter with a stochastic input signal, a coefficient vector updated with an NLMS algorithm converges in the sense of ensemble average and the expected convergence vector has been revealed. When the input signal is periodic, the convergence of the adaptive filter coefficients has also been proved. However, its convergence vector has not been revealed. In this paper, we derive the convergence vector of adaptive filter coefficients updated with the NLMS algorithm in system identification for deterministic sinusoidal inputs. Firstly, we derive the convergence vector when a disturbance does not exist. We show that the derived convergence vector depends only on the initial vector and the sinusoidal frequencies, and it is independent of the step-size for adaptation, sinusoidal amplitudes, and phases. Next, we derive the expected convergence vector when the disturbance exists. Simulation results support the validity of the derived convergence vectors.
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  • Tiefei ZHANG, Tianzhou CHEN
    Article type: PAPER
    Subject area: Systems and Control
    2012 Volume E95.A Issue 10 Pages 1700-1707
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
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    The energy consumption is always a serious problem for mobile devices powered by battery. As the capacity and density of off-chip memory continuous to scale, its energy consumption accounts for a considerable amount of the whole system energy. There are therefore strong demands for energy efficient techniques towards memory system. Different from previous works, we explore the different power management modes of the off-chip memory by process scheduling for the multi-core mobile devices. In particular, we schedule the processes based on their memory access characteristics to maximize the number of the memory banks being in low power mode. We propose a fast approximation algorithm to solve the scheduling process problem for the dual-core mobile device. And for those equipped with more than two cores, we prove that the scheduling process problem is NP-Hard, and propose two heuristic algorithms. The proposed algorithms are evaluated through a series of experiments, for which we have encouraging results.
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  • Duc-Hung LE, Katsumi INOUE, Masahiro SOWA, Cong-Kha PHAM
    Article type: PAPER
    Subject area: VLSI Design Technology and CAD
    2012 Volume E95.A Issue 10 Pages 1708-1717
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
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    A new information detection method has been proposed for a very fast and efficient search engine. This method is implemented on hardware system using FPGA. We take advantages of Content Addressable Memory (CAM) which has an ability of matching mode for designing the system. The CAM blocks have been designed using available memory blocks of the FPGA device to save access times of the whole system. The entire memory can return multi-match results concurrently. The system operates based on the CAMs for pattern matching, in a parallel manner, to output multiple addresses of multi-match results. Based on the parallel multi-match operations, the system can be applied for pattern matching with various required constraint conditions without using any search principles. The very fast multi-match results are achieved at 60ns with the operation frequency 50MHz. This increases the search performance of the information detection system which uses this method as the core system.
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  • Naoto KIRIBUCHI, Ryo KATO, Tsukasa ENDO, Takashi NISHIDE, Hiroshi YOSH ...
    Article type: PAPER
    Subject area: Cryptography and Information Security
    2012 Volume E95.A Issue 10 Pages 1718-1728
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
    JOURNAL RESTRICTED ACCESS
    It is becoming more and more important to make use of personal or classified information while keeping it confidential. A promising tool for meeting this challenge is secure multi-party computation (MPC). It enables multiple parties, each given a snippet of a secret s, to compute a function f(s) by communicating with each other without revealing s. However, one of the biggest problems with MPC is that it requires a vast amount of communication. Much research has gone into making each protocol (equality testing, interval testing, etc.) more efficient. In this work, we make a set of multiple protocols more efficient by transforming them into their equivalent batch processing form and propose two protocols: “Batch Logical OR” and “Batch Logical AND.” Using proposed protocols recursively, we also propose “Batch Logical OR-AND” and “Batch Logical AND-OR,” and show arbitrary formula consisting of Boolean protocols, OR gates, and AND gates can be batched. Existing logical OR and logical AND protocols consisting of t equality testing invocations have a communication complexity of O(lt), where l is the bit length of the secrets. Our batched versions of these protocols reduce it to O(l+t). For t interval testing invocations, they reduce both communication and round complexity. Thus they can make the queries on a secret shared database more efficient. For example, the use of the proposed protocols reduces the communication complexity for a query consisting of equality testing and interval testing by approximately 70% compared to the use of the corresponding existing protocols. The concept of the proposed protocols is versatile and can be applied to logical formulae consisting of protocols other than equality testing and interval testing, thereby making them more efficient as well.
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  • Chiaki OHTAHARA, Yu SASAKI, Takeshi SHIMOYAMA
    Article type: PAPER
    Subject area: Cryptography and Information Security
    2012 Volume E95.A Issue 10 Pages 1729-1739
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
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    In this paper, we present the first results on the preimage resistance against step-reduced versions of ISO standard hash functions RIPEMD-128 and RIPEMD-160, which were designed as strengthened versions of RIPEMD. While preimage attacks on the first 33 steps and intermediate 35 steps of RIPEMD (48 steps in total) are known, no preimage attack exists on RIPEMD-128 (64 steps) or RIPEMD-160 (80 steps). This paper shows three variations of preimage attacks of RIPEMD-128; the first 33 steps, intermediate 35 steps, and the last 32 steps. Because of the large security margin, full RIPEMD-128 is still enough secure, however, it is interesting that the number of attacked steps for RIPEMD-128 reaches the same level as for RIPEMD. We also show that our approach can be applied to RIPEMD-160, and present preimage attacks on the first 30 steps and the last 31 steps.
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  • Fanxin ZENG, Xiaoping ZENG, Zhenyu ZHANG, Guixin XUAN
    Article type: PAPER
    Subject area: Information Theory
    2012 Volume E95.A Issue 10 Pages 1740-1748
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
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    This paper investigates construction methods of perfect 16-QAM sequences and arrays, since such sequences and arrays play quite an important role in synchronization of communication systems making use of 16-QAM signals. The method used for obtaining the results is to establish a relationship between the known perfect quaternary sequences/arrays and the required ones so that the former is transformed into the latter. Consequently, the sufficient conditions for implementing the required transformations are derived, and several examples are given. Our methods can provide perfect 16-QAM sequences with lengths 2, 4, 8, and 16, which are given in Table A·1 and infinite families of perfect 16-QAM arrays, whose existing sizes up to dimension 5 and volume 2304 are listed in Tables A·2 and A·3.
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  • Chin-Sean SUM, Gabriel Porto VILLARDI, Mohammad Azizur RAHMAN, Junyi W ...
    Article type: PAPER
    Subject area: Communication Theory and Signals
    2012 Volume E95.A Issue 10 Pages 1749-1758
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
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    This paper presents the analysis on hidden node due to multiple transmission power level and its potential impact to system performance of White Space radio operating in the TV bands, a.k.a TV white space (TVWS). For this purpose, a generic interference model for determining the hidden node occurrence probability based on realistic physical (PHY) layer model is developed. Firstly, the generic hidden node interference model is constructed considering typical TVWS radio network deployment scenario. Emphasis is given on cases where the hidden node scenario involves multiple transmission power level. Secondly, the PHY layer design and channel propagation are modeled to analyze the realistic operating range of the TVWS radio. By combining the hidden node interference model and the PHY layer/propagation models, the realistic probability of hidden node occurrence is calculated. Finally, the performance degradation in the victim receiver due to interference generated by the potential hidden node is quantified. As a result, for urban environment, it is found that for networks consisting of devices with multiple transmit power level, the probability of hidden node occurrence is similar to that of networks consisting of devices with uni-transmit power level, provided that the interferer-victim separation distance in the former is 800m farther apart. Furthermore, this number may increase to a maximum of 1.1km in a suburban environment. Also, it is found that if the hidden node actually occurs, a co-channel interference (CCI) of -15dB typically causes a degradation of 2dB in the victim receiver.
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  • Lei YANG, Akira ASANO, Liang LI, Chie MURAKI ASANO, Takio KURITA
    Article type: PAPER
    Subject area: Image
    2012 Volume E95.A Issue 10 Pages 1759-1767
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
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    In this paper, we propose a novel texture analysis method capable of estimating multiple primitives, which are elements repetitively arranged to compose a texture, in multi-structured textures. The approach is based on a texture description model that uses mathematical morphology, called the “Primitive, Grain, and Point Configuration (PGPC)” texture model. The estimation of primitives based on the PGPC texture model involves searching the optimal structuring element for primitives according to a size distribution function and a magnification. The proposed method achieves the following two improvements: (1) the simultaneous estimation of a multiple number of primitives in multi-structured textures with a ranking of primitives on the basis of their significance. and (2) the introduction of flexibility in the process of magnification to obtain a higher degree of fitness of large grains. With a computational combination of different primitives, the method provides an ordered priority to denote the significance of elements. The promising performance of the proposed method is experimentally shown by a comparison with conventional methods.
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  • Hungkai CHEN, Yingchieh HO, Chauchin SU
    Article type: PAPER
    Subject area: Measurement Technology
    2012 Volume E95.A Issue 10 Pages 1768-1775
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
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    This paper proposes a cumulative DNL (CDNL) test methodology for the BIST of ADCs. It analyzes the histogram of the DNL of a predetermined k LSBs distance to determine the DNL and gain error. The advantage of this method over others is that the numbers of required code bins and required samples are significantly reduced. The simulation and measurements of a 12-bit ADC show that the proposed CDNL has an error of less than 5% with only 212 samples, which can only be achieved with 222 samples using the conventional method. It only needs 16 registers to store code bins in this experiment.
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  • Ziming HE, Yi MA, Rahim TAFAZOLLI
    Article type: LETTER
    Subject area: Digital Signal Processing
    2012 Volume E95.A Issue 10 Pages 1776-1779
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
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    This paper presents a novel approach for mobile positioning in IEEE 802.11a wireless LANs with acceptable computational complexity. The approach improves the positioning accuracy by utilizing the time and frequency domain channel information obtained from the orthogonal frequency-division multiplexing (OFDM) signals. The simulation results show that the proposed approach outperforms the multiple signal classification (MUSIC) algorithm, Ni's algorithm and achieve a positioning accuracy of 1m with a 97% probability in an indoor scenario.
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  • Younseok CHOO, Young-Ju KIM
    Article type: LETTER
    Subject area: Digital Signal Processing
    2012 Volume E95.A Issue 10 Pages 1780-1783
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
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    Recently a simple algorithm was presented by the first author which enables one to successively compute the transformation matrix of various order for the general 1-D to 1-D polynomial transformation. This letter extends the result to the general 1-D to 2-D polynomial transformation. It is also shown that the matrix obtained can be used for the 2-D to 2-D polynomial transformation as well.
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  • Chia-Pin WU, Jeang-Lin CHANG, Ching-Long SHIH
    Article type: LETTER
    Subject area: Systems and Control
    2012 Volume E95.A Issue 10 Pages 1784-1787
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
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    In this note, we introduce the integral term of system outputs into an output feedback controller for sampled-data linear systems with unknown disturbances. The proposed method does not use any observer and can prevent the high gain actions in control inputs. Provided the variation of the disturbance in the two consecutive sampling instances is not changed significantly, it is shown that system states and system outputs are finally constrained in small bounded regions, respectively. Simulation results support the theoretical developments.
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  • Katsumi KONISHI
    Article type: LETTER
    Subject area: Systems and Control
    2012 Volume E95.A Issue 10 Pages 1788-1791
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
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    This letter deals with a system identification problem with unknown model order, which can be formulated as the matrix rank minimization problem by applying the subspace identification method. A sequential rank minimization algorithm is provided by modifying the null space based alternating optimization (NSAO) algorithm, and a model order identification algorithm is proposed. Numerical examples show that the proposed sequential algorithm can adaptively identify the model order of switched systems whose model order changes.
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  • Huijuan ZUO, Qiaoyan WEN, Xiuwen MA, Jie ZHANG
    Article type: LETTER
    Subject area: Cryptography and Information Security
    2012 Volume E95.A Issue 10 Pages 1792-1795
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
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    In this letter, we present a general construction of sequence sets with low correlation zone, which is based on finite fields and the balance property of some functions. The construction is more flexible as far as the partition of parameters is concerned. A simple example is also given to interpret the construction.
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  • Chengqian XU, Yubo LI, Kai LIU, Xiaoyu CHEN
    Article type: LETTER
    Subject area: Coding Theory
    2012 Volume E95.A Issue 10 Pages 1796-1800
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
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    In this paper, we constructed a class of low correlation zone sequence sets derived from the interleaved technique and DFT matrices. When p is a prime such that p>3, p-ary LCZ sequence sets with parameters LCZ(pn-1,pm-1,(pn-1)/(pm-1),1) are constructed based on a DFT matrix with order p×p, which is optimal with respect to the Tang-Fan-Matsufuji bound. When p is a prime such that p≥2, pk-ary LCZ sequence sets with parameters LCZ(pn-1,pk-1,(pn-1)/(pk-1),1) are constructed based on a DFT matrix with order pk×pk, which is also optimal. These sequence sets are useful in certain quasi-synchronous code-division mutiple access (QS-CDMA) communication systems.
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  • Xuan ZHANG, Jing QIN, Qiaoyan WEN, Jie ZHANG
    Article type: LETTER
    Subject area: Coding Theory
    2012 Volume E95.A Issue 10 Pages 1801-1805
    Published: October 01, 2012
    Released on J-STAGE: October 01, 2012
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    In this paper, we introduce a construction of 16-QAM sequences based on known binary sequences using multiple sequences, interleaved sequences and Gray mappings. Five kinds of binary sequences of period N are put into the construction to get five kinds of new 16-QAM sequences of period 4N. These resultant sequences have 5-level autocorrelation {0,±8,±8N}, where ±8N happens only once each. The distributions of the periodic autocorrelation are also given. These will provide more choices for many applications.
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