Linear Integrated Circuit Questions and Answers

1. Which is not the internal circuit of operational amplifier?

a) Differential amplifier
b) Level translator
c) Output driver
d) Clamper
Answer: d
Explanation: Clamper is an external circuit connected at the output of Operational amplifier,
which clamp the output to desire DC level.
2. The purpose of level shifter in Op-amp internal circuit is to
a) Adjust DC voltage
b) Increase impedance
c) Provide high gain
d) Decrease input resistance
Answer: a
Explanation: The gain stages in Op-amp are direct coupled. So, level shifter is used for
adjustment of DC level.
3. How a symmetrical swing is obtained at the output of Op-amp
a) Providing amplifier with negative supply voltage
b) Providing amplifier with positive voltage
c) Providing amplifier with positive& negative voltage
d) None of the mentioned
Answer: c
Explanation: For example, consider a single voltage supply +15v. During positive half cycle the
output will be +5v and -10v during negative half cycle.
Therefore, the maximum peak to peak output swing, -5v (-10v) = -15v (Asymmetrical swing).
So, to get symmetrical swing both positive and negative supply voltage with bias point fixed
suitably is required.

4. What is the purpose of differential amplifier stage in internal circuit of Op-amp?

a) Low gain to differential mode signal
b) Cancel difference mode signal
c) Low gain to common mode signal
d) Cancel common mode signal
Answer: d
Explanation: Any undesired noise, common to both of the input terminal is suppressed by
differential amplifier.
5. Which of the following is not preferred for input stage of Op-amp?
a) Dual Input Balanced Output
b) Differential Input Single ended Output
c) Cascaded DC amplifier
d) Single Input Differential Output
Answer: c
Explanation: Cascaded DC amplifier suffers from major problem of drift of the operating point,
due to temperature dependency of the transistor.
6. What will be the emitter current in a differential amplifier, where both the
transistor are biased and matched? (Assume current to be IQ)
a) IE = IQ/2
b) IE = IQ
c) IE = (IQ)2/2
d) IE = (IQ)2
Answer: a
Explanation: Due to symmetry of differential amplifier circuit, current IQ divides equally
through both transistors.
7. From the circuit, determine the output voltage (Assume F=1)
a) VO1=3.9v , VO2=12v
b) VO1=12v , VO2=3.9v
c) VO1=12v , VO2=0v

d) VO1=3.9v , VO2=-3.9v
Answer: b
Explanation: The voltage at the common emitter E will be -0.7v, which make Q1 off and the
entire current will flow through Q2.
VO1 = VCC VO2= VCC-FIQRC,
VO1 = 12v , VO2=12v-13mA2.7k = 3.9v.
8. At what condition differential amplifier function as a switch
a) 4VT < Vd < -4VT
b) -2VT Vd 2VT
c) 0 Vd < -4VT
d) 0 Vd 2VT
Answer: a
Explanation: For Vd > 4VT, the output voltage are VO1 = VCC, VO2= VCC-F IQRC.
Therefore, a transistor Q1 will be ON and Q2 will be OFF. Similarly for Vd> -4VT, both
transistors Q2 & Q1 will be ON.
9. For Vd > 4VT, the function of differential amplifier will be
a) Switch
b) Limiter
c) Automatic gain control
d) Linear Amplifier
Answer: b
Explanation: At this condition, input voltage of the amplifier is greater than 100mv and thus
acts as a limiter
10. Change in value of common mode input signal in differential pair amplifier
make
a) Change in voltage across collector
b) Slight change in collector voltage
c) Collector voltage decreases to zero
d) None of the mentioned

Answer: a
Explanation: In differential amplifier due to symmetry, both transistors are biased and
matched. Therefore, Voltage at each collector will be same.
11. Find collector current IC2, given input voltages are V1=2.078v & V2=2.06v and
total current IQ=2.4mA. (Assume =1)
a) 0.8mA
b) 1.6mA
c) 0.08mA
d) 0.16mA
Answer: a
Explanation: Collector current, IC2=FIQ/(1+eVdVT),
VT = Volts equivalent of temperature = 25mv,
Vd = V1-V2 =2.078v-2.06v=0.018v (equ1)
Substituting equation 1,
Vd/VT = 0.018v/25mv = 0.72v (equ2)
Substituting equation 2,
IC2= 12.4mA/(1+e0.72) = 2.4mA/(1+2.05) = 0.8mA.
12. A differential amplifier has a transistor with 0= 100, is biased at ICQ = 0.48mA.
Determine the value of CMRR and ACM, if RE =7.89k and RC = 5k.
a) 49.54 db
b) 49.65 d
c) 49.77 db
d) 49.60 db
Answer: b
Explanation: Differential mode gain, ADM= -gmRC and Common mode gain,
ACM= -(gmRC)/(1+2gmRE)
(for 01).
Substituting the values,

 gm= ICQ/VT = 0.48mA/25mv=19.210-3-1

ADM= -gmRC= -19.210-3-15k= -96
ACM= -(gmRC)/(1+2gmRE)= -(19.210-3-15k) /(1+2- 19.210-3-17.89k) = 0.3158
CMRR = -96/-0.3158= 303.976
=20log303.976
=49.65db
This set of Linear Integrated Circuit Multiple Choice Questions & Answers (MCQs) focuses on
Ideal Operational Amplifier.

13. Determine the output from the following circuit

a) 180o in phase with input signal

b) 180o out of phase with input signal
c) Same as that of input signal
d) Output signal cannot be determined
Answer: b
Explanation: The input signal is given to the inverting input terminal. Therefore, the output
Vo is 180o out of phase with input signal V2.
14. Which of the following electrical characteristics is not exhibited by an ideal opamp?
a) Infinite voltage gain
b) Infinite bandwidth
c) Infinite output resistance
d) Infinite slew rate

Answer: c
Explanation: An ideal op-amp exhibits zero output resistance so that output can drive an
infinite number of other devices.
15. An ideal op-amp requires infinite bandwidth because
a) Signals can be amplified without attenuation
b) Output common-mode noise voltage is zero
c) Output voltage occurs simultaneously with input voltage changes
d) Output can drive infinite number of device
Answer: a
Explanation: An ideal op-amp has infinite bandwidth. Therefore, any frequency signal from 0
to Hz can be amplified without attenuation.
16. Ideal op-amp has infinite voltage gain because
a) To control the output voltage
b) To obtain finite output voltage
c) To receive zero noise output voltage
d) None of the mentioned
Answer: b
Explanation: As the voltage gain is infinite, the voltage between the inverting and noninverting terminal (i.e. differential input voltage) is essentially zero for finite output voltage.
17. Determine the output voltage from the following circuit diagram?

(a)

(b)

(c)

d) None of the mentioned

Answer: c
Explanation: In an ideal op-amp when the inverting terminal is zero. The output will be inphase with the input signal.
18. Find the output voltage of an ideal op-amp. If V1 and V2 are the two input
voltages
a) VO= V1-V2
b) VO= A(V1-V2)
c) VO= A(V1+V2)
d) VO= V1V2
Answer: b
Explanation: The output voltage of an ideal op-amp is the product of gain and algebraic
difference between the two input voltages.

19. How will be the output voltage obtained for an ideal op-amp?
a) Amplifies the difference between the two input voltages
b) Amplifies individual voltages input voltages
c) Amplifies products of two input voltage
d) None of the mentioned
Answer: a
Explanation: Op-amp amplifies the difference between two input voltages and the polarity of
the output voltage depends on the polarity of the difference voltage.
20. Which is not the ideal characteristic of an op-amp?
a) Input Resistance > 0
b) Output impedance > 0
c) Bandwidth >
d) Open loop voltage gain >
Answer: a
Explanation: Input resistance is infinite so almost any signal source can drive it and there is
no loading of the preceding stage.
21. Find the input voltage of an ideal op-amp. Its one of the inputs and output
voltages are 2v and 12v. (Gain=3)
a) 8v
b) 4v
c) -4v
d) -2v
Answer: d
Explanation: The output voltage, VO = (Vin1 Vin2)
=> 12v=3(2- Vin2)
=> Vin2= -2v.
22. Which factor determine the output voltage of an op-amp?
a) Positive saturation
b) Negative saturation

c) Both positive and negative saturation voltage

d) Supply voltage
Answer: c
Explanation: Output voltage is proportional to input voltage only until it reaches the
saturation voltage. The output cannot exceed the positive and negative saturation voltage.
These saturation voltages are specified by an output voltage swing rating of the op-amp for
given values of supply voltage.
23. What is the level of the output voltage of a ladder-network conversion?
A.

The analog output voltage proportional to the digital input voltage

B.

The digital output voltage proportional to the linear input voltage

C.

A fixed digital value Vref

D.

A fixed analog value Vref

Answer: Option A
24. Which of the following is not a linear/digital IC?
A.

Phase-locked loop

B.

Voltage-controlled oscillator

C.

Passive filter

D.

Comparator

Answer: Option C
25. A 339 IC is an example of a fourteen-pin DIP that can be made to function as a
________.
A.

comparator

B.

555 timer

C.

D to A converter

D.

ladder network

Answer: Option A
26. What is the minimum number of conversions per second of a clock rate of 1 MHz
operating a 10-stage counter in an ADC?
A.

1000

B.

976

C.

769

D.

697

Answer: Option B
27. Which of the following is (are) the results of improvements built into a
comparator IC?
A.

Faster switching between the two output levels

B.

Noise immunity

C.

Outputs capable of directly driving a variety of loads

D.

All of the above

Answer: Option D
28. What is the first phase of the dual-slope method of conversion?
A.

Connecting the analog voltage to the integrator for a fixed time

B.

Setting the counter to zero

C.

Connecting the integrator to a reference voltage

D.

All of the above

Answer: Option A
29. What is the maximum conversion time of a clock rate of 1 MHz operating a 10stage counter in an ADC?
A.

1.024 s

B.

102.3 ms

C.

10.24 ms

D.

1.024 ms

Answer: Option D
30. On which of the following does the conversion depend in ladder-network
conversion?
A.

Comparator

B.

Control logic

C.

Digital counter

D.

Clock

Answer: Option A

31. The voltage-controlled oscillator is a subset of the "test bench" function

generator.
A.

True

B.

False

Answer: Option A
32. Which application best describes this 555 timer circuit?

A.

Monostable multivibrator

B.

Astable multivibrator

C.

Bistable multivibrator

D.

Free-running multivibrator

Answer: Option A
33. Which of the following applications include a phase-locked loop (PLL) circuit?
A.

Modems

B.

Am decoders

C.

Tracking filters

D.

All of the above

Answer: Option D

34.Determine the free-running frequency when R3 is set to 2.5 k

A.

19.7 kHz

B.

32.5 kHz

C.

116.39 kHz

D.

212.9 kHz

Answer: Option C
35. This figure is a block diagram of a(n) ________.

A.

ADC

B.

DAC

C.

comparator

D.

555 timer

Answer: Option A
36. What is the function of a ladder network?
A.

Changing an analog signal to a digital signal

B.

Changing a linear signal to a digital signal

C.

Changing a digital signal to an analog signal

D.

None of the above

Answer: Option C
37. Which of the slope intervals of the integrator does the counter in the analog-todigital converter (ADC) operate?
A.

Positive

B.

Negative

C.

Both positive and negative

D.

Neither positive nor negative

Answer: Option C
38. Calculate the output voltage for this circuit when V1 = 2.5 V and V2 = 2.25 V.

A.

5.25 V

B.

2.5 V

C.

2.25 V

D.

5.25 V

Answer: Option D
39.Calculate the output voltage if V1 = 0.2 V and V2 = 0 V.

A.

0V

B.

6.6 V

C.

4 V

D.

2V

Answer: Option D
40. A number of op-amp stages can be used to provide separate gains.
A.

True

B.

False

Answer: Option A
41. Determine the output voltage when V1 = V2 = 1 V.

A.

0V

B.

2 V

C.

1V

D.

2V

Answer: Option B

42. Calculate the output voltage if V1 = V2 = 0.15 V.

A.

0V

B.

4.65 V

C.

6.45 V

D.

6.45 V

Answer: Option D
43. Determine the output voltage for this circuit with a sinusoidal input of 2.5 mV.

A.

0.25 V

B.

0.125 V

C.

0.25 V

D.

0.125 V

Answer: Option B

44. Determine the output voltage when V1 = V2 = 1 V.

A.

0V

B.

2 V

C.

1V

D.

2V

Answer: Option A
45. How many op-amps are required to implement this equation?

A.

B.

C.

D.

Answer: Option A

46.

Calculate the input voltage if the final output is 10.08 V.

A.

1.05 V

B.

0.525 V

C.

0.168 V

D.

4.2 V

Answer: Option C
47. Calculate the output of the first-stage op-amp when V1 = 25 mV

A.

1.05 V

B.

0.075 V

C.

0.06 V

D.

4.2 V

Answer: Option B
48. How many op-amps are required to implement this equation?

A.

B.

C.

D.

Answer: Option D
49. Calculate the output voltage if V1 = V2 = 700 mV.

A.

0V

B.

12 V

C.

12 V

D.

8 V

Answer: Option A

50. Calculate the cutoff frequencies of a bandpass filter with R1 = R2 = 5 k and C1 =

C2 = 0.1 F.
A.
B.
C.

fOL = 318.3 Hz, fOH = 318.3 Hz

fOL = 636.6 Hz, fOH = 636.6 Hz
fOL = 318.3 Hz, fOH = 636.6 Hz

D.
fOL = 636.6 Hz, fOH = 318.3 Hz
Answer: Option A
51. Calculate the output voltage if V1 = 300 mV and V2 = 700 mV.
A.

0V

B.

12 V

C.

12 V

D.

4 V

Answer: Option D
52. Calculate the output voltage.

A.

6.00 mV

B.

6.0 mV

C.

6.12 mV

D.

6.12 mV

Answer: Option C

53. This circuit is an example of a(n)________.

A.

dc voltmeter

B.

display driver

C.

instrumentation amplifier

D.

None of the above

Answer: Option C
54. Determine the value of Rf (assuming that all have the same value).

A.

500 k

B.

50 k

C.
D.

25 k
5k

Answer: Option B
55. Calculate the input voltage for this circuit if Vo = 11 V.

A.

1.1 V

B.

1.1 V

C.

1 V

D.

1V

Answer: Option A
56. Calculate the input voltage when Vo = 11 V.

A.

1.1 V

B.

1.1 V

C.

1 V

D.

1V

Answer: Option D
57. What is this circuit?

[A].

a low-pass filter

[B].

a high-pass filter

[C].

a bandpass filter

[D].

a band-stop filter

Answer: Option D