Code No: R05320404 Set No.

1
III B.Tech II Semester Supplimentary Examinations, Aug/Sep 2008
MICROPROCESSORS AND INTERFACING
( Common to Electronics & Communication Engineering, Electronics &
Instrumentation Engineering, Bio-Medical Engineering, Electronics &
Control Engineering and Electronics & Telematics)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆⋆⋆⋆⋆

1. (a) Compare the Interrupt structure of 8086 and 8085 Microprocessors. Also
discuss about priorities of the interrupts in both the cases.
(b) With examples ,explain how multiplexing is implemented in 8086 Microproces-
sor [10+6]

2. (a) Explain the following 8086 instructions with examples.

i. MUL
ii. IMUL
iii. DIV
iv. IDIV
(b) Differentiate between procedures and macros using certain examples. [8+8]

3. (a) Write an ALP in 8086 to move a block of N bytes of data from source to
destination
(b) Write an ALP in 8086 to add 5 bytes of data in an array by making use of
procedure
[8+8]

4. (a) With a neat block diagram, explain the working of 8257 DMA controller
(b) Explain briefly about memory interfacing with 8086 microprocessor [10+6]

5. (a) Describe the three modes of operations for 8255 using relevant diagrams?
(b) Write the necessary instruction sequence to initialize 8255 with address 0C00H
to 0C03H for the following combinations?
(c) Port A as input and ports B and C as output in mode 0 operation.
(d) Port A in mode 1 operation and port B in mode 0 operation. [8+8]

6. (a) What is the difference between maskable and non-maskable interrupts. Give
some examples?
(b) Discuss about the following control word formats of 8259:
i. Initialization Command Words (ICWs).
ii. Operational Command Words (OCWs) [6+10]

7. (a) Discuss the serial data transmission standards and their specifications.

1 of 2
Code No: R05320404 Set No. 1
(b) Draw the block diagram of 8251 and explain about each block. [6+10]

8. (a) Interface 8255 I/O ports with 8051. The address of port A should be 0000H
(b) Explain about the three errors in asynchronous serial transmission. [10+6]

⋆⋆⋆⋆⋆

2 of 2
Code No: R05320404 Set No. 2
III B.Tech II Semester Supplimentary Examinations, Aug/Sep 2008
MICROPROCESSORS AND INTERFACING
( Common to Electronics & Communication Engineering, Electronics &
Instrumentation Engineering, Bio-Medical Engineering, Electronics &
Control Engineering and Electronics & Telematics)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆⋆⋆⋆⋆

1. (a) Draw the architectural diagram of 8085 and explain the function of each block
in detail
(b) Discuss about Multiplexing in 8086 microprocessor [10+6]

2. (a) Describe the following addressing modes with some examples.

i. Indexed addressing with displacement
ii. I/O port addressing
(b) Explain the meaning of the following 8086 instructions
i. mov [3845h], bx
ii. add ax, [si]
iii. mov bx, 2956h
iv. adc ax, bx [8+8]

3. (a) Write an ALP in 8086 to find a maximum number in the array of 10 numbers
(b) Write a recursive program in 8086 ALP to find the sum of the first “n integers
[8+8]

4. (a) Explain how static RAMs are interfaced to 8086. Give necessary interface
diagram assuming appropriate signals and memory size
(b) Explain the need of DMA. Discuss in detail about DMA data transfer method
[8+8]

5. (a) Explain mode 1 input operation and mode 1 output operation in 8255 with
examples
(b) Give the status word of 8255 in mode 2 and explain each bit. [10+6]

6. (a) Write an initialization sequence for an 8259 in an 8086 based system, with an
even address of 0A0H that will cause
i. Request to the edge triggered mode
ii. IR0 request to an interrupt type 30
iii. SP/EN to output a disable signal to the data bus transceivers.
iv. The ISR bits to be cleared automatically at the end of second INTA pulse.
v. The IMR to be cleared.

1 of 2
Code No: R05320404 Set No. 2
vi. The highest priority interrupt will be IR6.
(b) What is the minimum number of bus cycles that can occur between the time
an interrupt request is recognized and the first instruction in the interrupt
routine is fetched. [12+4]

7. (a) Draw the circuit of RS232 to TTL conversion and explain this interface?
(b) Draw the internal block diagram of 8251 USART and explain in detail about
each block. [6+10]

8. (a) Interface Data memory of 16K x 8 SRAM to 8051 and give memory map. The
Starting address of SRAM should be 0000H.
(b) Give the format of PCON in 8051 and give bit definitions. [10+6]

⋆⋆⋆⋆⋆

2 of 2
Code No: R05320404 Set No. 3
III B.Tech II Semester Supplimentary Examinations, Aug/Sep 2008
MICROPROCESSORS AND INTERFACING
( Common to Electronics & Communication Engineering, Electronics &
Instrumentation Engineering, Bio-Medical Engineering, Electronics &
Control Engineering and Electronics & Telematics)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆⋆⋆⋆⋆

1. (a) With a neat architectural diagram explain the functioning of an 8086 micro-
processor
(b) Compare the flag resisters of 8086 & 8085 [10+6]
2. (a) Explain in detail about the following addressing modes of 8086 with examples.
i. I/O port addressing
ii. Based indexed addressing with displacement
(b) Write an ALP in 8086 to add two 16- bit hexa decimal numbers [10+6]
3. (a) Write an ALP in 8086 to count number of positive and negative numbers from
an array of 8-bit integers
(b) Write an ALP in 8086 to exchange a block of N bytes of data between source
and destination [8+8]
4. (a) Explain how static RAMs are interfaced to 8086. Give necessary interface
diagram assuming appropriate signals and memory size
(b) Explain the need of DMA. Discuss in detail about DMA data transfer method
[8+8]
5. (a) Distinguish between Mode set control word and BSR control Word of 8255?
(b) Write an ALP in 8086 to generate a symmetrical square wave form with 1KHz
frequency? Give the necessary circuit setup with a DAC? [8+8]
6. (a) Differentiate between Initialization Command Words and Operation Com-
mand Words of 8259.
(b) Discuss about the interrupt priority schemes used in 8259. [10+6]
7. (a) Discuss the serial data transmission standards and their specifications.
(b) Draw the block diagram of 8251 and explain about each block. [6+10]
8. (a) Discuss in detail about memory and I/O interfacing of 8051.
(b) compare salient features of 8051 family of microcontrollers. with microproces-
sors. [10+6]

⋆⋆⋆⋆⋆

1 of 1
Code No: R05320404 Set No. 4
III B.Tech II Semester Supplimentary Examinations, Aug/Sep 2008
MICROPROCESSORS AND INTERFACING
( Common to Electronics & Communication Engineering, Electronics &
Instrumentation Engineering, Bio-Medical Engineering, Electronics &
Control Engineering and Electronics & Telematics)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆⋆⋆⋆⋆

1. (a) Draw the architectural diagram of 8085 and explain the function of each block
in detail
(b) Discuss about Multiplexing in 8086 microprocessor [10+6]

2. (a) Write in detail about the addressing modes of 8086 Microprocessor

(b) What are procedures? Give examples. [10+6]

3. (a) Write an ALP in 8086 to sort a given set of 8-bit unsigned integers into as-
cending order by bubble sort method
(b) Write an ALP in 8086 to display the string “WELCOME” on the screen [10+6]

4. (a) With a neat pin diagram explain the minimum mode operation of 8086 (08)
(b) With a neat timing diagram explain how a READ operation is performed by
8086
[8+8]

5. (a) What is meant by interfacing. Explain the brief description of PPI Chip?
(b) What is BSR mode of operation? How it is useful in controlling the interrupt
initiated data transfer for mode 1 and mode 2? [8+8]

6. (a) What is the purpose of operational command words of 8259? Explain their
format and the use?
(b) Discuss the following interrupts.
i. Divide Error
ii. Non Maskable interrupt
iii. Break Point interrupt [10+6]

7. (a) Discuss the serial data transmission standards and their specifications.
(b) Draw the block diagram of 8251 and explain about each block. [6+10]

8. (a) Discuss about various addressing modes of 8051.

(b) Explain the interrput structure of 8051 [8+8]

⋆⋆⋆⋆⋆

1 of 1