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Experiment 2: NOR and Nand Gates

This document discusses NAND and NOR logic gates. It defines NAND and NOR gates as contractions of AND-NOT and OR-NOT respectively. A NAND gate output is high only when both inputs are low, and a NOR gate output is high when both inputs are low. All other logic functions can be implemented using only NAND or NOR gates. Truth tables are provided to show the logic operations of NAND and NOR gates with different input combinations.

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Reinmark Nathaniel Martinez
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163 views26 pages

Experiment 2: NOR and Nand Gates

This document discusses NAND and NOR logic gates. It defines NAND and NOR gates as contractions of AND-NOT and OR-NOT respectively. A NAND gate output is high only when both inputs are low, and a NOR gate output is high when both inputs are low. All other logic functions can be implemented using only NAND or NOR gates. Truth tables are provided to show the logic operations of NAND and NOR gates with different input combinations.

Uploaded by

Reinmark Nathaniel Martinez
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 26

Experiment 2

NOR and
NAND
GATES
OBJECTIVE
The student will
be able to do the

following:a. Deter
mine the
logic operations
of NAND
and NOR
gates.b. Connect
basic logic gates
to produce
NAND and

NOR gates.c. Fillup truth tables


of circuit equation
and determine
itsinput/output
logic
combinations.Logi
c Operations
NAND GATE.

The gate is a
contraction of
AND-NOT. The
output ishigh when
both inputs are
low and any one of
the input is low
.The output islow

level when both


inputs are high.
NOR GATE.
The NOR gate is a
contraction of ORNOT. The outputis
high when both
inputs are low.
The output is low

when one or both


inputsare high.All
other
gates/functions
can be
implemented by
NOR or NAND
gates. Sothey are
called universal

gates. In fact,
in chips, entire
logic maybe built
usingonly NAND
(or NOR)
gates.Example: N
OT or Inverter -NAND with input
s shorted.AND --

NAND followed
by a NOT (using
NAND).OR -giving inverted in
puts to NAND gat
e.

of inputs? ______
_______________
______________
_______________
_______________
_______________
_______________
_________ _____
_______________

_______________
_______________
_______________
____ 4. Draw the
schematic symbol
of a NOR GATE
(simplified) with x
and y as inputs;
zas the

output.5. What
general rule you
could state for a
NOR GATE with
its logic
operation? ______
_______________
_______________
_______________

_______________
___ ___________
_______________
_______________
_______________
_____________ _
_______________
_______________
_______________

_______________
________ ______
_______________
_______________
_______________
_______________
___ 6. Suppose
we have a 3-input
NOR GATE. Fill-

up the truth table


below anddetermi
ne the output from
the given input
combinations.

Page4 of 5

NAND Gate

7. Plot the
circuit in the

breadboard using
the diagram
below.8. Fill-up
the truth table
below
after performing
the different input
combinations
of pin 13 and 12

of AND
gate. Determine
the output of
NOT at pin 10.
INPUTOUT
PUT
Pin13Pin12
P i n 1 0 0001101
1

Table 3. Truth Table of ANDNOT Gates

9. What is the
difference between
the output of
a AND gate
compared to
the outputof a
NAND gate with
the same set of

inputs?
_______________
_______________
__ ____________
_______________
_______________
_______________
____________ __
_______________

_______________
_______________
_______________
_______ 10. Draw
the schematic
symbol of a
NAND GATE
(simplified) with x
and y asinputs; z

as the
output.11. What
general rule you
could state for a
NAND GATE
with its logic
operations? _____
_______________
_______________

_______________
_______________
____ __________
_______________
_______________
_______________
______________
_______________
_______________

_______________
_______________
_________

Page5 of 5

12. Suppose
we have a 4-input
NAND Gate. Fillup the truth table
below anddetermi
ne the output from
the given input
combinations.Con

cept by:JERRY C.
ESPERANZACop
yright
2009http://Thrivin
gAndLiving.blogs
pot.com

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