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Low-Cost Anti-Tamper Technology: MITRE Sponsored Research

The document discusses developing new low-cost approaches for tamper resistance in emerging applications. It investigates current anti-tamper methods, identifies techniques that could be applied at low cost, and demonstrates power side-channel analysis as a potential method. The goal is more effective yet affordable protection for intelligent devices.
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0% found this document useful (0 votes)
91 views9 pages

Low-Cost Anti-Tamper Technology: MITRE Sponsored Research

The document discusses developing new low-cost approaches for tamper resistance in emerging applications. It investigates current anti-tamper methods, identifies techniques that could be applied at low cost, and demonstrates power side-channel analysis as a potential method. The goal is more effective yet affordable protection for intelligent devices.
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Low-Cost Anti-Tamper Technology

Brian Faull, E536 (781) 271 5736 - bfaull@mitre.org Richard Pietravalle, G026 (781) 271 7994 - rpietravalle@mitre.org

MITRE Sponsored Research

2008 The MITRE Corporation. All rights reserved.

Problem

Increased need for low-cost systems and devices in adverse settings


E.g., mobile communications, portable intelligent devices

Traditional anti-tamper (AT) techniques for large systems are not feasible to use in smaller systems Need better low-cost approaches for protecting information in low-end embedded systems
2008 The MITRE Corporation. All rights reserved.

Background

Protection/Cost Tradeoffs

2008 The MITRE Corporation. All rights reserved.

Objective

Develop new, low-cost approaches for tamper resistance in emerging applications

2008 The MITRE Corporation. All rights reserved.

Activities

Investigate current methods and strategies for protecting low-end systems and components Engage in dialog with private sector and academia Investigate characteristics of current methods in the laboratory Identify new techniques or extensions to current methods that hold promise for acceptable cost/protection tradeoffs

2008 The MITRE Corporation. All rights reserved.

Highlight
Tamper Methods
$$$$

Fault induction
protocol attack, glitching (force test / failure mode), flip bits with X-Ray, change FW / SW,

Modify hardware
cut traces,
flip bits with light / FIB, damage circuit,

Active

Side Channel and interface-level

Passive

Read / Visualize hardware / memory


probe signals on die, microscope image, read memory / logic,

differential power analysis [DPA], Electromagnetic [EM] signature, probe interface signals, disassemble/RE SW, FW, HW

Non-invasive

Invasive

$$$$

2008 The MITRE Corporation. All rights reserved.

Demonstration
Power Side-Channel Analysis
Green, peaks: Correct hypothesis

Incorrect hypotheses

Correct hypothesis

2008 The MITRE Corporation. All rights reserved.

Impacts

More effective protection for intelligent field devices Improved cost characteristics for current devices needed for widespread deployment

Increased dialog with the information and system protection community on new methods of protection Increased flow of expertise and product to government sponsors from the private sector

2008 The MITRE Corporation. All rights reserved.

Future Plans
Vulnerabilities, goals and adversaries Anti-tamper techniques Conventional tamper techniques

AT strategy and techniques


Protect underlying technology E.g., Masking, Encryption, Obfuscation, Textbook Hybrid Novel

Verification strategy and techniques


Understand tamper vectors E.g., Side-channel analysis, Hardware, Software, Packaging,

Spectrum of Protection Methods


Images from cryptography.com, wikipedia.org, cryptome.org, gore.com
2008 The MITRE Corporation. All rights reserved.

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