Bandgap Circuits - Best Reference
Bandgap Circuits - Best Reference
Table of contents
Summary
20 years anniversary AKB, Infineon Technologies AG, Munich, Oct. 18 + 19, 2007 v071021
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V
IS (T )
exp BE
qB
VT (T )
Eg
IS (T ) = C T m exp
kT
T
IS (T ) = IS (T0 )
T0
exp g
VT
VT (T ) =
T
1
T0
kT
q
Vg
T
V
T
1 exp BE
I C (T ) = IS (T0 ) exp
kT / q
T0
kT / q T0
20 years anniversary AKB, Infineon Technologies AG, Munich, Oct. 18 + 19, 2007 v071021
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JC+
0.90
Vbe / V
0.80
vbe1_1u
vbe2_10u
0.70
vbe3_100u
vbe4_1m
0.60
JC-
0.50
0.40
-50
50
100
150
T/C
20 years anniversary AKB, Infineon Technologies AG, Munich, Oct. 18 + 19, 2007 v071021
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Real case
V BE
V BE3
VBE3
V R2 = V BE * R 2 / R 3
V R2 = V BE * R2 / R 3
V R3=VBE
VR3=VBE
T
20 years anniversary AKB, Infineon Technologies AG, Munich, Oct. 18 + 19, 2007 v071021
T
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V R 3 = V BE1 V BE 2 = V BE
+Vcc
Icc
VBG
R2
R1
T1
V R2 = V3 * R 2 / R 3
TC pos.
T3
T2
VBE2
V R 2 = VR 3
R2
R3
V BE3
TC neg.
VBE1
dV BE =VR3
TC pos.
R3
VBG = VR 2 + VBE 3 = VR 3
R2
+ VBE 3
R3
As demonstrated on the next slide, all Bandgap references use two basic
elements:
1. Two BJTs working at different current densities
2. Adding a VBE (-TC) and a resistor voltage drop (+TC)
20 years anniversary AKB, Infineon Technologies AG, Munich, Oct. 18 + 19, 2007 v071021
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Brokaw , 1974
+Vcc
VCC
Kujik, 1973
ICC
V BG
R1
R1
V R2
R1=R2
V CC
R1
0V
R2
P1
P2
0V
R2
R1
R1=R2
N3
N1
R3
N2 VBE3
VBE
VBG
N1
R3
R1
VBE1
VBG
VBE
VBG
N2
N1
R3
N2
VBE2
R2
V BE
VBG
N2
N1
VBE1
R3
VBE*
2R2/R 3
R2
V BG = VBE3+ (R 2/R 3) * V BE
20 years anniversary AKB, Infineon Technologies AG, Munich, Oct. 18 + 19, 2007 v071021
VBE
VBE*
2R2/R3
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VBG
V BG
T
TC
-TC(VBE3 )
TC(V R2)
20 years anniversary AKB, Infineon Technologies AG, Munich, Oct. 18 + 19, 2007 v071021
-TC(VBE3) = TC(VR2)
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TC
VBG
VBG
VBG
-TC(VBE3 )
-TC(V BE3 )
TC(V R2)
TC
TC(VR2)
R 2/R 3 +
T
20 years anniversary AKB, Infineon Technologies AG, Munich, Oct. 18 + 19, 2007 v071021
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VCC
Icc
VBG
P1
P2
R2
R1
VBG
R1
I CT 2 =
N2
N1
VR 3 VBE
=
R3
R3
T1
R3
R2
VBE
VBE*
2R2/R3
VBE
T3
T2
VBE2
VBE3
TC neg.
VBE1
dVBE =VR3
TC pos.
VBE1
VR2 = V3 * R 2 / R 3
TC pos.
R3
kT IST 2
=
ln
q IST 1
20 years anniversary AKB, Infineon Technologies AG, Munich, Oct. 18 + 19, 2007 v071021
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Table of contents
Summary
20 years anniversary AKB, Infineon Technologies AG, Munich, Oct. 18 + 19, 2007 v071021
Page 11
VBG
VBG MAX
VBG T25
VBG TOP
dVBG
TMIN T=25
TOP=75
TMAX
Operating range
TCVBG
(
V
=
BG MAX
VBG MIN )
(TMAX TMIN )
1
VBG (T = 25)
20 years anniversary AKB, Infineon Technologies AG, Munich, Oct. 18 + 19, 2007 v071021
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VBG
sim
meas
T
packaged device
20 years anniversary AKB, Infineon Technologies AG, Munich, Oct. 18 + 19, 2007 v071021
on wafer device
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5mV
50mV
Page 14
VCC
P1
R1
N2
R3
R2
VBE
VBE*
2R2/R3
20 years anniversary AKB, Infineon Technologies AG, Munich, Oct. 18 + 19, 2007 v071021
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IS
XTI
EG
XTB
VAR
Vg
T
T
1
I C (T ) = IS (T0 ) exp
T0
kT / q T0
V
exp BE
kT / q
VError =
VT
*VREF
VAR
VError =
26mV
1.2V = 12mV
2.6V
20 years anniversary AKB, Infineon Technologies AG, Munich, Oct. 18 + 19, 2007 v071021
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20 years anniversary AKB, Infineon Technologies AG, Munich, Oct. 18 + 19, 2007 v071021
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20 years anniversary AKB, Infineon Technologies AG, Munich, Oct. 18 + 19, 2007 v071021
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Table of contents
Summary
20 years anniversary AKB, Infineon Technologies AG, Munich, Oct. 18 + 19, 2007 v071021
Page 19
Summary
There are different possible reasons for Bandgap simulation and
measurement errors:
for packaged devices: mechanical stress
for on wafer circuits:
1. pnp mirror mismatch
2. R2 and R3 tolerance and mismatch, TC tolerance and mismatch
3. npn IC matching and
4. npn IC(T) modeling (EG, XTI, XTB, IS, VAR)
To evaluate these effects on bandgap simulation results it is
necessary to
1. use special bandgap modeling test circuits, which allow to seperate
these effects
2. apply improved extraction methods for EG, XTI (e.g. proposed by
Beckrich et.al. at CMRF2004)
20 years anniversary AKB, Infineon Technologies AG, Munich, Oct. 18 + 19, 2007 v071021
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