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Assembly Language Lecture2

Real mode allows access to 1MB of memory using a 20-bit address. Protected mode and paging were introduced to allow access to 4GB of memory using 32-bit addresses. Segments such as code, data, and stack are used to separate instructions from data. Registers like EIP, EFLAGS, and segment registers are used for addressing memory and storing status flags. Common flags include carry, overflow, sign, zero, and interrupt flags.

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54 views

Assembly Language Lecture2

Real mode allows access to 1MB of memory using a 20-bit address. Protected mode and paging were introduced to allow access to 4GB of memory using 32-bit addresses. Segments such as code, data, and stack are used to separate instructions from data. Registers like EIP, EFLAGS, and segment registers are used for addressing memory and storing status flags. Common flags include carry, overflow, sign, zero, and interrupt flags.

Uploaded by

Denise Nelson
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
You are on page 1/ 12

Real, protected and virtual mode

Segmentation = memory management scheme


Segment = block of memory.
A logical address consists of:
 base address
 offset (relative address within the segment)
base address
offset

segment

Advantages of the segmentation


 shorter addressing part of the instruction (only the offset
of the operand is encoded in the instruction, the base
address is in a base register)
 instructions are separated from data
Segment types
 code segment holds machine instructions
 data segment
 stack segment holds:
o return addresses, parameters and local variables of
procedures,
o temporary results of mathematical operations
Assembly Language 2/ 1

Real mode
Processor 8086 works only in real mode.
20-bit address bus =>
access up to 1,048,576 (or 220) memory locations (1 MB)
Base address ... 16-bit value
Offset ... 16-bit value =>
segments are limited to 216 bytes = 64 kB
Linear address = base address * 16 + offset
15

0
base address
15

0000
0

offset

19

0
linear address

Linear address = physical address.


What is the physical address, if the logical address is
020A:1BCD ?

Assembly Language 2/ 2

Protected mode
introduced in the 80386 processor.
32-bit address bus =>
access up to 232 bytes = 22 . 230 B = 4 GB
Base address ... 32-bit value
Offset ... 16-bit or 32-bit value
Linear address = base address + offset
Linear address physical address.
paging
Paging memory management scheme
 transforms a huge logical address space to a smaller
physical address space;
 permits multitasking (execution multiple tasks in parallel)
by providing tools for protection of the programs address
space (a program cannot overwrite other programs data)
Modes according to offset size:
 16-bit mode (real or protected)
 32-bit mode (only protected)
Virtual mode
Processor runs in protected mode, but simulates real mode: a
20-bit linear address is translated by paging to a 32-bit
physical address.
A processor is switched to virtual mode when running a DOS
application under Windows operating system.
Assembly Language 2/ 3

Registers
memory locations inside the processor.
 user registers used by user applications
 system registers used by the operating system

User registers
 general-purpose registers
 segment registers
 instruction pointer
 flags register

Assembly Language 2/ 4

General-purpose registers
They may
 hold instruction operands
 contain the effective address (offset) of an operand or
participate in its calculation.
31

16 15

EAX

8 7
AH AX

AL

EBX

BH

BX

BL

ECX

CH

CX

CL

EDX

DH

DX

DL

ESI

SI

EDI

DI

EBP

BP

ESP

SP

Assembly Language 2/ 5

Segment registers
 16-bit registers
 In real mode they contain the base address of a segment:
CS base address of the code segment
SS base address of the stack segment
DS base address of the data segment
ES, FS, GS base address of other data segments
CS a SS are initialised automatically by the operating
system at the moment of the program start.
The other segment registers are set by program
instructions.
 In protected mode they contain indexes (selectors) to a
table where segment descriptors are stored; they are
initialised automatically by the operating system.

Assembly Language 2/ 6

Instruction Pointer EIP


 32-bit register
 It contains the memory offset at which the next instruction to
be executed is stored.
 In 16-bit mode the lower 16 bits of the EIP register (IP) are
used:
1023:2AAA : inc cx
1023:2AAB : mov ax,Pocet
CS

1023:2AAE : add ax,cx

EIP is initialised automatically by the operating system at the


moment of the program start to the offset of the first
instruction (usually 0).
As one instruction is executed, EIP is advanced to point to the
next instruction.
Jumps, procedure calls and returns change the EIP value as
well.

Assembly Language 2/ 7

Flags register
 32-bit register
 It contains information about
the result of the recent arithmetic or logical operation
the state of the processor
the state of the current task
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0 0 0 0 0 0 0 0 0 0
RF
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OF DF IF TF SF ZF 0 AF 0 PF 1 CF
0
used by the operating system

Assembly Language 2/ 8

Carry Flag CF
CF is set to 1 if the result of an arithmetic operation on
unsigned numbers is too big to be held in the specified
register or memory location, i.e. the operation has produced a
carry from the most significant bit.
Otherwise it is set to 0.
mov al,255; store 255 = 0FFh to register al
add al,4; add 4 to al
mov al,127
add al,4

Overflow Flag OF
OF is set to 1 if an arithmetic operation on signed numbers
gives a result which is out of range, i.e.
 the operation has produced a carry to the most significant
(sign) bit but not from the most significant bit,
 the operation has produced a carry only from the most
significant bit.
mov al,-128; 80h
add al,-1; 0FFh

Assembly Language 2/ 9

Sign Flag SF
is only useful when operating with signed numbers.
SF is set to 1 if the result of an operation is negative,
otherwise it is set to 0.
SF takes the same value as the most significant bit of the
result.

Auxiliary Carry Flag AF


is useful when operating with decimal numbers
represented in packed BCD form.
AF is set to 1 if an arithmetic operation has produced a carry
from the 3rd to the 4th bit.
mov al,28h
add al,9
0010 1000 (= 28 BCD)
0000 1001 (= 09 BCD)
0011 0001 (= 31?)

Zero Flag ZF
ZF is set to 1 if the result of an operation is zero, otherwise it
is set to 0.

Assembly Language 2/ 10

Parity Flag PF
PF is set to 1 if the lowest byte of the result of an operation
contains an even number of 1s, otherwise it is set to 0. It is
mainly useful when transmitting data between devices.

Direction Flag DF
DF is useful when manipulating a data array (string, vector
etc.). It is set by instructions in a program.
If DF is set to 0, the string instruction increments the index by
the size of the array entry and so progress is forward through
memory (the string is manipulated from the left to the right).
If DF is set to 1, the string instruction decrements the index
and so progress is backward through memory (the string is
manipulated from the end to the beginning).

Interrupt Enable Flag IF


IF is set by instructions in a program.
If IF is set to 1, interruption to normal processor operation can
be initiated from devices (like keyboard, disc, modem).
If IF is set to 0, external interrupts are ignored.

Assembly Language 2/ 11

Trap Flag TF
Resume Flag RF
These flags are useful when debugging programs.
They are set by instructions in a program (debugger).
By setting TF to 1 the processor is forced to operate in single
step mode in which an internal interrupt is generated after
every instruction.
By setting RF to 1, a potential breakpoint on the next
instruction will be ignored.
Debugger sets RF to 1 after the breakpoint service routine
has finished so the program can continue from the instruction
labelled by breakpoint. After the instruction has been
executed, RF is set to 0.

Assembly Language 2/ 12

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